| /freebsd/sys/dev/cxgbe/firmware/ |
| H A D | t5fw_cfg_fpga.txt | 22 # 2. Ingress Queues with Free Lists: 1024. PCI-E SR-IOV Virtual Functions
23 # must use a power of 2 Ingress Queues.
35 # address matching on Ingress Packets.
54 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
62 # 8 Ingress Queue/MSI-X Vectors per application function
64 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
98 # round them up to the Ingress Padding Boundary.
187 # Each Ingress Queue can use one MSI-X interrupt but some Ingress Queues can
188 # use Forwarded Interrupt Ingress Queues. For these latter, an Ingress Queue
189 # would be created and the Queue ID of a Forwarded Interrupt Ingress Queue
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| H A D | t6fw_cfg_fpga.txt | 23 # 2. Ingress Queues with Free Lists: 1024.
27 # address matching on Ingress Packets.
39 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
47 # 16 Ingress Queue/MSI-X Vectors per application function
49 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
77 # round them up to the Ingress Padding Boundary.
199 # Each Ingress Queue can use one MSI-X interrupt but some Ingress Queues can
200 # use Forwarded Interrupt Ingress Queues. For these latter, an Ingress Queue
201 # would be created and the Queue ID of a Forwarded Interrupt Ingress Queue
202 # will be specified as the "Ingress Queue Asynchronous Destination Index."
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| H A D | t4fw_cfg_uwire.txt | 22 # 2. Ingress Queues with Free Lists: 1024. PCI-E SR-IOV Virtual Functions
23 # must use a power of 2 Ingress Queues.
35 # address matching on Ingress Packets.
54 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
62 # 8 Ingress Queue/MSI-X Vectors per application function
64 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
91 # round them up to the Ingress Padding Boundary.
170 # Each Ingress Queue can use one MSI-X interrupt but some Ingress Queues can
171 # use Forwarded Interrupt Ingress Queues. For these latter, an Ingress Queue
172 # would be created and the Queue ID of a Forwarded Interrupt Ingress Queue
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| H A D | t5fw_cfg_uwire.txt | 23 # 2. Ingress Queues with Free Lists: 1024.
27 # address matching on Ingress Packets.
39 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
47 # 8 Ingress Queue/MSI-X Vectors per application function
49 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
77 # round them up to the Ingress Padding Boundary.
205 # Each Ingress Queue can use one MSI-X interrupt but some Ingress Queues can
206 # use Forwarded Interrupt Ingress Queues. For these latter, an Ingress Queue
207 # would be created and the Queue ID of a Forwarded Interrupt Ingress Queue
208 # will be specified as the "Ingress Queue Asynchronous Destination Index."
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| H A D | t6fw_cfg_uwire.txt | 23 # 2. Ingress Queues with Free Lists: 1024.
27 # address matching on Ingress Packets.
39 # Ingress Queues and MSI-X Vectors to allow up to some number of CPUs
47 # 16 Ingress Queue/MSI-X Vectors per application function
49 # for a total of 96 Ingress Queues and MSI-X Vectors on the Unified PF.
77 # round them up to the Ingress Padding Boundary.
222 # Each Ingress Queue can use one MSI-X interrupt but some Ingress Queues can
223 # use Forwarded Interrupt Ingress Queues. For these latter, an Ingress Queue
224 # would be created and the Queue ID of a Forwarded Interrupt Ingress Queue
225 # will be specified as the "Ingress Queue Asynchronous Destination Index."
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| H A D | t4fw_cfg.txt | 5 # niqflint = 1023 ingress queues with freelists and/or interrupts
158 # and GTS registers, the number of Ingress and Egress Queues must be a power
209 # MPS has 192K buffer space for ingress packets from the wire as well as
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| H A D | t6fw_cfg_hashfilter.txt | 5 # niqflint = 1023 ingress queues with freelists and/or interrupts
187 # and GTS registers, the number of Ingress and Egress Queues must be a power
238 # MPS has 192K buffer space for ingress packets from the wire as well as
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| H A D | t5fw_cfg.txt | 5 # niqflint = 1023 ingress queues with freelists and/or interrupts
203 # and GTS registers, the number of Ingress and Egress Queues must be a power
254 # MPS has 192K buffer space for ingress packets from the wire as well as
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| H A D | t5fw_cfg_hashfilter.txt | 5 # niqflint = 1023 ingress queues with freelists and/or interrupts
206 # and GTS registers, the number of Ingress and Egress Queues must be a power
257 # MPS has 192K buffer space for ingress packets from the wire as well as
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| H A D | t6fw_cfg.txt | 5 # niqflint = 1023 ingress queues with freelists and/or interrupts
205 # and GTS registers, the number of Ingress and Egress Queues must be a power
256 # MPS has 192K buffer space for ingress packets from the wire as well as
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| /freebsd/share/man/man4/ |
| H A D | gif.4 | 112 .Bl -tag -width "Ingress" -offset indent
113 .It Ingress
128 on egress and ingress, as follows:
129 .Bl -tag -width "Ingress" -offset indent
130 .It Ingress
152 performs both martian and ingress filtering against the outer source address
154 Note that martian/ingress filters are in no way complete.
156 Ingress filtering can break tunnel operation in an asymmetrically
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| H A D | stf.4 | 161 Packets that does not pass ingress filtering.
163 Ingress filter can be turned off by
174 You may also want to run normal ingress filter against inner IPv6 address
336 and to cope with ingress filtering rule on the other side.
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| H A D | ng_netflow.4 | 77 By default (ingress NetFlow enabled) node does NetFlow accounting of data
200 enabled by default enables ingress NetFlow generation (for data coming from
213 These two options are important to avoid duplicate accounting when both ingress
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| /freebsd/sys/dev/mlx5/mlx5_core/ |
| H A D | mlx5_eswitch.c | 718 esw_debug(dev, "Create vport[%d] ingress ACL log_max_size(%d)\n", in esw_vport_enable_ingress_acl()
723 esw_warn(dev, "Failed to get E-Switch ingress flow namespace\n"); in esw_vport_enable_ingress_acl()
737 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress flow Table, err(%d)\n", in esw_vport_enable_ingress_acl()
751 esw_warn(dev, "Failed to create E-Switch vport[%d] ingress flow group, err(%d)\n", in esw_vport_enable_ingress_acl()
756 vport->ingress.acl = acl; in esw_vport_enable_ingress_acl()
757 vport->ingress.drop_grp = g; in esw_vport_enable_ingress_acl()
767 mlx5_del_flow_rules(&vport->ingress.drop_rule); in esw_vport_cleanup_ingress_rules()
773 if (IS_ERR_OR_NULL(vport->ingress.acl)) in esw_vport_disable_ingress_acl()
776 esw_debug(esw->dev, "Destroy vport[%d] E-Switch ingress ACL\n", vport->vport); in esw_vport_disable_ingress_acl()
779 mlx5_destroy_flow_group(vport->ingress.drop_grp); in esw_vport_disable_ingress_acl()
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| /freebsd/sbin/etherswitchcfg/ |
| H A D | etherswitchcfg.8 | 143 Disable the strip VLAN tag on ingress option.
164 .It Cm ingress
165 Enable the ingress filter on the port.
166 .It Fl ingress
167 Disable the ingress filter.
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| /freebsd/usr.sbin/cxgbetool/ |
| H A D | cxgbetool.8 | 51 .Nm Ar nexus Cm context Bro Cm ingress | egress | fl | cong Brc Ar cntxt_id
148 .Cm context ingress Ar ingress_cntxt_id
156 Display hardware context for an ingress queue, congestion manager, egress
160 context id of an ingress queue -- the value listed in one of
273 bitwise and of the ingress port with
277 The ingress port is a 3 bit number that identifies the port on which a
281 Note that ingress port is not a bit field so it is not always possible
282 to match an arbitrary subset of ingress ports with a single filter rule.
447 Context id of an ingress queue to which to deliver the packet.
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| /freebsd/sys/dev/etherswitch/ar40xx/ |
| H A D | ar40xx_hw_port.c | 257 uint32_t egress, ingress, reg; in ar40xx_hw_port_setup() local
263 ingress = AR40XX_IN_SECURE; in ar40xx_hw_port_setup()
266 ingress = AR40XX_IN_PORT_ONLY; in ar40xx_hw_port_setup()
281 reg |= ingress << AR40XX_PORT_LOOKUP_IN_MODE_S; in ar40xx_hw_port_setup()
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| /freebsd/sys/dev/cxgb/common/ |
| H A D | cxgb_firmware_exports.h | 102 * Ingress Traffic (e.g. DMA completion credit) for TUNNEL Queue[i] is sent
114 * Ingress Traffic for CTRL Queue[i] is sent to RESP Queue[i].
127 * Ingress Trafffic for OFFLOAD Queue[i] is sent to RESP Queue[i].
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| /freebsd/sys/dev/cxgbe/ |
| H A D | t4_ioctl.h | 113 #define T4_FILTER_PORT 0x80 /* Physical ingress port */
123 * T4_FILTER_VNIC's real meaning depends on the ingress config.
195 uint32_t iport:3; /* ingress port */
212 uint32_t iq:10; /* ingress queue */
218 * Switch proxy/rewrite fields. An ingress packet which matches a
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| H A D | t4_vf.c | 347 * XXX: The Linux driver reserves an Ingress Queue for in cfg_itype_and_nqueues()
355 * Every rxq requires an ingress queue with a free in cfg_itype_and_nqueues()
364 * limit on ingress queues. in cfg_itype_and_nqueues()
369 "Not enough ingress queues (%d) for %d ports\n", in cfg_itype_and_nqueues()
388 * Too many ingress queues. Use what we can. in cfg_itype_and_nqueues()
392 KASSERT(nrxq <= iq_avail, ("too many ingress queues")); in cfg_itype_and_nqueues()
427 KASSERT(nrxq <= iq_avail, ("too many ingress queues")); in cfg_itype_and_nqueues()
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| /freebsd/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-am65-iot2050-common-pg1.dtsi | 67 <&main_udmap 0x4100>, /* ingress slice 0 */
68 <&main_udmap 0x4101>, /* ingress slice 1 */
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| H A D | k3-am654-idk.dtso | 61 <&main_udmap 0x4100>, /* ingress slice 0 */
62 <&main_udmap 0x4101>; /* ingress slice 1 */
127 <&main_udmap 0x4200>, /* ingress slice 0 */
128 <&main_udmap 0x4201>; /* ingress slice 1 */
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| /freebsd/sys/dev/qat/qat_hw/qat_c4xxx/ |
| H A D | adf_c4xxx_hw_data.c | 1157 /* Overwrite default MAC_CFG register in ingress offset */ in c4xxx_init_inline_hw()
1169 * in ingress offset in c4xxx_init_inline_hw()
1191 * advertize that both ingress and egress directions are available in c4xxx_init_inline_hw()
1197 /* Set error notification configuration of ingress */ in c4xxx_init_inline_hw()
1673 /* Function reads the inline ingress/egress configuration
1674 * and returns the number of AEs reserved for ingress
1686 unsigned long ingress, egress = 0; in adf_get_inline_config() local
1693 device_printf(GET_DEV(accel_dev), "Failed to find ingress\n"); in adf_get_inline_config()
1698 if (compat_strtoul(value, 10, &ingress)) in adf_get_inline_config()
1711 if (ingress + egress != ADF_C4XXX_100) { in adf_get_inline_config()
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| /freebsd/sys/net/ |
| H A D | rss_config.h | 84 * direction (ingress / egress) is required.
86 * The default direction (INGRESS) is the "receive into the NIC" - ie,
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| /freebsd/contrib/tcpdump/ |
| H A D | print-brcmtag.c | 39 /* Ingress fields */
90 /* Ingress Broadcom tag */ in brcm_tag_print()
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