xref: /freebsd/sys/dev/cxgb/common/cxgb_firmware_exports.h (revision 78d146160dc5339c9cdf7799551bcc442a6eb95b)
1b6d90eb7SKip Macy /**************************************************************************
2*4d846d26SWarner Losh SPDX-License-Identifier: BSD-2-Clause
3b6d90eb7SKip Macy 
4b6d90eb7SKip Macy Copyright (c) 2007, Chelsio Inc.
5b6d90eb7SKip Macy All rights reserved.
6b6d90eb7SKip Macy 
7b6d90eb7SKip Macy Redistribution and use in source and binary forms, with or without
8b6d90eb7SKip Macy modification, are permitted provided that the following conditions are met:
9b6d90eb7SKip Macy 
10b6d90eb7SKip Macy  1. Redistributions of source code must retain the above copyright notice,
11b6d90eb7SKip Macy     this list of conditions and the following disclaimer.
12b6d90eb7SKip Macy 
1310faa568SKip Macy  2. Neither the name of the Chelsio Corporation nor the names of its
14b6d90eb7SKip Macy     contributors may be used to endorse or promote products derived from
15b6d90eb7SKip Macy     this software without specific prior written permission.
16b6d90eb7SKip Macy 
17b6d90eb7SKip Macy THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18b6d90eb7SKip Macy AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19b6d90eb7SKip Macy IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20b6d90eb7SKip Macy ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21b6d90eb7SKip Macy LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22b6d90eb7SKip Macy CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23b6d90eb7SKip Macy SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24b6d90eb7SKip Macy INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25b6d90eb7SKip Macy CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26b6d90eb7SKip Macy ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27b6d90eb7SKip Macy POSSIBILITY OF SUCH DAMAGE.
28b6d90eb7SKip Macy 
29b6d90eb7SKip Macy ***************************************************************************/
30b6d90eb7SKip Macy #ifndef _FIRMWARE_EXPORTS_H_
31b6d90eb7SKip Macy #define _FIRMWARE_EXPORTS_H_
32b6d90eb7SKip Macy 
33b6d90eb7SKip Macy /* WR OPCODES supported by the firmware.
34b6d90eb7SKip Macy  */
35b6d90eb7SKip Macy #define	FW_WROPCODE_FORWARD			0x01
36b6d90eb7SKip Macy #define FW_WROPCODE_BYPASS			0x05
37b6d90eb7SKip Macy 
38b6d90eb7SKip Macy #define FW_WROPCODE_TUNNEL_TX_PKT		0x03
39b6d90eb7SKip Macy 
40b6d90eb7SKip Macy #define FW_WROPOCDE_ULPTX_DATA_SGL		0x00
41b6d90eb7SKip Macy #define FW_WROPCODE_ULPTX_MEM_READ		0x02
42b6d90eb7SKip Macy #define FW_WROPCODE_ULPTX_PKT			0x04
43b6d90eb7SKip Macy #define FW_WROPCODE_ULPTX_INVALIDATE		0x06
44b6d90eb7SKip Macy 
45b6d90eb7SKip Macy #define FW_WROPCODE_TUNNEL_RX_PKT		0x07
46b6d90eb7SKip Macy 
47b6d90eb7SKip Macy #define FW_WROPCODE_OFLD_GETTCB_RPL		0x08
48b6d90eb7SKip Macy #define FW_WROPCODE_OFLD_CLOSE_CON		0x09
49b6d90eb7SKip Macy #define FW_WROPCODE_OFLD_TP_ABORT_CON_REQ	0x0A
50b6d90eb7SKip Macy #define FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL	0x0F
51b6d90eb7SKip Macy #define FW_WROPCODE_OFLD_HOST_ABORT_CON_REQ	0x0B
52b6d90eb7SKip Macy #define FW_WROPCODE_OFLD_TP_ABORT_CON_RPL	0x0C
53b6d90eb7SKip Macy #define FW_WROPCODE_OFLD_TX_DATA		0x0D
54b6d90eb7SKip Macy #define FW_WROPCODE_OFLD_TX_DATA_ACK		0x0E
55b6d90eb7SKip Macy 
56b6d90eb7SKip Macy #define FW_WROPCODE_RI_RDMA_INIT		0x10
57b6d90eb7SKip Macy #define FW_WROPCODE_RI_RDMA_WRITE		0x11
58b6d90eb7SKip Macy #define FW_WROPCODE_RI_RDMA_READ_REQ		0x12
59b6d90eb7SKip Macy #define FW_WROPCODE_RI_RDMA_READ_RESP		0x13
60b6d90eb7SKip Macy #define FW_WROPCODE_RI_SEND			0x14
61b6d90eb7SKip Macy #define FW_WROPCODE_RI_TERMINATE		0x15
62b6d90eb7SKip Macy #define FW_WROPCODE_RI_RDMA_READ		0x16
63b6d90eb7SKip Macy #define FW_WROPCODE_RI_RECEIVE			0x17
64b6d90eb7SKip Macy #define FW_WROPCODE_RI_BIND_MW			0x18
65b6d90eb7SKip Macy #define FW_WROPCODE_RI_FASTREGISTER_MR		0x19
66b6d90eb7SKip Macy #define FW_WROPCODE_RI_LOCAL_INV		0x1A
67b6d90eb7SKip Macy #define FW_WROPCODE_RI_MODIFY_QP		0x1B
68b6d90eb7SKip Macy #define FW_WROPCODE_RI_BYPASS			0x1C
69b6d90eb7SKip Macy 
70b6d90eb7SKip Macy #define FW_WROPOCDE_RSVD			0x1E
71b6d90eb7SKip Macy 
72b6d90eb7SKip Macy #define FW_WROPCODE_SGE_EGRESSCONTEXT_RR	0x1F
73b6d90eb7SKip Macy 
74b6d90eb7SKip Macy #define FW_WROPCODE_MNGT			0x1D
75b6d90eb7SKip Macy #define FW_MNGTOPCODE_PKTSCHED_SET		0x00
768e10660fSKip Macy #define FW_MNGTOPCODE_WRC_SET			0x01
778e10660fSKip Macy #define FW_MNGTOPCODE_TUNNEL_CR_FLUSH		0x02
78b6d90eb7SKip Macy 
79b6d90eb7SKip Macy /* Maximum size of a WR sent from the host, limited by the SGE.
80b6d90eb7SKip Macy  *
81b6d90eb7SKip Macy  * Note: WR coming from ULP or TP are only limited by CIM.
82b6d90eb7SKip Macy  */
83b6d90eb7SKip Macy #define FW_WR_SIZE			128
84b6d90eb7SKip Macy 
85b6d90eb7SKip Macy /* Maximum number of outstanding WRs sent from the host. Value must be
86b6d90eb7SKip Macy  * programmed in the CTRL/TUNNEL/QP SGE Egress Context and used by
87b6d90eb7SKip Macy  * offload modules to limit the number of WRs per connection.
88b6d90eb7SKip Macy  */
89b6d90eb7SKip Macy #define FW_T3_WR_NUM			16
90b6d90eb7SKip Macy #define FW_N3_WR_NUM			7
91b6d90eb7SKip Macy 
92b6d90eb7SKip Macy #ifndef N3
93b6d90eb7SKip Macy # define FW_WR_NUM			FW_T3_WR_NUM
94b6d90eb7SKip Macy #else
95b6d90eb7SKip Macy # define FW_WR_NUM			FW_N3_WR_NUM
96b6d90eb7SKip Macy #endif
97b6d90eb7SKip Macy 
98b6d90eb7SKip Macy /* FW_TUNNEL_NUM corresponds to the number of supported TUNNEL Queues. These
99b6d90eb7SKip Macy  * queues must start at SGE Egress Context FW_TUNNEL_SGEEC_START and must
100b6d90eb7SKip Macy  * start at 'TID' (or 'uP Token') FW_TUNNEL_TID_START.
101b6d90eb7SKip Macy  *
102b6d90eb7SKip Macy  * Ingress Traffic (e.g. DMA completion credit)  for TUNNEL Queue[i] is sent
103b6d90eb7SKip Macy  * to RESP Queue[i].
104b6d90eb7SKip Macy  */
105b6d90eb7SKip Macy #define FW_TUNNEL_NUM			8
106b6d90eb7SKip Macy #define FW_TUNNEL_SGEEC_START		8
107b6d90eb7SKip Macy #define FW_TUNNEL_TID_START		65544
108b6d90eb7SKip Macy 
109b6d90eb7SKip Macy 
110b6d90eb7SKip Macy /* FW_CTRL_NUM corresponds to the number of supported CTRL Queues. These queues
111b6d90eb7SKip Macy  * must start at SGE Egress Context FW_CTRL_SGEEC_START and must start at 'TID'
112b6d90eb7SKip Macy  * (or 'uP Token') FW_CTRL_TID_START.
113b6d90eb7SKip Macy  *
114b6d90eb7SKip Macy  * Ingress Traffic for CTRL Queue[i] is sent to RESP Queue[i].
115b6d90eb7SKip Macy  */
116b6d90eb7SKip Macy #define FW_CTRL_NUM			8
117b6d90eb7SKip Macy #define FW_CTRL_SGEEC_START		65528
118b6d90eb7SKip Macy #define FW_CTRL_TID_START		65536
119b6d90eb7SKip Macy 
120b6d90eb7SKip Macy /* FW_OFLD_NUM corresponds to the number of supported OFFLOAD Queues. These
121b6d90eb7SKip Macy  * queues must start at SGE Egress Context FW_OFLD_SGEEC_START.
122b6d90eb7SKip Macy  *
123b6d90eb7SKip Macy  * Note: the 'uP Token' in the SGE Egress Context fields is irrelevant for
124b6d90eb7SKip Macy  * OFFLOAD Queues, as the host is responsible for providing the correct TID in
125b6d90eb7SKip Macy  * every WR.
126b6d90eb7SKip Macy  *
127b6d90eb7SKip Macy  * Ingress Trafffic for OFFLOAD Queue[i] is sent to RESP Queue[i].
128b6d90eb7SKip Macy  */
129b6d90eb7SKip Macy #define FW_OFLD_NUM			8
130b6d90eb7SKip Macy #define FW_OFLD_SGEEC_START		0
131b6d90eb7SKip Macy 
132b6d90eb7SKip Macy /*
133b6d90eb7SKip Macy  *
134b6d90eb7SKip Macy  */
135b6d90eb7SKip Macy #define FW_RI_NUM			1
136b6d90eb7SKip Macy #define FW_RI_SGEEC_START		65527
137b6d90eb7SKip Macy #define FW_RI_TID_START			65552
138b6d90eb7SKip Macy 
139b6d90eb7SKip Macy /*
140b6d90eb7SKip Macy  * The RX_PKT_TID
141b6d90eb7SKip Macy  */
142b6d90eb7SKip Macy #define FW_RX_PKT_NUM			1
143b6d90eb7SKip Macy #define FW_RX_PKT_TID_START		65553
144b6d90eb7SKip Macy 
145b6d90eb7SKip Macy /* FW_WRC_NUM corresponds to the number of Work Request Context that supported
146b6d90eb7SKip Macy  * by the firmware.
147b6d90eb7SKip Macy  */
148b6d90eb7SKip Macy #define FW_WRC_NUM			\
149b6d90eb7SKip Macy     (65536 + FW_TUNNEL_NUM + FW_CTRL_NUM + FW_RI_NUM + FW_RX_PKT_NUM)
150b6d90eb7SKip Macy 
151b6d90eb7SKip Macy /*
152b6d90eb7SKip Macy  * FW type and version.
153b6d90eb7SKip Macy  */
154b6d90eb7SKip Macy #define S_FW_VERSION_TYPE		28
155b6d90eb7SKip Macy #define M_FW_VERSION_TYPE		0xF
156b6d90eb7SKip Macy #define V_FW_VERSION_TYPE(x)		((x) << S_FW_VERSION_TYPE)
157b6d90eb7SKip Macy #define G_FW_VERSION_TYPE(x)		\
158b6d90eb7SKip Macy     (((x) >> S_FW_VERSION_TYPE) & M_FW_VERSION_TYPE)
159b6d90eb7SKip Macy 
160b6d90eb7SKip Macy #define S_FW_VERSION_MAJOR		16
161b6d90eb7SKip Macy #define M_FW_VERSION_MAJOR		0xFFF
162b6d90eb7SKip Macy #define V_FW_VERSION_MAJOR(x)		((x) << S_FW_VERSION_MAJOR)
163b6d90eb7SKip Macy #define G_FW_VERSION_MAJOR(x)		\
164b6d90eb7SKip Macy     (((x) >> S_FW_VERSION_MAJOR) & M_FW_VERSION_MAJOR)
165b6d90eb7SKip Macy 
166b6d90eb7SKip Macy #define S_FW_VERSION_MINOR		8
167b6d90eb7SKip Macy #define M_FW_VERSION_MINOR		0xFF
168b6d90eb7SKip Macy #define V_FW_VERSION_MINOR(x)		((x) << S_FW_VERSION_MINOR)
169b6d90eb7SKip Macy #define G_FW_VERSION_MINOR(x)		\
170b6d90eb7SKip Macy     (((x) >> S_FW_VERSION_MINOR) & M_FW_VERSION_MINOR)
171b6d90eb7SKip Macy 
172b6d90eb7SKip Macy #define S_FW_VERSION_MICRO		0
173b6d90eb7SKip Macy #define M_FW_VERSION_MICRO		0xFF
174b6d90eb7SKip Macy #define V_FW_VERSION_MICRO(x)		((x) << S_FW_VERSION_MICRO)
175b6d90eb7SKip Macy #define G_FW_VERSION_MICRO(x)		\
176b6d90eb7SKip Macy     (((x) >> S_FW_VERSION_MICRO) & M_FW_VERSION_MICRO)
177b6d90eb7SKip Macy 
178b6d90eb7SKip Macy #endif /* _FIRMWARE_EXPORTS_H_ */
179