Home
last modified time | relevance | path

Searched +full:i2c +full:- +full:parent (Results 1 – 25 of 1032) sorted by relevance

12345678910>>...42

/linux/drivers/media/pci/netup_unidvb/
H A Dnetup_unidvb_i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Internal I2C bus driver for NetUP Universal Dual DVB-CI
65 irqreturn_t netup_i2c_interrupt(struct netup_i2c *i2c) in netup_i2c_interrupt() argument
71 spin_lock_irqsave(&i2c->lock, flags); in netup_i2c_interrupt()
72 reg = readw(&i2c->regs->twi_ctrl0_stat); in netup_i2c_interrupt()
73 writew(reg & ~TWI_IRQEN, &i2c->regs->twi_ctrl0_stat); in netup_i2c_interrupt()
74 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
77 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
79 i2c->state = STATE_DONE; in netup_i2c_interrupt()
83 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
[all …]
/linux/Documentation/i2c/
H A Di2c-topology.rst2 I2C muxes and complex topologies
5 There are a couple of reasons for building more complex I2C topologies
6 than a straight-forward I2C bus with one adapter and one or more devices.
16 from the I2C bus, at least most of the time, and sits behind a gate
19 Several types of hardware components such as I2C muxes, I2C gates and I2C
22 These components are represented as I2C adapter trees by Linux, where
23 each adapter has a parent adapter (except the root adapter) and zero or
25 I2C transfers, and all adapters with a parent are part of an "i2c-mux"
29 an I2C transfer on one of its child adapters. The mux driver can
39 There are two variants of locking available to I2C muxes, they can be
[all …]
H A Di2c-address-translators.rst1 .. SPDX-License-Identifier: GPL-2.0
4 I2C Address Translators
11 -----------
13 An I2C Address Translator (ATR) is a device with an I2C slave parent
14 ("upstream") port and N I2C master child ("downstream") ports, and
16 with a modified slave address. The address used on the parent bus is
21 An ATR looks similar to an i2c-mux except:
22 - the address on the parent and child busses can be different
23 - there is normally no need to select the child port; the alias used on the
24 parent bus implies it
[all …]
/linux/drivers/i2c/
H A Di2c-mux.c2 * Multiplexed I2C bus driver.
4 * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
5 * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
6 * Copyright (c) 2009-2010 NSN GmbH & Co KG <michael.lawnick.ext@nsn.com>
8 * Simplifies access to complex multiplexed I2C bus topologies, by presenting
9 * each multiplexed bus segment as an additional I2C adapter.
10 * Supports multi-level mux'ing (mux behind a mux).
13 * i2c-virt.c from Kumar Gala <galak@kernel.crashing.org>
14 * i2c-virtual.c from Ken Harrenstien, Copyright (c) 2004 Google, Inc.
15 * i2c-virtual.c from Brian Kuschak <bkuschak@yahoo.com>
[all …]
H A Di2c-atr.c1 // SPDX-License-Identifier: GPL-2.0
3 * I2C Address Translator
8 * Originally based on i2c-mux.c
11 #include <linux/i2c-atr.h>
12 #include <linux/i2c.h>
22 #define ATR_MAX_SYMLINK_LEN 11 /* Longest name is 10 chars: "channel-99" */
25 * struct i2c_atr_alias_pair - Holds the alias assigned to a client address.
28 * @alias: I2C alias address assigned by the driver.
29 * This is the address that will be used to issue I2C transactions
30 * on the parent (physical) bus.
[all …]
/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mux-gpmux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: General Purpose I2C Bus Mux
10 - Peter Rosin <peda@axentia.se>
13 This binding describes an I2C bus multiplexer that uses a mux controller
14 from the mux subsystem to route the I2C signals.
16 .-----. .-----.
18 .------------. '-----' '-----'
[all …]
H A Di2c-demux-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-demux-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Pinctrl-based I2C Bus Demultiplexer
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
13 This binding describes an I2C bus demultiplexer that uses pin multiplexing to
14 route the I2C signals, and represents the pin multiplexing configuration
15 using the pinctrl device tree bindings. This may be used to select one I2C
17 another I2C IP core on the SoC. The most simple example is to fall back to
[all …]
H A Di2c-mux-reg.txt1 Register-based I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses a single register
4 to route the I2C signals.
7 - compatible: i2c-mux-reg
8 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
10 * Standard I2C mux properties. See i2c-mux.yaml in this directory.
11 * I2C child bus nodes. See i2c-mux.yaml in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
18 - little-endian: The existence indicates the register is in little endian.
[all …]
H A Di2c-mpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C-Bus adapter for MPC824x/83xx/85xx/86xx/512x/52xx SoCs
10 - Chris Packham <chris.packham@alliedtelesis.co.nz>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - items:
19 - enum:
20 - mpc5200-i2c
[all …]
/linux/include/linux/
H A Di2c-atr.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * I2C Address Translator
8 * Based on i2c-mux.h
14 #include <linux/i2c.h>
22 * enum i2c_atr_flags - Flags for an I2C ATR driver
37 * struct i2c_atr_ops - Callbacks from ATR to the device driver.
55 * struct i2c_atr_adap_desc - An ATR downstream bus descriptor
56 * @chan_id: Index of the new adapter (0 .. max_adapters-1). This value is
58 * @parent: The device used as the parent of the new i2c adapter, or NULL
59 * to use the i2c-atr device as the parent.
[all …]
/linux/drivers/i2c/busses/
H A Di2c-xiic.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * i2c-xiic.c
4 * Copyright (c) 2002-2007 Xilinx Inc.
5 * Copyright (c) 2009-2010 Intel Corporation
24 #include <linux/i2c.h>
27 #include <linux/platform_data/i2c-xiic.h>
36 #define DRIVER_NAME "xiic-i2c"
58 * struct xiic_i2c - Internal representation of the XIIC I2C bus
69 * @endianness: big/little-endian byte order
70 * @clk: Pointer to AXI4-lite input clock
[all …]
H A Di2c-img-scb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C adapter for the IMG Serial Control Bus (SCB) IP block.
7 * There are three ways that this I2C controller can be driven:
9 * - Raw control of the SDA and SCK signals.
15 * - Atomic commands. A low level I2C symbol (such as generate
20 * This mode of operation is used by MODE_ATOMIC, which uses an I2C
21 * state machine in the interrupt handler to compose/react to I2C
26 * in suboptimal use of the bus, with gaps between the I2C symbols while
29 * - Automatic mode. A bus address, and whether to read/write is
30 * specified, and the hardware takes care of the I2C state machine,
[all …]
H A Di2c-powermac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 i2c Support for Apple SMU Controller
14 #include <linux/i2c.h>
22 MODULE_DESCRIPTION("I2C driver for Apple PowerMac");
26 * SMBUS-type transfer entrypoint
62 buf = &data->byte; in i2c_powermac_smbus_xfer()
67 local[0] = data->word & 0xff; in i2c_powermac_smbus_xfer()
68 local[1] = (data->word >> 8) & 0xff; in i2c_powermac_smbus_xfer()
78 * anywhere near a pmac i2c bus anyway ... in i2c_powermac_smbus_xfer()
81 buf = data->block; in i2c_powermac_smbus_xfer()
[all …]
/linux/arch/mips/boot/dts/ingenic/
H A Djz4780.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
[all …]
H A Dx1830.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1830-cgu.h>
4 #include <dt-bindings/dma/x1830-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu2.0-mxu2.0";
21 clock-names = "cpu";
[all …]
/linux/arch/arc/boot/dts/
H A Dabilis_tb10x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
12 compatible = "abilis,arc-tb10x";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
28 compatible = "snps,arc-timer";
30 interrupt-parent = <&intc>;
36 compatible = "snps,arc-timer";
41 #address-cells = <1>;
[all …]
/linux/arch/mips/boot/dts/brcm/
H A Dbcm7420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7125.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7358.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
H A Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
/linux/arch/arm64/boot/dts/apple/
H A Dt600x-die0.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 nco: clock-controller@28e03c000 {
11 compatible = "apple,t6000-nco", "apple,nco";
14 #clock-cells = <1>;
17 aic: interrupt-controller@28e100000 {
18 compatible = "apple,t6000-aic", "apple,aic2";
19 #interrupt-cells = <4>;
20 interrupt-controller;
23 reg-names = "core", "event";
24 power-domains = <&ps_aic>;
[all …]
/linux/drivers/i2c/muxes/
H A Di2c-demux-pinctrl.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Pinctrl based I2C DeMultiplexer
5 * Copyright (C) 2015-16 by Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
6 * Copyright (C) 2015-16 by Renesas Electronics Corporation
9 * (look for filenames containing 'i2c-demux-pinctrl' in Documentation/)
12 #include <linux/i2c.h>
40 struct i2c_demux_pinctrl_priv *priv = adap->algo_data; in i2c_demux_master_xfer()
41 struct i2c_adapter *parent = priv->chan[priv->cur_chan].parent_adap; in i2c_demux_master_xfer() local
43 return __i2c_transfer(parent, msgs, num); in i2c_demux_master_xfer()
48 struct i2c_demux_pinctrl_priv *priv = adap->algo_data; in i2c_demux_functionality()
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-ampere-mtjade.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 * i2c bus 50-57 assigned to NVMe slot 0-7
24 * i2c bus 60-67 assigned to NVMe slot 8-15
36 * i2c bus 70-77 assigned to NVMe slot 16-23
48 * i2c bus 80-81 assigned to NVMe M2 slot 0-1
54 * i2c bus 82 assigned to OCP slot
[all …]
/linux/arch/loongarch/boot/dts/
H A Dloongson-2k0500.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
27 ref_100m: clock-ref-100m {
28 compatible = "fixed-clock";
[all …]
H A Dloongson-2k1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
35 ref_100m: clock-ref-100m {
[all …]

12345678910>>...42