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/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-arb-gpio-challenge.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-arb-gpio-challenge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based I2C Arbitration Using a Challenge & Response Mechanism
10 - Doug Anderson <dianders@chromium.org>
11 - Peter Rosin <peda@axentia.se>
15 the master of an I2C bus in a multimaster situation.
18 standard I2C multi-master rules. Using GPIOs is generally useful in the case
23 * It is nonstandard (not using standard I2C multimaster)
[all …]
H A Dnxp,pca9541.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/nxp,pca9541.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PCA9541 I2C bus master selector
10 - Peter Rosin <peda@axentia.se>
19 i2c-arb:
21 $ref: /schemas/i2c/i2c-controller.yaml
24 I2C arbitration bus node.
27 - compatible
[all …]
H A Di2c-mt65xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek I2C controller
10 This driver interfaces with the native I2C controller present in
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Qii Wang <qii.wang@mediatek.com>
22 - const: mediatek,mt2712-i2c
23 - const: mediatek,mt6577-i2c
[all …]
/linux/arch/mips/boot/dts/brcm/
H A Dbcm7435.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
[all …]
H A Dbcm7425.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7125.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7360.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
H A Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7362.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7358.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6797.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/clock/mt6797-clk.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/mt6797-pinfunc.h>
14 interrupt-parent = <&sysirq>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <1>;
[all …]
H A Dmt8183.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/gce/mt8183-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8183-larb-port.h>
13 #include <dt-bindings/power/mt8183-power.h>
14 #include <dt-bindings/reset/mt8183-resets.h>
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Dmt7981b.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 #include <dt-bindings/clock/mediatek,mt7981-clk.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/reset/mt7986-resets.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "arm,cortex-a53";
[all …]
/linux/drivers/i2c/muxes/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for multiplexer I2C chip drivers.
5 obj-$(CONFIG_I2C_ARB_GPIO_CHALLENGE) += i2c-arb-gpio-challenge.o
7 obj-$(CONFIG_I2C_DEMUX_PINCTRL) += i2c-demux-pinctrl.o
9 obj-$(CONFIG_I2C_MUX_GPIO) += i2c-mux-gpio.o
10 obj-$(CONFIG_I2C_MUX_GPMUX) += i2c-mux-gpmux.o
11 obj-$(CONFIG_I2C_MUX_LTC4306) += i2c-mux-ltc4306.o
12 obj-$(CONFIG_I2C_MUX_MLXCPLD) += i2c-mux-mlxcpld.o
13 obj-$(CONFIG_I2C_MUX_MULE) += i2c-mux-mule.o
14 obj-$(CONFIG_I2C_MUX_PCA9541) += i2c-mux-pca9541.o
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Multiplexer I2C chip drivers configuration
6 menu "Multiplexer I2C Chip support"
10 tristate "GPIO-based I2C arbitration"
15 I2C multimaster arbitration scheme using GPIOs and a challenge &
20 will be called i2c-arb-gpio-challenge.
23 tristate "GPIO-based I2C multiplexer"
27 GPIO based I2C multiplexer. This driver provides access to
28 I2C busses connected through a MUX, which is controlled
32 will be called i2c-mux-gpio.
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
30 stdout-path = "serial3:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-axg.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/axg-aoclkc.h>
7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-axg-gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
[all …]
H A Dmeson-g12b-bananapi-cm4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-g12b-a311d.dtsi"
7 #include <dt-bindings/gpio/meson-g12a-gpio.h>
16 stdout-path = "serial0:115200n8";
19 emmc_pwrseq: emmc-pwrseq {
20 compatible = "mmc-pwrseq-emmc";
21 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
29 sdio_pwrseq: sdio-pwrseq {
30 compatible = "mmc-pwrseq-simple";
31 reset-gpios = <&gpio GPIOAO_6 GPIO_ACTIVE_LOW>;
[all …]
/linux/drivers/i2c/busses/
H A Di2c-iop3xx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* ------------------------------------------------------------------------- */
3 /* i2c-iop3xx.h algorithm driver definitions private to i2c-iop3xx.c */
4 /* ------------------------------------------------------------------------- */
5 /* Copyright (C) 2003 Peter Milne, D-TACQ Solutions Ltd
9 /* ------------------------------------------------------------------------- */
21 #define IOP3XX_ICR_ALD_IE 0x1000 /* 1=Arb Loss Detect Interrupt Enable */
29 * when sending a master mode general call message from the I2C unit"
33 * "NOTE: To avoid I2C bus integrity problems,
34 * the user needs to ensure that the GPIO Output Data Register -
[all …]
H A Di2c-altera.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on the i2c-axxia.c driver.
10 #include <linux/i2c.h>
30 #define ALTR_I2C_ISER_ARB_EN BIT(3) /* Enable ARB LOST IRQ */
36 #define ALTR_I2C_ISR_ARB BIT(3) /* ARB LOST IRQ */
58 * struct altr_i2c_dev - I2C device context
65 * @adapter: core i2c abstraction
66 * @i2c_clk: clock reference for i2c input clock
67 * @bus_clk_rate: current i2c bus clock rate
96 int_en = readl(idev->base + ALTR_I2C_ISER); in altr_i2c_int_enable()
[all …]
H A Di2c-hix5hd2.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/i2c.h>
72 HIX5I2C_STAT_RW_ERR = -1,
97 u32 val = readl_relaxed(priv->regs + HIX5I2C_SR); in hix5hd2_i2c_clr_pend_irq()
99 writel_relaxed(val, priv->regs + HIX5I2C_ICR); in hix5hd2_i2c_clr_pend_irq()
106 writel_relaxed(I2C_CLEAR_ALL, priv->regs + HIX5I2C_ICR); in hix5hd2_i2c_clr_all_irq()
111 writel_relaxed(0, priv->regs + HIX5I2C_CTRL); in hix5hd2_i2c_disable_irq()
117 priv->regs + HIX5I2C_CTRL); in hix5hd2_i2c_enable_irq()
125 /* close all i2c interrupt */ in hix5hd2_i2c_drv_setrate()
126 val = readl_relaxed(priv->regs + HIX5I2C_CTRL); in hix5hd2_i2c_drv_setrate()
[all …]
H A Di2c-mt65xx.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
14 #include <linux/i2c.h>
85 #define I2C_DRV_NAME "i2c-mt65xx"
88 * enum i2c_mt65xx_clks - Clocks enumeration for MT65XX I2C
90 * @I2C_MT65XX_CLK_MAIN: main clock for i2c bus
91 * @I2C_MT65XX_CLK_DMA: DMA clock for i2c via DMA
92 * @I2C_MT65XX_CLK_PMIC: PMIC clock for i2c from PMIC
93 * @I2C_MT65XX_CLK_ARB: Arbitrator clock for i2c
105 "main", "dma", "pmic", "arb"
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-arm-stardragon4800-rep2.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
9 compatible = "hxt,stardragon4800-rep2-bmc", "aspeed,ast2500";
12 stdout-path = &uart5;
20 iio-hwmon {
21 compatible = "iio-hwmon";
22 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
26 iio-hwmon-battery {
[all …]
H A Daspeed-bmc-opp-zaius.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ingrasys,zaius-bmc", "aspeed,ast2500";
19 stdout-path = &uart5;
27 reserved-memory {
28 #address-cells = <1>;
29 #size-cells = <1>;
33 no-map;
[all …]

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