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/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-arb-gpio-challenge.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-arb-gpio-challenge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based I2C Arbitration Using a Challenge & Response Mechanism
10 - Doug Anderson <dianders@chromium.org>
11 - Peter Rosin <peda@axentia.se>
15 the master of an I2C bus in a multimaster situation.
18 standard I2C multi-master rules. Using GPIOs is generally useful in the case
23 * It is nonstandard (not using standard I2C multimaster)
[all …]
H A Dnxp,pca9541.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/nxp,pca9541.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PCA9541 I2C bus master selector
10 - Peter Rosin <peda@axentia.se>
19 i2c-arb:
21 $ref: /schemas/i2c/i2c-controller.yaml
24 I2C arbitration bus node.
27 - compatible
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-delta-ahe50dc.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g4.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
9 compatible = "regulator-output"; \
10 vout-supply = <&efuse##n>; \
19 shunt-resistor-micro-ohms = <675>; \
22 regulator-name = __stringify(efuse##num##-reg); \
28 model = "Delta Power AHE-50DC";
29 compatible = "delta,ahe50dc-bmc", "aspeed,ast2400";
[all …]
/linux/arch/mips/boot/dts/brcm/
H A Dbcm7125.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7425.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7360.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
H A Dbcm7435.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
[all …]
H A Dbcm7420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7362.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
H A Dbcm7358.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
/linux/drivers/i2c/muxes/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for multiplexer I2C chip drivers.
5 obj-$(CONFIG_I2C_ARB_GPIO_CHALLENGE) += i2c-arb-gpio-challenge.o
7 obj-$(CONFIG_I2C_DEMUX_PINCTRL) += i2c-demux-pinctrl.o
9 obj-$(CONFIG_I2C_MUX_GPIO) += i2c-mux-gpio.o
10 obj-$(CONFIG_I2C_MUX_GPMUX) += i2c-mux-gpmux.o
11 obj-$(CONFIG_I2C_MUX_LTC4306) += i2c-mux-ltc4306.o
12 obj-$(CONFIG_I2C_MUX_MLXCPLD) += i2c-mux-mlxcpld.o
13 obj-$(CONFIG_I2C_MUX_MULE) += i2c-mux-mule.o
14 obj-$(CONFIG_I2C_MUX_PCA9541) += i2c-mux-pca9541.o
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Multiplexer I2C chip drivers configuration
6 menu "Multiplexer I2C Chip support"
10 tristate "GPIO-based I2C arbitration"
15 I2C multimaster arbitration scheme using GPIOs and a challenge &
20 will be called i2c-arb-gpio-challenge.
23 tristate "GPIO-based I2C multiplexer"
27 GPIO based I2C multiplexer. This driver provides access to
28 I2C busses connected through a MUX, which is controlled
32 will be called i2c-mux-gpio.
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
30 stdout-path = "serial3:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
[all …]
/linux/drivers/i2c/busses/
H A Di2c-iop3xx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* ------------------------------------------------------------------------- */
3 /* i2c-iop3xx.h algorithm driver definitions private to i2c-iop3xx.c */
4 /* ------------------------------------------------------------------------- */
5 /* Copyright (C) 2003 Peter Milne, D-TACQ Solutions Ltd
9 /* ------------------------------------------------------------------------- */
21 #define IOP3XX_ICR_ALD_IE 0x1000 /* 1=Arb Loss Detect Interrupt Enable */
29 * when sending a master mode general call message from the I2C unit"
33 * "NOTE: To avoid I2C bus integrity problems,
34 * the user needs to ensure that the GPIO Output Data Register -
[all …]
H A Di2c-hix5hd2.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/i2c.h>
72 HIX5I2C_STAT_RW_ERR = -1,
97 u32 val = readl_relaxed(priv->regs + HIX5I2C_SR); in hix5hd2_i2c_clr_pend_irq()
99 writel_relaxed(val, priv->regs + HIX5I2C_ICR); in hix5hd2_i2c_clr_pend_irq()
106 writel_relaxed(I2C_CLEAR_ALL, priv->regs + HIX5I2C_ICR); in hix5hd2_i2c_clr_all_irq()
111 writel_relaxed(0, priv->regs + HIX5I2C_CTRL); in hix5hd2_i2c_disable_irq()
117 priv->regs + HIX5I2C_CTRL); in hix5hd2_i2c_enable_irq()
125 /* close all i2c interrupt */ in hix5hd2_i2c_drv_setrate()
126 val = readl_relaxed(priv->regs + HIX5I2C_CTRL); in hix5hd2_i2c_drv_setrate()
[all …]
H A Di2c-mt65xx.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
14 #include <linux/i2c.h>
85 #define I2C_DRV_NAME "i2c-mt65xx"
88 * enum i2c_mt65xx_clks - Clocks enumeration for MT65XX I2C
90 * @I2C_MT65XX_CLK_MAIN: main clock for i2c bus
91 * @I2C_MT65XX_CLK_DMA: DMA clock for i2c via DMA
92 * @I2C_MT65XX_CLK_PMIC: PMIC clock for i2c from PMIC
93 * @I2C_MT65XX_CLK_ARB: Arbitrator clock for i2c
105 "main", "dma", "pmic", "arb"
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12b-bananapi-cm4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-g12b-a311d.dtsi"
7 #include <dt-bindings/gpio/meson-g12a-gpio.h>
16 stdout-path = "serial0:115200n8";
19 emmc_pwrseq: emmc-pwrseq {
20 compatible = "mmc-pwrseq-emmc";
21 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
29 sdio_pwrseq: sdio-pwrseq {
30 compatible = "mmc-pwrseq-simple";
31 reset-gpios = <&gpio GPIOAO_6 GPIO_ACTIVE_LOW>;
[all …]
H A Dmeson-g12a-u200.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
12 #include <dt-bindings/sound/meson-g12a-toacodec.h>
23 dioo2133: audio-amplifier-0 {
24 compatible = "simple-audio-amplifier";
25 enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
[all …]
H A Dmeson-g12b-bananapi.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
21 stdout-path = "serial0:115200n8";
29 adc-keys {
30 compatible = "adc-keys";
31 io-channels = <&saradc 2>;
32 io-channel-names = "buttons";
[all …]
/linux/Documentation/i2c/
H A Di2c-topology.rst2 I2C muxes and complex topologies
5 There are a couple of reasons for building more complex I2C topologies
6 than a straight-forward I2C bus with one adapter and one or more devices.
16 from the I2C bus, at least most of the time, and sits behind a gate
19 Several types of hardware components such as I2C muxes, I2C gates and I2C
22 These components are represented as I2C adapter trees by Linux, where
25 I2C transfers, and all adapters with a parent are part of an "i2c-mux"
29 an I2C transfer on one of its child adapters. The mux driver can
39 There are two variants of locking available to I2C muxes, they can be
40 mux-locked or parent-locked muxes.
[all …]
/linux/drivers/i2c/algos/
H A Di2c-algo-bit.c1 // SPDX-License-Identifier: GPL-2.0+
3 * i2c-algo-bit.c: i2c driver algorithms for bit-shift adapters
5 * Copyright (C) 1995-2000 Simon G. Vogl
16 #include <linux/i2c.h>
17 #include <linux/i2c-algo-bit.h>
20 /* ----- global defines ----------------------------------------------- */
33 /* ----- global variables --------------------------------------------- */
35 static int bit_test; /* see if the line-setting functions work */
37 MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");
43 "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");
[all …]
/linux/drivers/net/ethernet/marvell/
H A Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
169 IS_PA_TO_RX1 = 1<<29, /* Packet Arb Timeout Rx1 */
170 IS_PA_TO_RX2 = 1<<28, /* Packet Arb Timeout Rx2 */
171 IS_PA_TO_TX1 = 1<<27, /* Packet Arb Timeout Tx1 */
172 IS_PA_TO_TX2 = 1<<26, /* Packet Arb Timeout Tx2 */
173 IS_I2C_READY = 1<<25, /* IRQ on end of I2C Tx */
262 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */
[all …]
/linux/drivers/hid/intel-thc-hid/intel-thc/
H A Dintel-thc-hw.h1 /* SPDX-License-Identifier: GPL-2.0 */
224 /* THC Register for SW I2C Wtite Sequecning control */
236 /* THC Register for SW I2C Wtite Sequecning control */
650 /* ARB policy definition */
703 * @THC_PIO_OP_I2C_SUBSYSTEM_READ: THC opcode for read I2C subsystem registers
704 * @THC_PIO_OP_I2C_SUBSYSTEM_WRITE: THC opcode for write I2C subsystem registers
705 * @THC_PIO_OP_I2C_TIC_READ: THC opcode for read I2C device
706 * @THC_PIO_OP_I2C_TIC_WRITE: THC opcode for write I2C device
707 * @THC_PIO_OP_I2C_TIC_WRITE_AND_READ: THC opcode for write followed by read I2C device
721 * @THC_SINGLE_IO: single IO mode, 1(opcode) - 1(address) - 1(data)
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm6125.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,dispcc-sm6125.h>
7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
16 interrupt-parent = <&intc>;
[all …]

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