Lines Matching +full:i2c +full:- +full:arb

1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
47 #interrupt-cells = <1>;
52 compatible = "fixed-clock";
53 #clock-cells = <0>;
54 clock-frequency = <81000000>;
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <27000000>;
65 #address-cells = <1>;
66 #size-cells = <1>;
68 compatible = "simple-bus";
71 periph_intc: interrupt-controller@41b500 {
72 compatible = "brcm,bcm7038-l1-intc";
76 interrupt-controller;
77 #interrupt-cells = <1>;
79 interrupt-parent = <&cpu_intc>;
83 sun_l2_intc: interrupt-controller@403000 {
84 compatible = "brcm,l2-intc";
86 interrupt-controller;
87 #interrupt-cells = <1>;
88 interrupt-parent = <&periph_intc>;
92 gisb-arb@400000 {
93 compatible = "brcm,bcm7435-gisb-arb";
95 native-endian;
96 interrupt-parent = <&sun_l2_intc>;
98 brcm,gisb-arb-master-mask = <0xf77f>;
99 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "webcpu_0",
108 upg_irq0_intc: interrupt-controller@406780 {
109 compatible = "brcm,bcm7120-l2-intc";
112 brcm,int-map-mask = <0x44>, <0x7000000>;
113 brcm,int-fwd-mask = <0x70000>;
115 interrupt-controller;
116 #interrupt-cells = <1>;
118 interrupt-parent = <&periph_intc>;
120 interrupt-names = "upg_main", "upg_bsc";
123 upg_aon_irq0_intc: interrupt-controller@409480 {
124 compatible = "brcm,bcm7120-l2-intc";
127 brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
128 brcm,int-fwd-mask = <0>;
129 brcm,irq-can-wake;
131 interrupt-controller;
132 #interrupt-cells = <1>;
134 interrupt-parent = <&periph_intc>;
136 interrupt-names = "upg_main_aon", "upg_bsc_aon",
141 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
143 native-endian;
147 compatible = "brcm,brcmstb-reboot";
154 reg-io-width = <0x4>;
155 reg-shift = <0x2>;
156 interrupt-parent = <&periph_intc>;
165 reg-io-width = <0x4>;
166 reg-shift = <0x2>;
167 interrupt-parent = <&periph_intc>;
176 reg-io-width = <0x4>;
177 reg-shift = <0x2>;
178 interrupt-parent = <&periph_intc>;
184 bsca: i2c@406300 {
185 clock-frequency = <390000>;
186 compatible = "brcm,brcmstb-i2c";
187 interrupt-parent = <&upg_irq0_intc>;
190 interrupt-names = "upg_bsca";
194 bscb: i2c@409400 {
195 clock-frequency = <390000>;
196 compatible = "brcm,brcmstb-i2c";
197 interrupt-parent = <&upg_aon_irq0_intc>;
200 interrupt-names = "upg_bscb";
204 bscc: i2c@406200 {
205 clock-frequency = <390000>;
206 compatible = "brcm,brcmstb-i2c";
207 interrupt-parent = <&upg_irq0_intc>;
210 interrupt-names = "upg_bscc";
214 bscd: i2c@406280 {
215 clock-frequency = <390000>;
216 compatible = "brcm,brcmstb-i2c";
217 interrupt-parent = <&upg_irq0_intc>;
220 interrupt-names = "upg_bscd";
224 bsce: i2c@409180 {
225 clock-frequency = <390000>;
226 compatible = "brcm,brcmstb-i2c";
227 interrupt-parent = <&upg_aon_irq0_intc>;
230 interrupt-names = "upg_bsce";
235 compatible = "brcm,bcm7038-pwm";
237 #pwm-cells = <2>;
243 compatible = "brcm,bcm7038-pwm";
245 #pwm-cells = <2>;
252 compatible = "brcm,bcm7038-wdt";
257 aon_pm_l2_intc: interrupt-controller@408440 {
258 compatible = "brcm,l2-intc";
260 interrupt-controller;
261 #interrupt-cells = <1>;
262 interrupt-parent = <&periph_intc>;
264 brcm,irq-can-wake;
268 compatible = "brcm,brcmstb-aon-ctrl";
270 reg-names = "aon-ctrl", "aon-sram";
274 compatible = "brcm,brcmstb-timers";
279 compatible = "brcm,brcmstb-gpio";
281 #gpio-cells = <2>;
282 #interrupt-cells = <2>;
283 gpio-controller;
284 interrupt-controller;
285 interrupt-parent = <&upg_irq0_intc>;
287 brcm,gpio-bank-widths = <32 32 32 21>;
291 compatible = "brcm,brcmstb-gpio";
293 #gpio-cells = <2>;
294 #interrupt-cells = <2>;
295 gpio-controller;
296 interrupt-controller;
297 interrupt-parent = <&upg_aon_irq0_intc>;
299 interrupts-extended = <&upg_aon_irq0_intc 6>,
301 wakeup-source;
302 brcm,gpio-bank-widths = <18 4>;
306 phy-mode = "internal";
307 phy-handle = <&phy1>;
308 mac-address = [ 00 10 18 36 23 1a ];
309 compatible = "brcm,genet-v3";
310 #address-cells = <0x1>;
311 #size-cells = <0x1>;
314 interrupt-parent = <&periph_intc>;
318 compatible = "brcm,genet-mdio-v3";
319 #address-cells = <0x1>;
320 #size-cells = <0x0>;
323 phy1: ethernet-phy@1 {
324 max-speed = <100>;
326 compatible = "brcm,40nm-ephy",
327 "ethernet-phy-ieee802.3-c22";
333 compatible = "brcm,bcm7435-ehci", "generic-ehci";
335 native-endian;
336 interrupt-parent = <&periph_intc>;
342 compatible = "brcm,bcm7435-ohci", "generic-ohci";
344 native-endian;
345 no-big-frame-no;
346 interrupt-parent = <&periph_intc>;
352 compatible = "brcm,bcm7435-ehci", "generic-ehci";
354 native-endian;
355 interrupt-parent = <&periph_intc>;
361 compatible = "brcm,bcm7435-ohci", "generic-ohci";
363 native-endian;
364 no-big-frame-no;
365 interrupt-parent = <&periph_intc>;
371 compatible = "brcm,bcm7435-ehci", "generic-ehci";
373 native-endian;
374 interrupt-parent = <&periph_intc>;
380 compatible = "brcm,bcm7435-ohci", "generic-ohci";
382 native-endian;
383 no-big-frame-no;
384 interrupt-parent = <&periph_intc>;
390 compatible = "brcm,bcm7435-ehci", "generic-ehci";
392 native-endian;
393 interrupt-parent = <&periph_intc>;
399 compatible = "brcm,bcm7435-ohci", "generic-ohci";
401 native-endian;
402 no-big-frame-no;
403 interrupt-parent = <&periph_intc>;
408 hif_l2_intc: interrupt-controller@41b000 {
409 compatible = "brcm,l2-intc";
411 interrupt-controller;
412 #interrupt-cells = <1>;
413 interrupt-parent = <&periph_intc>;
418 compatible = "brcm,brcmnand-v6.2", "brcm,brcmnand";
419 #address-cells = <1>;
420 #size-cells = <0>;
421 reg-names = "nand", "flash-dma";
423 interrupt-parent = <&hif_l2_intc>;
425 interrupt-names = "nand_ctlrdy", "flash_dma_done";
430 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
431 reg-names = "ahci", "top-ctrl";
433 interrupt-parent = <&periph_intc>;
435 #address-cells = <1>;
436 #size-cells = <0>;
439 sata0: sata-port@0 {
444 sata1: sata-port@1 {
450 sata_phy: sata-phy@180100 {
451 compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
453 reg-names = "phy";
454 #address-cells = <1>;
455 #size-cells = <0>;
458 sata_phy0: sata-phy@0 {
460 #phy-cells = <0>;
463 sata_phy1: sata-phy@1 {
465 #phy-cells = <0>;
470 compatible = "brcm,bcm7425-sdhci";
472 interrupt-parent = <&periph_intc>;
474 sd-uhs-sdr50;
475 mmc-hs200-1_8v;
480 compatible = "brcm,bcm7425-sdhci";
482 interrupt-parent = <&periph_intc>;
484 sd-uhs-sdr50;
485 mmc-hs200-1_8v;
489 spi_l2_intc: interrupt-controller@41bd00 {
490 compatible = "brcm,l2-intc";
492 interrupt-controller;
493 #interrupt-cells = <1>;
494 interrupt-parent = <&periph_intc>;
499 #address-cells = <0x1>;
500 #size-cells = <0x0>;
501 compatible = "brcm,spi-bcm-qspi",
502 "brcm,spi-brcmstb-qspi";
505 reg-names = "cs_reg", "hif_mspi", "bspi";
507 interrupt-parent = <&spi_l2_intc>;
508 interrupt-names = "spi_lr_fullness_reached",
519 #address-cells = <1>;
520 #size-cells = <0>;
521 compatible = "brcm,spi-bcm-qspi",
522 "brcm,spi-brcmstb-mspi";
525 reg-names = "mspi";
527 interrupt-parent = <&upg_aon_irq0_intc>;
528 interrupt-names = "mspi_done";
533 compatible = "brcm,brcmstb-waketimer";
536 interrupt-parent = <&aon_pm_l2_intc>;
537 interrupt-names = "timer";
544 compatible = "simple-bus";
546 #address-cells = <1>;
547 #size-cells = <1>;
549 memory-controller@0 {
550 compatible = "brcm,brcmstb-memc", "simple-bus";
552 #address-cells = <1>;
553 #size-cells = <1>;
555 memc-arb@1000 {
556 compatible = "brcm,brcmstb-memc-arb";
560 memc-ddr@2000 {
561 compatible = "brcm,brcmstb-memc-ddr";
565 ddr-phy@6000 {
566 compatible = "brcm,brcmstb-ddr-phy";
571 compatible = "brcm,brcmstb-ddr-shimphy";
576 memory-controller@1 {
577 compatible = "brcm,brcmstb-memc", "simple-bus";
579 #address-cells = <1>;
580 #size-cells = <1>;
582 memc-arb@1000 {
583 compatible = "brcm,brcmstb-memc-arb";
587 memc-ddr@2000 {
588 compatible = "brcm,brcmstb-memc-ddr";
592 ddr-phy@6000 {
593 compatible = "brcm,brcmstb-ddr-phy";
598 compatible = "brcm,brcmstb-ddr-shimphy";
606 compatible = "brcm,bcm7435-pcie";
614 aspm-no-l0s;
616 msi-controller;
617 msi-parent = <&pcie_0>;
618 #address-cells = <0x3>;
619 #size-cells = <0x2>;
620 bus-range = <0x0 0xff>;
621 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
622 linux,pci-domain = <0x0>;
624 interrupt-parent = <&periph_intc>;
626 interrupt-names = "pcie", "msi";
627 #interrupt-cells = <0x1>;
628 interrupt-map = <0 0 0 1 &periph_intc 0x23