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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Driscv,imsics.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/riscv,imsics.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V Incoming MSI Controller (IMSIC)
10 - Anup Patel <anup@brainfault.org>
13 The RISC-V advanced interrupt architecture (AIA) defines a per-CPU incoming
14 MSI controller (IMSIC) for handling MSIs in a RISC-V platform. The RISC-V
15 AIA specification can be found at https://github.com/riscv/riscv-aia.
17 The IMSIC is a per-CPU (or per-HART) device with separate interrupt file
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/freebsd/sys/contrib/xen/
H A Dxen.h4 * Guest OS interface to Xen.
30 #include "xen-compat.h"
33 #include "arch-x86/xen.h"
35 #include "arch-arm.h"
41 /* Guest handles for primitive C types. */
135 /* Architecture-specific hypercall definitions. */
157 /* New event-channel and physdev hypercalls introduced in 0x00030202. */
173 * Virtual interrupts that a guest OS may receive from Xen.
175 * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a
176 * global VIRQ. The former can be bound once per VCPU and cannot be re-bound.
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H A Dvm_event.h53 * Emulate the fault-causing instruction (if set in the event response flags).
54 * This will allow the guest to continue execution without lifting the page
79 * Currently only useful for MSR and control-register write events.
95 * At the moment x86-only, applies to EAX-EDX, ESP, EBP, ESI, EDI, R8-R15,
109 * Have a one-shot VM_EVENT_REASON_INTERRUPT event sent for the first
149 /* Single-step (e.g. MTF) */
160 * As this behavior is CPU-specific, users are advised to not rely on it.
171 /* Supported values for the vm_event_write_ctrlreg index. */
177 /* The limit field is right-shifted by 12 bits if .ar.g is set. */
222 * VM. npt_base is the guest physical address of the L1 hypervisors
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H A Dmemory.h44 * Maximum # bits addressable by the user of the allocated region (e.g., I/O
45 * devices often have a 32-bit limitation even in 64-bit systems). If zero
53 #define XENMEMF_get_node(x) ((((x) >> 8) - 1) & 0xffu)
54 /* Flag to populate physmap with populate-on-demand entries */
101 * @out.extent_list provides GMFNs of the newly-allocated memory.
136 * command will be non-zero.
158 * specified domain (may be DOMID_SELF). Returns -ve errcode on failure.
166 * Returns -ve errcode on failure.
213 * map it by default into guest address space, do not implement this command.
234 Stage-2 using the Normal Memory
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H A Dtmem.h4 * Guest OS interface to Xen Transcendent Memory.
54 /* Bits for HYPERVISOR_tmem_op(TMEM_NEW_POOL) */
64 /* Bits for client flags (save/restore) */
98 uint32_t index; member
117 * c-file-style: "BSD"
118 * c-basic-offset: 4
119 * tab-width: 4
120 * indent-tabs-mode: nil
H A Ddomctl.h24 * Copyright (c) 2002-2003, B Dragovic
25 * Copyright (c) 2002-2006, K Fraser
46 * an id is auto-allocated and returned.
53 /* Is this an HVM guest (as opposed to a PV guest)? */
56 /* Use hardware-assisted paging if available? */
62 /* Disable out-of-sync shadow page tables? */
73 /* Should we expose the vPMU to the guest? */
91 * (global mapping space, xenheap, etc) a guest may consume. For
100 /* Grant version, use low 4 bits. */
106 /* Per-vCPU buffer size in bytes. 0 to disable. */
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H A Dphysdev.h32 * @args == Operation-specific extra arguments (NULL if none).
36 * Notify end-of-interrupt (EOI) for the specified IRQ.
48 * Register a shared page for the hypervisor to indicate whether the guest
50 * once the guest used this function in that the associated event channel
57 * guest must issue PHYSDEVOP_eoi. This hypercall is very similar to
105 * Set the current VCPU's I/O-port permissions bitmap.
122 * Read or write an IO-APIC register.
164 int index; member
167 /* IN - high 16 bits hold segment for ..._MSI_SEG and ..._MULTI_MSI */
312 * MSI-X capable devices won't (prepare) or may (release) change.
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H A Dsysctl.h24 * Copyright (c) 2002-2006, K Fraser
45 /* IN: Non-zero -> clear after reading. */
47 /* IN: Non-zero -> start index specified by @index field. */
51 * IN: Start index for consuming from ring buffer (if @incremental);
52 * OUT: End index after consuming from ring buffer.
54 uint32_t index; member
142 /* Sub-operations: */
204 int32_t node; /* NUMA node of interest (-1 for all nodes). */
240 * Indexing is 1-biased (PC1/CC1 being at index 0).
278 * every non-primary sibling thread (those with a thread id which is not
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/freebsd/sys/dev/virtio/
H A Dvirtio_config.h1 /*-
32 /* Status byte for guest to report progress. */
59 /* Support to suppress interrupt until specific index is reached. */
63 * The guest should never negotiate this feature; it
72 * If clear - device has the IOMMU bypass quirk feature.
73 * If set - use platform tools to detect the IOMMU.
81 * Some VirtIO feature bits (currently bits 28 through 34) are
83 * rest are per-device feature bits.
/freebsd/sys/contrib/xen/hvm/
H A Dparams.h51 * How should CPU0 event-channel notifications be delivered?
53 * If val == 0 then CPU0 event-channel notifications are not delivered.
79 * val[15:8] is interrupt flag of the PPI used by event-channel:
82 * val[7:0] is a PPI number used by event-channel.
91 * These are not used by Xen. They are here for convenience of HVM-guest
106 …* (See http://download.microsoft.com/download/A/B/4/AB43A34E-BDD0-4FA6-BDEF-79EEF16E880B/Hyperviso…
108 * To expose viridian enlightenments to the guest set this parameter
116 * - Hypercall MSRs (HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL)
117 * - APIC access MSRs (HV_X64_MSR_EOI, HV_X64_MSR_ICR and HV_X64_MSR_TPR)
118 * - Virtual Processor index MSR (HV_X64_MSR_VP_INDEX)
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H A Ddm_op.h68 /* IN - should server handle buffered ioreqs */
71 /* OUT - server id */
83 * specified in the per-CPU ioreq structures).
86 * buffered ioreq ring (if it exists) from guest memory. If <flags> does
99 /* IN - server id */
101 /* IN - flags */
107 /* OUT - buffered ioreq port */
109 /* OUT - sync ioreq gfn (see block comment above) */
111 /* OUT - buffered ioreq gfn (see block comment above)*/
139 /* IN - server id */
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/freebsd/sys/amd64/vmm/amd/
H A Dsvm.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
110 static MALLOC_DEFINE(M_SVM_VLAPIC, "svm-vlapic", "svm-vlapic");
269 asid[cpu].num = nasid - 1; in svm_modinit()
301 ctrl->tsc_offset = offset; in svm_set_tsc_offset()
306 vm_set_tsc_offset(vcpu->vcpu, offset); in svm_set_tsc_offset()
330 switch (paging->cpu_mode) { in svm_get_cs_info()
348 * Get the index and bit position for a MSR in permission bitmap.
349 * Two bits are used for each MSR: lower bit for read and higher bit for write.
352 svm_msr_index(uint64_t msr, int *index, int *bit) in svm_msr_index() argument
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/freebsd/usr.sbin/bhyve/
H A Dqemu_fwcfg.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
65 uint16_t index : 14; member
69 uint16_t bits; member
126 return (-1); in qemu_fwcfg_selector_port_handler()
130 *eax = htole16(fwcfg_sc.selector.bits); in qemu_fwcfg_selector_port_handler()
135 fwcfg_sc.selector.bits = le16toh(*eax); in qemu_fwcfg_selector_port_handler()
148 return (-1); in qemu_fwcfg_data_port_handler()
154 return (-1); in qemu_fwcfg_data_port_handler()
160 [fwcfg_sc.selector.index]; in qemu_fwcfg_data_port_handler()
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H A Dvirtio.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
58 * front of virtio-based device softc" constraint, let's use
76 vs->vs_vc = vc; in vi_softc_linkup()
77 vs->vs_pi = pi; in vi_softc_linkup()
78 pi->pi_arg = vs; in vi_softc_linkup()
80 vs->vs_queues = queues; in vi_softc_linkup()
81 for (i = 0; i < vc->vc_nvq; i++) { in vi_softc_linkup()
88 * Reset device (device-wide). This erases all queues, i.e.,
94 * If MSI-X is enabled, this also resets all the vectors to NO_VECTOR.
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/freebsd/sys/contrib/xen/arch-x86/hvm/
H A Dsave.h3 * be saved along with the domain's memory and device-model state.
43 uint32_t gtsc_khz; /* Guest's TSC frequency in kHz */
53 * - Pre-3.4 didn't have msr_tsc_aux
54 * - Pre-4.7 didn't have fpu_initialised
148 /* guest's idea of what rdtsc() would return */
262 /* guest's idea of what rdtsc() would return */
291 * be able to do the modification in-place. in _hvm_hw_fix_cpu()
293 ucpu->nat.error_code = ucpu->cmp.error_code; in _hvm_hw_fix_cpu()
294 ucpu->nat.pending_event = ucpu->cmp.pending_event; in _hvm_hw_fix_cpu()
295 ucpu->nat.tsc = ucpu->cmp.tsc; in _hvm_hw_fix_cpu()
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/freebsd/sys/dev/bnxt/bnxt_en/
H A Dhsi_struct_def.h1 /*-
34 * Copyright(c) 2001-2025, Broadcom. All rights reserved. The
71 * * 0x0-0xFFF8 - The function ID
72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
73 * * 0xFFFD - Reserved for user-space HWRM interface
74 * * 0xFFFF - HWRM
80 * physical address (HPA) or a guest physical address (GPA) and must
122 /* Engine CKV - The Alias key EC curve and ECC public key information. */
124 /* Engine CKV - Initialization vector. */
126 /* Engine CKV - Authentication tag. */
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/freebsd/sys/dev/qat/qat_api/include/
H A Dcpa_dev.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2025 Intel Corporation */
57 * - bits<2:0> represent the function number.
58 * - bits<7:3> represent the device
59 * - bits<15:8> represent the bus
91 * If used on the guest, it will return the number of function mapped
99 * Returns device information for a given device index.
102 * Returns device information for a given device index. This API must
/freebsd/sys/dev/gve/
H A Dgve_adminq.h1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2023-2024 Google LLC
223 #define GVE_CAP2(a) BIT(((int) a) - 64)
224 #define GVE_CAP3(a) BIT(((int) a) - 128)
225 #define GVE_CAP4(a) BIT(((int) a) - 192)
228 * The following four defines describe 256 compatibility bits.
229 * Only a few bits (as shown in `gve_driver_compatibility`) are currently
312 __be32 index; member
333 __be32 db_index; /* Device -> Guest */
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/freebsd/sys/amd64/vmm/io/
H A Dvrtc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
71 uint8_t nvram2[128 - 51];
86 #define VRTC_LOCK(vrtc) mtx_lock(&((vrtc)->mtx))
87 #define VRTC_UNLOCK(vrtc) mtx_unlock(&((vrtc)->mtx))
88 #define VRTC_LOCKED(vrtc) mtx_owned(&((vrtc)->mtx))
92 * - RTC updates are halted by the guest
93 * - RTC date/time fields have invalid values
95 #define VRTC_BROKEN_TIME ((time_t)-1)
100 #define rtc_halted(vrtc) ((vrtc->rtcdev.reg_b & RTCSB_HALT) != 0)
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/freebsd/sys/amd64/vmm/intel/
H A Dvmx.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
167 "HLT triggers a VM-exit");
171 0, "PAUSE triggers a VM-exit");
175 0, "WBINVD triggers a VM-exit");
212 static int pirvec = -1;
422 return "mce-during-entry"; in exit_reason_to_str()
426 return "apic-access"; in exit_reason_to_str()
448 return "apic-write"; in exit_reason_to_str()
464 * Allow readonly access to the following x2APIC MSRs from the guest. in vmx_allow_x2apic_msrs()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrFormats.td1 //===-- MipsInstrFormats.td - Mips Instruction Formats -----*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
14 // opcode - operation code.
15 // rs - src reg.
16 // rt - dst reg (on a 2 regs instr) or src reg (on a 3 reg instr).
17 // rd - dst reg, only used on 3 regs instr.
18 // shamt - only used on shift instructions, contains the shift amount.
19 // funct - combined with opcode field give us an operation code.
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/freebsd/sys/contrib/edk2/Include/Library/
H A DBaseLib.h3 functions, file path functions, and CPU architecture-specific functions.
5 Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
6 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
10 Copyright (c) 2023 - 2024, Arm Limited. All rights reserved.<BR>
12 SPDX-License-Identifier: BSD-2-Clause-Patent
20 // Definitions for architecture-specific types
24 /// The IA-32 architecture context buffer used by SetJump() and LongJump().
56 UINT8 XmmBuffer[160]; ///< XMM6-XMM15.
220 /// The RISC-V architecture context buffer used by SetJump() and LongJump().
302 RISC-V invalidate instruction cache.
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/freebsd/share/doc/papers/devfs/
H A Dpaper.me1 .\" format with ditroff -me
19 .ip \0\s-2\(bu\s+2
29 .i "Poul-Henning Kamp"
43 Starting from a high-level view of devices and the semantics that
45 grand tour of the redesigned FreeBSD device-I/O system,
99 disk-pack with a filesystem: selling pre-initialised and ``quality
100 tested'' disk-packs was quite a profitable business.
112 device would be inode number 5, the paper-tape-punch number 6 and so on,
119 device numbers to index though the devsw array to the correct device driver.
122 in most UNIX-like systems even to this day.
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/freebsd/sys/amd64/vmm/
H A Dvmm_instruction_emul.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
69 #define VIE_OP_F_IMM (1 << 0) /* 16/32-bit immediate operand */
70 #define VIE_OP_F_IMM8 (1 << 1) /* 8-bit immediate operand */
71 #define VIE_OP_F_MOFFSET (1 << 2) /* 16/32/64-bit immediate moffset */
188 /* XXX Group 11 extended opcode - not just MOV */
221 /* XXX Group 1A extended opcode - not just POP */
226 /* XXX Group 3 extended opcode - not just TEST */
232 /* XXX Group 3 extended opcode - not just TEST */
238 /* XXX Group 5 extended opcode - not just PUSH */
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/freebsd/sys/contrib/xen/io/
H A Dnetif.h4 * Unified network-device I/O interface for Xen guest OSes.
24 * Copyright (c) 2003-2004, Keir Fraser
55 * feature 'feature-rx-notify' via xenbus. Otherwise the backend will assume
60 * "feature-split-event-channels" is introduced to separate guest TX
66 * "event-channel-tx" and "event-channel-rx" respectively. If frontend
67 * doesn't want to use this feature, it just writes "event-channel"
73 * If supported, the backend will write the key "multi-queue-max-queues" to
77 * key "multi-queue-num-queues", set to the number they wish to use, which
79 * in "multi-queue-max-queues".
82 * "feature-split-event-channels" may optionally be used when using
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