Lines Matching +full:guest +full:- +full:index +full:- +full:bits
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
69 #define VIE_OP_F_IMM (1 << 0) /* 16/32-bit immediate operand */
70 #define VIE_OP_F_IMM8 (1 << 1) /* 8-bit immediate operand */
71 #define VIE_OP_F_MOFFSET (1 << 2) /* 16/32/64-bit immediate moffset */
188 /* XXX Group 11 extended opcode - not just MOV */
221 /* XXX Group 1A extended opcode - not just POP */
226 /* XXX Group 3 extended opcode - not just TEST */
232 /* XXX Group 3 extended opcode - not just TEST */
238 /* XXX Group 5 extended opcode - not just PUSH */
296 *reg = gpr_map[vie->reg]; in vie_calc_bytereg()
299 * 64-bit mode imposes limitations on accessing legacy high byte in vie_calc_bytereg()
302 * The legacy high-byte registers cannot be addressed if the REX in vie_calc_bytereg()
307 * of the 'ModRM:reg' field address the legacy high-byte registers, in vie_calc_bytereg()
310 if (!vie->rex_present) { in vie_calc_bytereg()
311 if (vie->reg & 0x4) { in vie_calc_bytereg()
313 *reg = gpr_map[vie->reg & 0x3]; in vie_calc_bytereg()
330 * base register right by 8 bits (%ah = %rax >> 8). in vie_read_bytereg()
397 * Return the status flags that would result from doing (x - y).
510 size = vie->opsize; in emulate_mov()
513 switch (vie->op.op_byte) { in emulate_mov()
532 reg = gpr_map[vie->reg]; in emulate_mov()
559 reg = gpr_map[vie->reg]; in emulate_mov()
596 error = memwrite(vcpu, gpa, vie->immediate, size, arg); in emulate_mov()
603 * REX.W + C7/0 mov r/m64, imm32 (sign-extended to 64-bits) in emulate_mov()
605 val = vie->immediate & size2mask[size]; in emulate_mov()
623 size = vie->opsize; in emulate_movx()
626 switch (vie->op.op_byte) { in emulate_movx()
643 reg = gpr_map[vie->reg]; in emulate_movx()
645 /* zero-extend byte */ in emulate_movx()
663 reg = gpr_map[vie->reg]; in emulate_movx()
665 /* zero-extend word */ in emulate_movx()
686 reg = gpr_map[vie->reg]; in emulate_movx()
726 if (vie_calculate_gla(paging->cpu_mode, seg, &desc, val, opsize, in get_gla()
735 if (vie_canonical_check(paging->cpu_mode, *gla)) { in get_gla()
743 if (vie_alignment_check(paging->cpl, opsize, cr0, rflags, *gla)) { in get_gla()
770 opsize = (vie->op.op_byte == 0xA4) ? 1 : vie->opsize; in emulate_movs()
781 repeat = vie->repz_present | vie->repnz_present; in emulate_movs()
791 if ((rcx & vie_size2mask(vie->addrsize)) == 0) { in emulate_movs()
799 * -------------------------------------------- in emulate_movs()
813 seg = vie->segment_override ? vie->segment_register : VM_REG_GUEST_DS; in emulate_movs()
814 error = get_gla(vcpu, vie, paging, opsize, vie->addrsize, in emulate_movs()
823 goto done; /* Resume guest to handle fault */ in emulate_movs()
839 error = get_gla(vcpu, vie, paging, opsize, vie->addrsize, in emulate_movs()
849 goto done; /* Resume guest to handle fault */ in emulate_movs()
854 * A MMIO read can have side-effects so we in emulate_movs()
856 * successful. If a page-fault needs to be in emulate_movs()
857 * injected into the guest then it will happen in emulate_movs()
871 * side-effects) only after we are sure that the in emulate_movs()
905 rsi -= opsize; in emulate_movs()
906 rdi -= opsize; in emulate_movs()
913 vie->addrsize); in emulate_movs()
917 vie->addrsize); in emulate_movs()
921 rcx = rcx - 1; in emulate_movs()
923 rcx, vie->addrsize); in emulate_movs()
929 if ((rcx & vie_size2mask(vie->addrsize)) != 0) in emulate_movs()
947 opsize = (vie->op.op_byte == 0xAA) ? 1 : vie->opsize; in emulate_stos()
948 repeat = vie->repz_present | vie->repnz_present; in emulate_stos()
958 if ((rcx & vie_size2mask(vie->addrsize)) == 0) in emulate_stos()
976 rdi -= opsize; in emulate_stos()
981 vie->addrsize); in emulate_stos()
985 rcx = rcx - 1; in emulate_stos()
987 rcx, vie->addrsize); in emulate_stos()
993 if ((rcx & vie_size2mask(vie->addrsize)) != 0) in emulate_stos()
1008 size = vie->opsize; in emulate_and()
1011 switch (vie->op.op_byte) { in emulate_and()
1023 reg = gpr_map[vie->reg]; in emulate_and()
1045 * REX.W + 81 /4 and r/m64, imm32 sign-extended to 64 in emulate_and()
1047 * 83 /4 and r/m16, imm8 sign-extended to 16 in emulate_and()
1048 * 83 /4 and r/m32, imm8 sign-extended to 32 in emulate_and()
1049 * REX.W + 83/4 and r/m64, imm8 sign-extended to 64 in emulate_and()
1058 * perform the operation with the pre-fetched immediate in emulate_and()
1061 result = val1 & vie->immediate; in emulate_and()
1096 size = vie->opsize; in emulate_or()
1099 switch (vie->op.op_byte) { in emulate_or()
1111 reg = gpr_map[vie->reg]; in emulate_or()
1133 * REX.W + 81 /1 or r/m64, imm32 sign-extended to 64 in emulate_or()
1135 * 83 /1 or r/m16, imm8 sign-extended to 16 in emulate_or()
1136 * 83 /1 or r/m32, imm8 sign-extended to 32 in emulate_or()
1137 * REX.W + 83/1 or r/m64, imm8 sign-extended to 64 in emulate_or()
1146 * perform the operation with the pre-fetched immediate in emulate_or()
1149 result = val1 | vie->immediate; in emulate_or()
1184 size = vie->opsize; in emulate_cmp()
1185 switch (vie->op.op_byte) { in emulate_cmp()
1204 reg = gpr_map[vie->reg]; in emulate_cmp()
1214 if (vie->op.op_byte == 0x3B) { in emulate_cmp()
1232 * REX.W + 81 /7 cmp r/m64, imm32 sign-extended to 64 in emulate_cmp()
1234 * 83 /7 cmp r/m16, imm8 sign-extended to 16 in emulate_cmp()
1235 * 83 /7 cmp r/m32, imm8 sign-extended to 32 in emulate_cmp()
1236 * REX.W + 83 /7 cmp r/m64, imm8 sign-extended to 64 in emulate_cmp()
1245 if (vie->op.op_byte == 0x80) in emulate_cmp()
1253 rflags2 = getcc(size, op1, vie->immediate); in emulate_cmp()
1275 size = vie->opsize; in emulate_test()
1278 switch (vie->op.op_byte) { in emulate_test()
1289 * REX.W + F7 /0 test r/m64, imm32 sign-extended to 64 in emulate_test()
1296 if ((vie->reg & 7) != 0) in emulate_test()
1303 rflags2 = getandflags(size, op1, vie->immediate); in emulate_test()
1332 size = vie->opsize; in emulate_bextr()
1342 * Operand size is always 32-bit if not in 64-bit mode (W1 is ignored). in emulate_bextr()
1344 if (size != 4 && paging->cpu_mode != CPU_MODE_64BIT) in emulate_bextr()
1348 * Extracts contiguous bits from the first /source/ operand (second in emulate_bextr()
1349 * operand) using an index and length specified in the second /source/ in emulate_bextr()
1355 error = vie_read_register(vcpu, gpr_map[vie->vex_reg], &src2); in emulate_bextr()
1365 /* If no bits are extracted, the destination register is cleared. */ in emulate_bextr()
1368 /* If START exceeds the operand size, no bits are extracted. */ in emulate_bextr()
1373 len = (size * 8) - start; in emulate_bextr()
1380 src1 = src1 & ((1ull << len) - 1); in emulate_bextr()
1384 error = vie_update_register(vcpu, gpr_map[vie->reg], dst, size); in emulate_bextr()
1408 size = vie->opsize; in emulate_add()
1411 switch (vie->op.op_byte) { in emulate_add()
1422 reg = gpr_map[vie->reg]; in emulate_add()
1464 size = vie->opsize; in emulate_sub()
1467 switch (vie->op.op_byte) { in emulate_sub()
1478 reg = gpr_map[vie->reg]; in emulate_sub()
1489 nval = val1 - val2; in emulate_sub()
1527 size = vie->opsize; in emulate_stack_op()
1528 pushop = (vie->op.op_type == VIE_OP_TYPE_PUSH) ? 1 : 0; in emulate_stack_op()
1531 * From "Address-Size Attributes for Stack Accesses", Intel SDL, Vol 1 in emulate_stack_op()
1533 if (paging->cpu_mode == CPU_MODE_REAL) { in emulate_stack_op()
1535 } else if (paging->cpu_mode == CPU_MODE_64BIT) { in emulate_stack_op()
1537 * "Stack Manipulation Instructions in 64-bit Mode", SDM, Vol 3 in emulate_stack_op()
1538 * - Stack pointer size is always 64-bits. in emulate_stack_op()
1539 * - PUSH/POP of 32-bit values is not possible in 64-bit mode. in emulate_stack_op()
1540 * - 16-bit PUSH/POP is supported by using the operand size in emulate_stack_op()
1544 size = vie->opsize_override ? 2 : 8; in emulate_stack_op()
1548 * stack-segment descriptor determines the size of the in emulate_stack_op()
1569 rsp -= size; in emulate_stack_op()
1572 if (vie_calculate_gla(paging->cpu_mode, VM_REG_GUEST_SS, &ss_desc, in emulate_stack_op()
1579 if (vie_canonical_check(paging->cpu_mode, stack_gla)) { in emulate_stack_op()
1584 if (vie_alignment_check(paging->cpl, size, cr0, rflags, stack_gla)) { in emulate_stack_op()
1622 * Table A-6, "Opcode Extensions", Intel SDM, Vol 2. in emulate_push()
1627 if ((vie->reg & 7) != 6) in emulate_push()
1643 * Table A-6, "Opcode Extensions", Intel SDM, Vol 2. in emulate_pop()
1648 if ((vie->reg & 7) != 0) in emulate_pop()
1663 switch (vie->reg & 7) { in emulate_group1()
1698 if ((vie->reg & 7) != 4) in emulate_bittest()
1704 error = memread(vcpu, gpa, &val, vie->opsize, memarg); in emulate_bittest()
1709 * Intel SDM, Vol 2, Table 3-2: in emulate_bittest()
1712 bitmask = vie->opsize * 8 - 1; in emulate_bittest()
1713 bitoff = vie->immediate & bitmask; in emulate_bittest()
1735 switch (vie->reg & 7) { in emulate_twob_group15()
1737 if (vie->mod == 0x3) { in emulate_twob_group15()
1766 if (!vie->decoded) in vmm_emulate_instruction()
1769 switch (vie->op.op_type) { in vmm_emulate_instruction()
1853 return ((gla & (size - 1)) ? 1 : 0); in vie_alignment_check()
1866 * most significant 16 bits. in vie_canonical_check()
1868 mask = ~((1UL << 48) - 1); in vie_canonical_check()
1912 if (SEG_DESC_UNUSABLE(desc->access)) in vie_calculate_gla()
1913 return (-1); in vie_calculate_gla()
1919 * it would have been checked before the VM-exit. in vie_calculate_gla()
1921 KASSERT(SEG_DESC_PRESENT(desc->access), in vie_calculate_gla()
1922 ("segment %d not present: %#x", seg, desc->access)); in vie_calculate_gla()
1927 type = SEG_DESC_TYPE(desc->access); in vie_calculate_gla()
1932 /* #GP on a read access to a exec-only code segment */ in vie_calculate_gla()
1934 return (-1); in vie_calculate_gla()
1940 * read-only data segment. in vie_calculate_gla()
1943 return (-1); in vie_calculate_gla()
1945 if ((type & 0xA) == 0) /* read-only data seg */ in vie_calculate_gla()
1946 return (-1); in vie_calculate_gla()
1950 * 'desc->limit' is fully expanded taking granularity into in vie_calculate_gla()
1954 /* expand-down data segment */ in vie_calculate_gla()
1955 low_limit = desc->limit + 1; in vie_calculate_gla()
1956 high_limit = SEG_DESC_DEF32(desc->access) ? in vie_calculate_gla()
1959 /* code segment or expand-up data segment */ in vie_calculate_gla()
1961 high_limit = desc->limit; in vie_calculate_gla()
1967 return (-1); in vie_calculate_gla()
1969 length--; in vie_calculate_gla()
1974 * In 64-bit mode all segments except %fs and %gs have a segment in vie_calculate_gla()
1981 segbase = desc->base; in vie_calculate_gla()
2005 sizeof(*vie) - offsetof(struct vie, vie_startzero)); in vie_restart()
2007 vie->base_register = VM_REG_LAST; in vie_restart()
2008 vie->index_register = VM_REG_LAST; in vie_restart()
2009 vie->segment_register = VM_REG_LAST; in vie_restart()
2019 memset(vie->inst, 0, sizeof(vie->inst)); in vie_init()
2021 memcpy(vie->inst, inst_bytes, inst_length); in vie_init()
2022 vie->num_valid = inst_length; in vie_init()
2076 usermode = (paging->cpl == 3 ? 1 : 0); in _vm_gla2gpa()
2082 ptpphys = paging->cr3; /* root of the page tables */ in _vm_gla2gpa()
2087 if (vie_canonical_check(paging->cpu_mode, gla)) { in _vm_gla2gpa()
2089 * XXX assuming a non-stack reference otherwise a stack fault in _vm_gla2gpa()
2097 if (paging->paging_mode == PAGING_MODE_FLAT) { in _vm_gla2gpa()
2102 if (paging->paging_mode == PAGING_MODE_32) { in _vm_gla2gpa()
2104 while (--nlevels >= 0) { in _vm_gla2gpa()
2105 /* Zero out the lower 12 bits. */ in _vm_gla2gpa()
2135 * is only set at the last level providing the guest in _vm_gla2gpa()
2160 /* Zero out the lower 'ptpshift' bits */ in _vm_gla2gpa()
2162 *gpa = pte32 | (gla & (pgsize - 1)); in _vm_gla2gpa()
2166 if (paging->paging_mode == PAGING_MODE_PAE) { in _vm_gla2gpa()
2167 /* Zero out the lower 5 bits and the upper 32 bits */ in _vm_gla2gpa()
2190 } else if (paging->paging_mode == PAGING_MODE_64_LA57) { in _vm_gla2gpa()
2196 while (--nlevels >= 0) { in _vm_gla2gpa()
2197 /* Zero out the lower 12 bits and the upper 12 bits */ in _vm_gla2gpa()
2249 /* Zero out the lower 'ptpshift' bits and the upper 12 bits */ in _vm_gla2gpa()
2251 *gpa = pte | (gla & (pgsize - 1)); in _vm_gla2gpa()
2299 vm_copyin(copyinfo, vie->inst, inst_length); in vmm_fetch_instruction()
2301 vie->num_valid = inst_length; in vmm_fetch_instruction()
2310 if (vie->num_processed < vie->num_valid) { in vie_peek()
2311 *x = vie->inst[vie->num_processed]; in vie_peek()
2314 return (-1); in vie_peek()
2321 vie->num_processed++; in vie_advance()
2360 return (-1); in decode_prefixes()
2363 vie->opsize_override = 1; in decode_prefixes()
2365 vie->addrsize_override = 1; in decode_prefixes()
2367 vie->repz_present = 1; in decode_prefixes()
2369 vie->repnz_present = 1; in decode_prefixes()
2370 else if (segment_override(x, &vie->segment_register)) in decode_prefixes()
2371 vie->segment_override = 1; in decode_prefixes()
2380 * - Only one REX prefix is allowed per instruction. in decode_prefixes()
2381 * - The REX prefix must immediately precede the opcode byte or the in decode_prefixes()
2383 * - If an instruction has a mandatory prefix (0x66, 0xF2 or 0xF3) in decode_prefixes()
2387 vie->rex_present = 1; in decode_prefixes()
2388 vie->rex_w = x & 0x8 ? 1 : 0; in decode_prefixes()
2389 vie->rex_r = x & 0x4 ? 1 : 0; in decode_prefixes()
2390 vie->rex_x = x & 0x2 ? 1 : 0; in decode_prefixes()
2391 vie->rex_b = x & 0x1 ? 1 : 0; in decode_prefixes()
2402 /* 3-byte VEX prefix. */ in decode_prefixes()
2403 vie->vex_present = 1; in decode_prefixes()
2407 return (-1); in decode_prefixes()
2410 * 2nd byte: [R', X', B', mmmmm[4:0]]. Bits are inverted in decode_prefixes()
2413 vie->rex_r = x & 0x80 ? 0 : 1; in decode_prefixes()
2414 vie->rex_x = x & 0x40 ? 0 : 1; in decode_prefixes()
2415 vie->rex_b = x & 0x20 ? 0 : 1; in decode_prefixes()
2423 /* 0F class - nothing handled here yet. */ in decode_prefixes()
2426 /* 0F 3A class - nothing handled here yet. */ in decode_prefixes()
2430 return (-1); in decode_prefixes()
2435 return (-1); in decode_prefixes()
2438 vie->rex_w = x & 0x80 ? 1 : 0; in decode_prefixes()
2440 vie->vex_reg = ((~(unsigned)x & 0x78u) >> 3); in decode_prefixes()
2441 vie->vex_l = !!(x & 0x4); in decode_prefixes()
2442 vie->vex_pp = (x & 0x3); in decode_prefixes()
2445 switch (vie->vex_pp) { in decode_prefixes()
2447 vie->opsize_override = 1; in decode_prefixes()
2450 vie->repz_present = 1; in decode_prefixes()
2453 vie->repnz_present = 1; in decode_prefixes()
2461 return (-1); in decode_prefixes()
2463 vie->op = optab[x]; in decode_prefixes()
2464 if (vie->op.op_type == VIE_OP_TYPE_NONE) in decode_prefixes()
2465 return (-1); in decode_prefixes()
2471 * Section "Operand-Size And Address-Size Attributes", Intel SDM, Vol 1 in decode_prefixes()
2475 * Default address size is 64-bits and default operand size in decode_prefixes()
2476 * is 32-bits. in decode_prefixes()
2478 vie->addrsize = vie->addrsize_override ? 4 : 8; in decode_prefixes()
2479 if (vie->rex_w) in decode_prefixes()
2480 vie->opsize = 8; in decode_prefixes()
2481 else if (vie->opsize_override) in decode_prefixes()
2482 vie->opsize = 2; in decode_prefixes()
2484 vie->opsize = 4; in decode_prefixes()
2486 /* Default address and operand sizes are 32-bits */ in decode_prefixes()
2487 vie->addrsize = vie->addrsize_override ? 2 : 4; in decode_prefixes()
2488 vie->opsize = vie->opsize_override ? 2 : 4; in decode_prefixes()
2490 /* Default address and operand sizes are 16-bits */ in decode_prefixes()
2491 vie->addrsize = vie->addrsize_override ? 4 : 2; in decode_prefixes()
2492 vie->opsize = vie->opsize_override ? 4 : 2; in decode_prefixes()
2503 return (-1); in decode_two_byte_opcode()
2505 vie->op = two_byte_opcodes[x]; in decode_two_byte_opcode()
2507 if (vie->op.op_type == VIE_OP_TYPE_NONE) in decode_two_byte_opcode()
2508 return (-1); in decode_two_byte_opcode()
2520 return (-1); in decode_opcode()
2523 if (vie->op.op_type != VIE_OP_TYPE_NONE) in decode_opcode()
2526 vie->op = one_byte_opcodes[x]; in decode_opcode()
2528 if (vie->op.op_type == VIE_OP_TYPE_NONE) in decode_opcode()
2529 return (-1); in decode_opcode()
2533 if (vie->op.op_type == VIE_OP_TYPE_TWO_BYTE) in decode_opcode()
2544 if (vie->op.op_flags & VIE_OP_F_NO_MODRM) in decode_modrm()
2548 return (-1); in decode_modrm()
2551 return (-1); in decode_modrm()
2553 vie->mod = (x >> 6) & 0x3; in decode_modrm()
2554 vie->rm = (x >> 0) & 0x7; in decode_modrm()
2555 vie->reg = (x >> 3) & 0x7; in decode_modrm()
2562 if (vie->mod == VIE_MOD_DIRECT) in decode_modrm()
2563 return (-1); in decode_modrm()
2565 if ((vie->mod == VIE_MOD_INDIRECT && vie->rm == VIE_RM_DISP32) || in decode_modrm()
2566 (vie->mod != VIE_MOD_DIRECT && vie->rm == VIE_RM_SIB)) { in decode_modrm()
2568 * Table 2-5: Special Cases of REX Encodings in decode_modrm()
2580 vie->rm |= (vie->rex_b << 3); in decode_modrm()
2583 vie->reg |= (vie->rex_r << 3); in decode_modrm()
2586 if (vie->mod != VIE_MOD_DIRECT && vie->rm == VIE_RM_SIB) in decode_modrm()
2589 vie->base_register = gpr_map[vie->rm]; in decode_modrm()
2591 switch (vie->mod) { in decode_modrm()
2593 vie->disp_bytes = 1; in decode_modrm()
2596 vie->disp_bytes = 4; in decode_modrm()
2599 if (vie->rm == VIE_RM_DISP32) { in decode_modrm()
2600 vie->disp_bytes = 4; in decode_modrm()
2602 * Table 2-7. RIP-Relative Addressing in decode_modrm()
2604 * In 64-bit mode mod=00 r/m=101 implies [rip] + disp32 in decode_modrm()
2609 vie->base_register = VM_REG_GUEST_RIP; in decode_modrm()
2611 vie->base_register = VM_REG_LAST; in decode_modrm()
2628 if (vie->mod == VIE_MOD_DIRECT || vie->rm != VIE_RM_SIB) in decode_sib()
2632 return (-1); in decode_sib()
2634 /* De-construct the SIB byte */ in decode_sib()
2635 vie->ss = (x >> 6) & 0x3; in decode_sib()
2636 vie->index = (x >> 3) & 0x7; in decode_sib()
2637 vie->base = (x >> 0) & 0x7; in decode_sib()
2640 vie->index |= vie->rex_x << 3; in decode_sib()
2641 vie->base |= vie->rex_b << 3; in decode_sib()
2643 switch (vie->mod) { in decode_sib()
2645 vie->disp_bytes = 1; in decode_sib()
2648 vie->disp_bytes = 4; in decode_sib()
2652 if (vie->mod == VIE_MOD_INDIRECT && in decode_sib()
2653 (vie->base == 5 || vie->base == 13)) { in decode_sib()
2659 * Table 2-3: 32-bit Addressing Forms with the SIB Byte in decode_sib()
2660 * Table 2-5: Special Cases of REX Encodings in decode_sib()
2662 vie->disp_bytes = 4; in decode_sib()
2664 vie->base_register = gpr_map[vie->base]; in decode_sib()
2668 * All encodings of 'index' are valid except for %rsp (4). in decode_sib()
2671 * Table 2-3: 32-bit Addressing Forms with the SIB Byte in decode_sib()
2672 * Table 2-5: Special Cases of REX Encodings in decode_sib()
2674 if (vie->index != 4) in decode_sib()
2675 vie->index_register = gpr_map[vie->index]; in decode_sib()
2677 /* 'scale' makes sense only in the context of an index register */ in decode_sib()
2678 if (vie->index_register < VM_REG_LAST) in decode_sib()
2679 vie->scale = 1 << vie->ss; in decode_sib()
2698 if ((n = vie->disp_bytes) == 0) in decode_displacement()
2706 return (-1); in decode_displacement()
2713 vie->displacement = u.signed8; /* sign-extended */ in decode_displacement()
2715 vie->displacement = u.signed32; /* sign-extended */ in decode_displacement()
2733 if (vie->op.op_flags & VIE_OP_F_IMM) { in decode_immediate()
2736 * In 64-bit mode the typical size of immediate operands in decode_immediate()
2737 * remains 32-bits. When the operand size if 64-bits, the in decode_immediate()
2738 * processor sign-extends all immediates to 64-bits prior in decode_immediate()
2741 if (vie->opsize == 4 || vie->opsize == 8) in decode_immediate()
2742 vie->imm_bytes = 4; in decode_immediate()
2744 vie->imm_bytes = 2; in decode_immediate()
2745 } else if (vie->op.op_flags & VIE_OP_F_IMM8) { in decode_immediate()
2746 vie->imm_bytes = 1; in decode_immediate()
2749 if ((n = vie->imm_bytes) == 0) in decode_immediate()
2757 return (-1); in decode_immediate()
2763 /* sign-extend the immediate value before use */ in decode_immediate()
2765 vie->immediate = u.signed8; in decode_immediate()
2767 vie->immediate = u.signed16; in decode_immediate()
2769 vie->immediate = u.signed32; in decode_immediate()
2784 if ((vie->op.op_flags & VIE_OP_F_MOFFSET) == 0) in decode_moffset()
2788 * Section 2.2.1.4, "Direct Memory-Offset MOVs", Intel SDM: in decode_moffset()
2789 * The memory offset size follows the address-size of the instruction. in decode_moffset()
2791 n = vie->addrsize; in decode_moffset()
2797 return (-1); in decode_moffset()
2802 vie->displacement = u.u64; in decode_moffset()
2808 * Verify that the 'guest linear address' provided as collateral of the nested
2825 if (vie->base_register != VM_REG_LAST) { in verify_gla()
2826 error = vm_get_register(vcpu, vie->base_register, &base); in verify_gla()
2829 error, vie->base_register); in verify_gla()
2830 return (-1); in verify_gla()
2834 * RIP-relative addressing starts from the following in verify_gla()
2837 if (vie->base_register == VM_REG_GUEST_RIP) in verify_gla()
2838 base += vie->num_processed; in verify_gla()
2842 if (vie->index_register != VM_REG_LAST) { in verify_gla()
2843 error = vm_get_register(vcpu, vie->index_register, &idx); in verify_gla()
2845 printf("verify_gla: error %d getting index reg %d\n", in verify_gla()
2846 error, vie->index_register); in verify_gla()
2847 return (-1); in verify_gla()
2854 * In 64-bit mode, segmentation is generally (but not in verify_gla()
2858 * In legacy IA-32 mode, when the ESP or EBP register is used in verify_gla()
2864 if (vie->segment_override) in verify_gla()
2865 seg = vie->segment_register; in verify_gla()
2866 else if (vie->base_register == VM_REG_GUEST_RSP || in verify_gla()
2867 vie->base_register == VM_REG_GUEST_RBP) in verify_gla()
2879 vie->segment_register); in verify_gla()
2880 return (-1); in verify_gla()
2885 gla2 = segbase + base + vie->scale * idx + vie->displacement; in verify_gla()
2886 gla2 &= size2mask[vie->addrsize]; in verify_gla()
2889 "base(0x%0lx), scale(%d), index(0x%0lx), " in verify_gla()
2891 segbase, base, vie->scale, idx, vie->displacement, in verify_gla()
2893 return (-1); in verify_gla()
2910 return (-1); in vmm_decode_instruction()
2913 return (-1); in vmm_decode_instruction()
2916 return (-1); in vmm_decode_instruction()
2919 return (-1); in vmm_decode_instruction()
2922 return (-1); in vmm_decode_instruction()
2925 return (-1); in vmm_decode_instruction()
2928 return (-1); in vmm_decode_instruction()
2931 if ((vie->op.op_flags & VIE_OP_F_NO_GLA_VERIFICATION) == 0) { in vmm_decode_instruction()
2933 return (-1); in vmm_decode_instruction()
2937 vie->decoded = 1; /* success */ in vmm_decode_instruction()