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/freebsd/sys/contrib/device-tree/Bindings/iio/dac/
H A Dadi,ad3552r.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Nuno Sá <nuno.sa@analog.com>
16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad3541r.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad3542r.pdf
18 https://www.analog.com/media/en/technical-documentation/data-sheets/ad3551r.pdf
19 https://www.analog.com/media/en/technical-documentation/data-sheets/ad3552r.pdf
24 - adi,ad3541r
25 - adi,ad3542r
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/freebsd/sys/contrib/dev/mediatek/mt76/mt76x2/
H A Dphy.c1 // SPDX-License-Identifier: ISC
13 mt76x2_adjust_high_lna_gain(struct mt76x02_dev *dev, int reg, s8 offset) in mt76x2_adjust_high_lna_gain() argument
15 s8 gain; in mt76x2_adjust_high_lna_gain() local
17 gain = FIELD_GET(MT_BBP_AGC_LNA_HIGH_GAIN, in mt76x2_adjust_high_lna_gain()
19 gain -= offset / 2; in mt76x2_adjust_high_lna_gain()
20 mt76_rmw_field(dev, MT_BBP(AGC, reg), MT_BBP_AGC_LNA_HIGH_GAIN, gain); in mt76x2_adjust_high_lna_gain()
24 mt76x2_adjust_agc_gain(struct mt76x02_dev *dev, int reg, s8 offset) in mt76x2_adjust_agc_gain() argument
26 s8 gain; in mt76x2_adjust_agc_gain() local
28 gain = FIELD_GET(MT_BBP_AGC_GAIN, mt76_rr(dev, MT_BBP(AGC, reg))); in mt76x2_adjust_agc_gain()
29 gain += offset; in mt76x2_adjust_agc_gain()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DCodeLayout.cpp1 //===- CodeLayout.cpp - Implementation of code layout algorithms --------
254 uint64_t Offset{0}; global() member
404 double gain() const { return CachedGain.score(); } gain() function
809 MergeGainT Gain = MergeGainT(); getBestMergeGain() local
814 __anon4fceb0470402(size_t Offset, const std::vector<MergeTypeT> &MergeTypes) getBestMergeGain() argument
840 size_t Offset = SrcBlock->CurIndex + 1; getBestMergeGain() local
849 size_t Offset = DstBlock->CurIndex; getBestMergeGain() local
856 for (size_t Offset = 1; Offset < ChainPred->Nodes.size(); Offset++) { getBestMergeGain() local
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/freebsd/sys/gnu/dev/bwn/phy_n/
H A Dif_bwn_phy_n_regs.h22 Boston, MA 02110-1301, USA.
32 /* N-PHY registers. */
41 #define BWN_NPHY_4WI_ADDR BWN_PHY_N(0x00B) /* Four-wire bus address */
42 #define BWN_NPHY_4WI_DATAHI BWN_PHY_N(0x00C) /* Four-wire bus data high */
43 #define BWN_NPHY_4WI_DATALO BWN_PHY_N(0x00D) /* Four-wire bus data low */
44 #define BWN_NPHY_BIST_STAT0 BWN_PHY_N(0x00E) /* Built-in self test status 0 */
45 #define BWN_NPHY_BIST_STAT1 BWN_PHY_N(0x00F) /* Built-in self test status 1 */
51 #define BWN_NPHY_C1_CGAINI BWN_PHY_N(0x01C) /* Core 1 compute gain info */
52 #define BWN_NPHY_C1_CGAINI_GAINBKOFF 0x001F /* Gain backoff */
54 #define BWN_NPHY_C1_CGAINI_CLIPGBKOFF 0x03E0 /* Clip gain backoff */
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H A Dif_bwn_phy_n_tables.h22 Boston, MA 02110-1301, USA.
93 /* Get entry with workaround values for gain ctl. Does not return NULL. */
98 /* The N-PHY tables. */
103 #define BWN_NTAB8(table, offset) (((table) << 10) | (offset) | BWN_NTAB_8BIT) argument
104 #define BWN_NTAB16(table, offset) (((table) << 10) | (offset) | BWN_NTAB_16BIT) argument
105 #define BWN_NTAB32(table, offset) (((table) << 10) | (offset) | BWN_NTAB_32BIT) argument
107 /* Static N-PHY tables */
137 /* Volatile N-PHY tables */
146 #define BWN_NTAB_C0_GAINCTL BWN_NTAB32(0x1A, 0x0C0) /* Gain Control Lookup Table Core 0 */
156 #define BWN_NTAB_C1_GAINCTL BWN_NTAB32(0x1B, 0x0C0) /* Gain Control Lookup Table Core 1 */
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H A Dif_bwn_phy_n_core.c23 Boston, MA 02110-1301, USA.
165 return ((mac->mac_phy.phy_n->ipa2g_on && band == BWN_BAND_2G) || in bwn_nphy_ipa()
166 (mac->mac_phy.phy_n->ipa5g_on && band == BWN_BAND_5G)); in bwn_nphy_ipa()
169 /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCoreGetState */
180 /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ForceRFSeq */
196 BWN_WARNPRINTF(mac->mac_sc, "%s: seq %d > max", __func__, seq); in bwn_nphy_force_rf_sequence()
207 BWN_ERRPRINTF(mac->mac_sc, "RF sequence status timeout\n"); in bwn_nphy_force_rf_sequence()
219 /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlOverrideRev7 */
224 struct bwn_phy *phy = &mac->mac_phy; in bwn_nphy_rf_ctl_override_rev7()
234 if (phy->rev >= 19 || phy->rev < 3) { in bwn_nphy_rf_ctl_override_rev7()
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/freebsd/share/man/man4/
H A Dads111x.435 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
75 making either single-ended or differential measurements.
107 .Bl -tag -width indent
125 Because measurements are always made in single-shot mode, think of
129 Sets the programmable gain amplifier for the channel on devices
131 The device datasheet documents eight available gain values, chosen
141 sysctl variables -- you must access it specifically by name, because
149 .Bl -column -compact -offset indent "XXXXXXXX" "XXXXXXXX"
170 .Bl -tag -width indent
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H A Dsnd_hdsp.435 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
57 .Bl -bullet -compact
59 RME HDSP 9632 (optional AO4S-192 and AIS-192 extension boards)
69 (32kHz-48kHz) and 4 channels at double speed (64kHz-96kHz).
70 Only the HDSP 9632 can operate at quad speed (128kHz-192kHz), ADAT is
79 .Bl -tag -width indent
82 When opened in multi-channel audio software, this makes all ports available
86 .Bl -column "Sound Card" "Single Speed" "Double Speed" "Quad Speed"
90 .It HDSP 9652 Ta " 26 | 26" Ta " 14 | 14" Ta " - | -"
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H A Dsnd_hdspe.434 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
56 .Bl -bullet -compact
58 RME HDSPe AIO (optional AO4S-192 and AI4S-192 extension boards)
68 (32kHz-48kHz), 4 channels at double speed (64kHz-96kHz), and 2 channels at
69 quad speed (128kHz-192kHz).
77 .Bl -tag -width indent
80 When opened in multi-channel audio software, this makes all ports available
84 .Bl -column "HDSPe RayDAT" "Single Speed" "Double Speed" "Quad Speed"
99 .Bl -tag -width indent
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/freebsd/sys/contrib/dev/rtw89/
H A Drtw8852b.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2022 Realtek Corporation
19 RTW8852B_FW_BASENAME "-" __stringify(RTW8852B_FW_FORMAT_MAX) ".bin"
192 {255, 0, 0, 7}, /* 0 -> original */
193 {255, 2, 0, 7}, /* 1 -> for BT-connecte
615 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; rtw8852b_efuse_parsing_gain_offset() local
666 u32 offset = PWR_K_CHK_OFFSET - rtwdev->chip->phycap_addr; rtw8852b_phycap_parsing_power_cal() local
806 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; rtw8852b_phycap_parsing_gain_comp() local
972 const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; rtw8852b_set_gain_error() local
1070 const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; rtw8852b_set_rxsc_rpl_comp() local
1412 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; rtw8852b_bb_sethw() local
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H A Drtw8851b.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2022-2023 Realtek Corporation
227 {255, 0, 0, 7}, /* 0 -> original */
228 {255, 2, 0, 7}, /* 1 -> for BT-connected ACI issue && BTG co-r
477 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; rtw8851b_efuse_parsing_gain_offset() local
657 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; rtw8851b_phycap_parsing_gain_comp() local
885 const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; rtw8851b_set_gain_error() local
971 const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; rtw8851b_set_rxsc_rpl_comp() local
1438 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; rtw8851b_bb_sethw() local
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H A Drtw8852c.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2022 Realtek Corporation
384 ether_addr_copy(efuse->addr, map->e.mac_addr); in rtw8852c_efuse_parsing_tssi()
385 efuse->rfe_type = map->rfe_typ in rtw8852c_efuse_parsing_tssi()
404 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; rtw8852c_efuse_parsing_gain_offset() local
800 const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; rtw8852c_set_gain_error() local
1601 struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; rtw8852c_bb_sethw() local
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/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DBalancedPartitioning.cpp1 //===- BalancedPartitioning.cpp -------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
21 #define DEBUG_TYPE "balanced-partitioning"
38 if (--NumActiveThreads == 0) { in async()
72 // Pre-computing log2 values in BalancedPartitioning()
96 bisect(NodesRange, /*RecDepth=*/0, /*RootBucket=*/1, /*Offset=*/0, TP); in run()
99 TP->async(std::move(BisectTask)); in run()
100 TP->wait(); in run()
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/freebsd/sys/dev/ath/ath_hal/ar9002/
H A Dar9280_olc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
50 HALDEBUG(ah, HAL_DEBUG_RESET, "%s: Setting up TX gain tables.\n", __func__); in ar9280olcInit()
53 AH9280(ah)->originalGain[i] = MS(OS_REG_READ(ah, in ar9280olcInit()
56 AH9280(ah)->PDADCdelta = 0; in ar9280olcInit()
87 while (pcdac > AH9280(ah)->originalGain[i] && in ar9280olcGetTxGainIndex()
88 i < (AR9280_TX_GAIN_TABLE_SIZE - 1)) in ar9280olcGetTxGainIndex()
104 uint32_t offset; in ar9280olcGetPDADCs() local
111 offset = txPower; in ar9280olcGetPDADCs()
113 if (i < offset) in ar9280olcGetPDADCs()
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/freebsd/contrib/ntp/ntpd/
H A Drefclock_chu.c2 * refclock_chu - clock driver for Canadian CHU time/frequency station
44 * kHz and mu-law companding. This is the same standard as used by the
57 * maximum-likelihood technique which exploits the considerable degree
62 * consists of nine, ten-character bursts transmitted at 300 bps between
87 * the DUT1 (d in deciseconds), Gregorian year (yyyy), difference TAI -
101 * coincides with 0.5 - 9 * 11/300 = 0.170 second. Depending on the
110 * connections. With debugging enabled (-d on the ntpd command line),
113 * chuA or chuB followed by the status code and signal level (0-9999).
120 * where n is the number of characters in the burst (0-10), b the burst
121 * distance (0-40), f the field alignment (-1, 0, 1), s the
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H A Drefclock_irig.c2 * refclock_irig - audio IRIG-B/E demodulator/decoder
26 * Audio IRIG-B/E demodulator/decoder
29 * IRIG-B/E signals commonly produced by GPS receivers and other timing
30 * devices. The IRIG signal is an amplitude-modulated carrier with
31 * pulse-width modulated data bits. For IRIG-B, the carrier frequency is
32 * 1000 Hz and bit rate 100 b/s; for IRIG-E, the carrier frequenchy is
37 * kHz and mu-law companding. This is the same standard as used by the
43 * The program processes 8000-H
157 #define OFFSET global() macro
230 int gain; /* codec gain */ global() member
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H A Drefclock_wwv.c2 * refclock_wwv - clock driver for NIST WWV/H time/frequency station
43 * kHz and mu-law companding. This is the same standard as used by the
53 * Report 97-8-1, University of Delaware, August 1997, 25 pp., available
61 * a nonzero ICOM ID select code. The C-IV trace is turned on if the
68 * port, where 0 is the mike port (default) and 1 is the line-in port.
71 * the monitor gain is set to a default value.
74 * CEVNT_PROP propagation failure - no stations heard
82 #define PRECISION (-10) /* precision assumed (about 1 ms) */
86 #define OFFSET 12 macro
503 int gain; /* audio gain */ global() member
528 int gain; /* codec gain */ global() member
2055 l_fp offset; /* offset in NTP seconds */ wwv_clock() local
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H A Dntp_loopfilter.c2 * ntp_loopfilter.c - implements the NTP loop filter algorithm
33 * in UDel TR 97-4-3, as amended. It operates as an adaptive parameter,
34 * hybrid phase/frequency-lock loop. A number of sanity checks are
41 #define CLOCK_PHI 15e-6 /* max frequency error (s/s) */
42 #define CLOCK_PLL 16. /* PLL loop gain (log2) */
44 #define CLOCK_FLL .25 /* FLL loop gain */
45 #define CLOCK_FLOOR .0005 /* startup offset floor (s) */
47 #define CLOCK_LIMIT 30 /* poll-adjust threshold */
48 #define CLOCK_PGATE 4. /* poll-adjus
1022 rstclock(int trans,double offset) rstclock() argument
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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_serdes_interface.h9 found at http://www.gnu.org/licenses/gpl-2.0.html
53 /* *INDENT-OFF* */
57 /* *INDENT-ON* */
178 * Tx de-emphasis parameters
183 AL_SERDES_TX_DEEMP_C_MINUS, /*< c(-1) */
196 * Transmit Amplitude control signal. Used to define the full-scale
198 * 000 - Not Supported
199 * 001 - 952mVdiff-pkpk
200 * 010 - 1024mVdiff-pkpk
201 * 011 - 1094mVdiff-pkpk
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/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dti,ads131e08.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
10 - Jonathan Cameron <jic23@kernel.org>
14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a
15 built-in programmable gain amplifier (PGA), internal reference
24 - ti,ads131e04
25 - ti,ads131e06
26 - ti,ads131e08
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/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DBalancedPartitioning.h1 //===- BalancedPartitioning.h ---------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
18 // problem is divided into two sub-problems of half the size, which are
25 // number of greedy iterations per split (IterationsPerSplit). The worst-case
28 // FunctionNode-UtilityNode edges; (assuming that any collection of D
30 // recursive sub-problems are independent and thus can be efficiently processed
37 //===----------------------------------------------------------------------===//
85 /// Algorithm parameters; default values are tuned on real-world binaries
138 /// \param Offset the assigned buckets are the range [Offset, Offset +
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/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_cal.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
48 * ADC GAIN/DC offset calibration is for calibrating two ADCs that
60 * " Method and Apparatus for Offset and Gain Compensation for
61 * Analog-to-Digital Converters."
67 struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; in ar5416IsCalSupp()
69 switch (calType & cal->suppCals) { in ar5416IsCalSupp()
71 /* Run IQ Mismatch for non-CCK only */ in ar5416IsCalSupp()
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/freebsd/usr.bin/beep/
H A Dbeep.11 .\"-
36 .Op Fl g Ar gain
45 .Bl -tag -width "-f device"
59 Sets the waveform gain, between 0 and 100 inclusively.
71 .Bl -tag -width Ds -offset indent
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dphy-stm32-usbphyc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
22 |_ PHY port#2 ----| |________________
27 - Amelie Delaunay <amelie.delaunay@foss.st.com>
31 const: st,stm32mp1-usbphyc
42 "#address-cells":
45 "#size-cells":
48 vdda1v1-supply:
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/freebsd/sys/dev/ath/ath_hal/
H A Dah_eeprom_v14.h1 /*-
2 * SPDX-License-Identifier: ISC
60 // 16-bit offset location start of calibration struct
81 #define FREQ2FBIN(x,y) ((y) ? ((x) - 2300) : (((x) - 4800) / 5))
83 #define AR5416_PWR_TABLE_OFFSET_DB -5
111 /* Rx gain type values */
116 /* Tx gain type values */
149 #define AR5416_REGDMN_EN_FCC_MID 0x01 /* 5.47 - 5.7GHz operation */
150 #define AR5416_REGDMN_EN_JAP_MID 0x02 /* 5.47 - 5.7GHz operation */
159 * offset as in previous EEPROM layouts. This makes utilities that
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