xref: /freebsd/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
16e778a7eSPedro F. Giffuni /*-
26e778a7eSPedro F. Giffuni  * SPDX-License-Identifier: ISC
36e778a7eSPedro F. Giffuni  *
459efa8b5SSam Leffler  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
514779705SSam Leffler  * Copyright (c) 2002-2008 Atheros Communications, Inc.
614779705SSam Leffler  *
714779705SSam Leffler  * Permission to use, copy, modify, and/or distribute this software for any
814779705SSam Leffler  * purpose with or without fee is hereby granted, provided that the above
914779705SSam Leffler  * copyright notice and this permission notice appear in all copies.
1014779705SSam Leffler  *
1114779705SSam Leffler  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
1214779705SSam Leffler  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
1314779705SSam Leffler  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
1414779705SSam Leffler  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
1514779705SSam Leffler  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
1614779705SSam Leffler  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
1714779705SSam Leffler  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
1814779705SSam Leffler  */
1914779705SSam Leffler #include "opt_ah.h"
2014779705SSam Leffler 
2114779705SSam Leffler #include "ah.h"
2214779705SSam Leffler #include "ah_internal.h"
2314779705SSam Leffler #include "ah_devid.h"
2414779705SSam Leffler 
2514779705SSam Leffler #include "ah_eeprom_v14.h"
2614779705SSam Leffler 
2743ff2d6aSAdrian Chadd #include "ar5212/ar5212.h"	/* for NF cal related declarations */
2843ff2d6aSAdrian Chadd 
2914779705SSam Leffler #include "ar5416/ar5416.h"
3014779705SSam Leffler #include "ar5416/ar5416reg.h"
3114779705SSam Leffler #include "ar5416/ar5416phy.h"
3214779705SSam Leffler 
3314779705SSam Leffler /* Owl specific stuff */
3414779705SSam Leffler #define NUM_NOISEFLOOR_READINGS 6       /* 3 chains * (ctl + ext) */
3514779705SSam Leffler 
3614779705SSam Leffler static void ar5416StartNFCal(struct ath_hal *ah);
37*8a97beffSAdrian Chadd static HAL_BOOL ar5416LoadNF(struct ath_hal *ah, const struct ieee80211_channel *);
3859efa8b5SSam Leffler static int16_t ar5416GetNf(struct ath_hal *, struct ieee80211_channel *);
3914779705SSam Leffler 
40c6c9d8c8SAdrian Chadd static uint16_t ar5416GetDefaultNF(struct ath_hal *ah, const struct ieee80211_channel *chan);
41c6c9d8c8SAdrian Chadd static void ar5416SanitizeNF(struct ath_hal *ah, int16_t *nf);
42c6c9d8c8SAdrian Chadd 
4314779705SSam Leffler /*
4414779705SSam Leffler  * Determine if calibration is supported by device and channel flags
4514779705SSam Leffler  */
46564e7aeaSAdrian Chadd 
47564e7aeaSAdrian Chadd /*
48564e7aeaSAdrian Chadd  * ADC GAIN/DC offset calibration is for calibrating two ADCs that
49564e7aeaSAdrian Chadd  * are acting as one by interleaving incoming symbols. This isn't
50564e7aeaSAdrian Chadd  * relevant for 2.4GHz 20MHz wide modes because, as far as I can tell,
51564e7aeaSAdrian Chadd  * the secondary ADC is never enabled. It is enabled however for
52564e7aeaSAdrian Chadd  * 5GHz modes.
53564e7aeaSAdrian Chadd  *
54564e7aeaSAdrian Chadd  * It hasn't been confirmed whether doing this calibration is needed
55564e7aeaSAdrian Chadd  * at all in the above modes and/or whether it's actually harmful.
56564e7aeaSAdrian Chadd  * So for now, let's leave it enabled and just remember to get
57564e7aeaSAdrian Chadd  * confirmation that it needs to be clarified.
58564e7aeaSAdrian Chadd  *
59564e7aeaSAdrian Chadd  * See US Patent No: US 7,541,952 B1:
60564e7aeaSAdrian Chadd  *  " Method and Apparatus for Offset and Gain Compensation for
61564e7aeaSAdrian Chadd  *    Analog-to-Digital Converters."
62564e7aeaSAdrian Chadd  */
6314779705SSam Leffler static OS_INLINE HAL_BOOL
ar5416IsCalSupp(struct ath_hal * ah,const struct ieee80211_channel * chan,HAL_CAL_TYPE calType)6459efa8b5SSam Leffler ar5416IsCalSupp(struct ath_hal *ah, const struct ieee80211_channel *chan,
6559efa8b5SSam Leffler 	HAL_CAL_TYPE calType)
6614779705SSam Leffler {
6714779705SSam Leffler 	struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
6814779705SSam Leffler 
6914779705SSam Leffler 	switch (calType & cal->suppCals) {
7014779705SSam Leffler 	case IQ_MISMATCH_CAL:
7114779705SSam Leffler 		/* Run IQ Mismatch for non-CCK only */
7259efa8b5SSam Leffler 		return !IEEE80211_IS_CHAN_B(chan);
7314779705SSam Leffler 	case ADC_GAIN_CAL:
7414779705SSam Leffler 	case ADC_DC_CAL:
75c86c3aa3SAdrian Chadd 		/*
76aacc7499SAdrian Chadd 		 * Run ADC Gain Cal for either 5ghz any or 2ghz HT40.
77aacc7499SAdrian Chadd 		 *
78aacc7499SAdrian Chadd 		 * Don't run ADC calibrations for 5ghz fast clock mode
79aacc7499SAdrian Chadd 		 * in HT20 - only one ADC is used.
80c86c3aa3SAdrian Chadd 		 */
81aacc7499SAdrian Chadd 		if (IEEE80211_IS_CHAN_HT20(chan) &&
82aacc7499SAdrian Chadd 		    (IS_5GHZ_FAST_CLOCK_EN(ah, chan)))
83aacc7499SAdrian Chadd 			return AH_FALSE;
8475f0fbfbSAdrian Chadd 		if (IEEE80211_IS_CHAN_5GHZ(chan))
85baab333cSAdrian Chadd 			return AH_TRUE;
8675f0fbfbSAdrian Chadd 		if (IEEE80211_IS_CHAN_HT40(chan))
8775f0fbfbSAdrian Chadd 			return AH_TRUE;
8875f0fbfbSAdrian Chadd 		return AH_FALSE;
8914779705SSam Leffler 	}
9014779705SSam Leffler 	return AH_FALSE;
9114779705SSam Leffler }
9214779705SSam Leffler 
9314779705SSam Leffler /*
9414779705SSam Leffler  * Setup HW to collect samples used for current cal
9514779705SSam Leffler  */
9614779705SSam Leffler static void
ar5416SetupMeasurement(struct ath_hal * ah,HAL_CAL_LIST * currCal)9714779705SSam Leffler ar5416SetupMeasurement(struct ath_hal *ah, HAL_CAL_LIST *currCal)
9814779705SSam Leffler {
9914779705SSam Leffler 	/* Start calibration w/ 2^(INIT_IQCAL_LOG_COUNT_MAX+1) samples */
10014779705SSam Leffler 	OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4,
10114779705SSam Leffler 	    AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX,
10214779705SSam Leffler 	    currCal->calData->calCountMax);
10314779705SSam Leffler 
10414779705SSam Leffler 	/* Select calibration to run */
10514779705SSam Leffler 	switch (currCal->calData->calType) {
10614779705SSam Leffler 	case IQ_MISMATCH_CAL:
10714779705SSam Leffler 		OS_REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
10814779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_PERCAL,
10914779705SSam Leffler 		    "%s: start IQ Mismatch calibration\n", __func__);
11014779705SSam Leffler 		break;
11114779705SSam Leffler 	case ADC_GAIN_CAL:
11214779705SSam Leffler 		OS_REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN);
11314779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_PERCAL,
11414779705SSam Leffler 		    "%s: start ADC Gain calibration\n", __func__);
11514779705SSam Leffler 		break;
11614779705SSam Leffler 	case ADC_DC_CAL:
11714779705SSam Leffler 		OS_REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER);
11814779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_PERCAL,
11914779705SSam Leffler 		    "%s: start ADC DC calibration\n", __func__);
12014779705SSam Leffler 		break;
12114779705SSam Leffler 	case ADC_DC_INIT_CAL:
12214779705SSam Leffler 		OS_REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_INIT);
12314779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_PERCAL,
12414779705SSam Leffler 		    "%s: start Init ADC DC calibration\n", __func__);
12514779705SSam Leffler 		break;
12614779705SSam Leffler 	}
12714779705SSam Leffler 	/* Kick-off cal */
12814779705SSam Leffler 	OS_REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4, AR_PHY_TIMING_CTRL4_DO_CAL);
12914779705SSam Leffler }
13014779705SSam Leffler 
13114779705SSam Leffler /*
13214779705SSam Leffler  * Initialize shared data structures and prepare a cal to be run.
13314779705SSam Leffler  */
13414779705SSam Leffler static void
ar5416ResetMeasurement(struct ath_hal * ah,HAL_CAL_LIST * currCal)13514779705SSam Leffler ar5416ResetMeasurement(struct ath_hal *ah, HAL_CAL_LIST *currCal)
13614779705SSam Leffler {
13714779705SSam Leffler 	struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
13814779705SSam Leffler 
13914779705SSam Leffler 	/* Reset data structures shared between different calibrations */
14014779705SSam Leffler 	OS_MEMZERO(cal->caldata, sizeof(cal->caldata));
14114779705SSam Leffler 	cal->calSamples = 0;
14214779705SSam Leffler 
14314779705SSam Leffler 	/* Setup HW for new calibration */
14414779705SSam Leffler 	ar5416SetupMeasurement(ah, currCal);
14514779705SSam Leffler 
14614779705SSam Leffler 	/* Change SW state to RUNNING for this calibration */
14714779705SSam Leffler 	currCal->calState = CAL_RUNNING;
14814779705SSam Leffler }
14914779705SSam Leffler 
15014779705SSam Leffler #if 0
15114779705SSam Leffler /*
15214779705SSam Leffler  * Run non-periodic calibrations.
15314779705SSam Leffler  */
15414779705SSam Leffler static HAL_BOOL
15514779705SSam Leffler ar5416RunInitCals(struct ath_hal *ah, int init_cal_count)
15614779705SSam Leffler {
15714779705SSam Leffler 	struct ath_hal_5416 *ahp = AH5416(ah);
15814779705SSam Leffler 	struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
15914779705SSam Leffler 	HAL_CHANNEL_INTERNAL ichan;	/* XXX bogus */
16014779705SSam Leffler 	HAL_CAL_LIST *curCal = ahp->ah_cal_curr;
16114779705SSam Leffler 	HAL_BOOL isCalDone;
16214779705SSam Leffler 	int i;
16314779705SSam Leffler 
16414779705SSam Leffler 	if (curCal == AH_NULL)
16514779705SSam Leffler 		return AH_FALSE;
16614779705SSam Leffler 
16714779705SSam Leffler 	ichan.calValid = 0;
16814779705SSam Leffler 	for (i = 0; i < init_cal_count; i++) {
16914779705SSam Leffler 		/* Reset this Cal */
17014779705SSam Leffler 		ar5416ResetMeasurement(ah, curCal);
17114779705SSam Leffler 		/* Poll for offset calibration complete */
17214779705SSam Leffler 		if (!ath_hal_wait(ah, AR_PHY_TIMING_CTRL4, AR_PHY_TIMING_CTRL4_DO_CAL, 0)) {
17314779705SSam Leffler 			HALDEBUG(ah, HAL_DEBUG_ANY,
17414779705SSam Leffler 			    "%s: Cal %d failed to finish in 100ms.\n",
17514779705SSam Leffler 			    __func__, curCal->calData->calType);
17614779705SSam Leffler 			/* Re-initialize list pointers for periodic cals */
17714779705SSam Leffler 			cal->cal_list = cal->cal_last = cal->cal_curr = AH_NULL;
17814779705SSam Leffler 			return AH_FALSE;
17914779705SSam Leffler 		}
18014779705SSam Leffler 		/* Run this cal */
18114779705SSam Leffler 		ar5416DoCalibration(ah, &ichan, ahp->ah_rxchainmask,
18214779705SSam Leffler 		    curCal, &isCalDone);
18314779705SSam Leffler 		if (!isCalDone)
18414779705SSam Leffler 			HALDEBUG(ah, HAL_DEBUG_ANY,
18514779705SSam Leffler 			    "%s: init cal %d did not complete.\n",
18614779705SSam Leffler 			    __func__, curCal->calData->calType);
18714779705SSam Leffler 		if (curCal->calNext != AH_NULL)
18814779705SSam Leffler 			curCal = curCal->calNext;
18914779705SSam Leffler 	}
19014779705SSam Leffler 
19114779705SSam Leffler 	/* Re-initialize list pointers for periodic cals */
19214779705SSam Leffler 	cal->cal_list = cal->cal_last = cal->cal_curr = AH_NULL;
19314779705SSam Leffler 	return AH_TRUE;
19414779705SSam Leffler }
19514779705SSam Leffler #endif
19614779705SSam Leffler 
197827660cfSAdrian Chadd /*
198827660cfSAdrian Chadd  * AGC calibration for the AR5416, AR9130, AR9160, AR9280.
199827660cfSAdrian Chadd  */
20014779705SSam Leffler HAL_BOOL
ar5416InitCalHardware(struct ath_hal * ah,const struct ieee80211_channel * chan)201c0b9002dSAdrian Chadd ar5416InitCalHardware(struct ath_hal *ah, const struct ieee80211_channel *chan)
20214779705SSam Leffler {
203827660cfSAdrian Chadd 
20412fefae2SRui Paulo 	if (AR_SREV_MERLIN_10_OR_LATER(ah)) {
205827660cfSAdrian Chadd 		/* Disable ADC */
206827660cfSAdrian Chadd 		OS_REG_CLR_BIT(ah, AR_PHY_ADC_CTL,
207827660cfSAdrian Chadd 		    AR_PHY_ADC_CTL_OFF_PWDADC);
208827660cfSAdrian Chadd 
20914779705SSam Leffler 		/* Enable Rx Filter Cal */
21014779705SSam Leffler 		OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
21114779705SSam Leffler 		    AR_PHY_AGC_CONTROL_FLTR_CAL);
21214779705SSam Leffler 	}
21314779705SSam Leffler 
21414779705SSam Leffler 	/* Calibrate the AGC */
21514779705SSam Leffler 	OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
21614779705SSam Leffler 
21714779705SSam Leffler 	/* Poll for offset calibration complete */
21812fefae2SRui Paulo 	if (!ath_hal_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 0)) {
21914779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY,
22012fefae2SRui Paulo 		    "%s: offset calibration did not complete in 1ms; "
22114779705SSam Leffler 		    "noisy environment?\n", __func__);
22214779705SSam Leffler 		return AH_FALSE;
22314779705SSam Leffler 	}
22414779705SSam Leffler 
225827660cfSAdrian Chadd 	if (AR_SREV_MERLIN_10_OR_LATER(ah)) {
226827660cfSAdrian Chadd 		/* Enable ADC */
227827660cfSAdrian Chadd 		OS_REG_SET_BIT(ah, AR_PHY_ADC_CTL,
228827660cfSAdrian Chadd 		    AR_PHY_ADC_CTL_OFF_PWDADC);
229827660cfSAdrian Chadd 
230827660cfSAdrian Chadd 		/* Disable Rx Filter Cal */
231827660cfSAdrian Chadd 		OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
232827660cfSAdrian Chadd 		    AR_PHY_AGC_CONTROL_FLTR_CAL);
233827660cfSAdrian Chadd 	}
234827660cfSAdrian Chadd 
235c0b9002dSAdrian Chadd 	return AH_TRUE;
236c0b9002dSAdrian Chadd }
237c0b9002dSAdrian Chadd 
238c0b9002dSAdrian Chadd /*
239c0b9002dSAdrian Chadd  * Initialize Calibration infrastructure.
240c0b9002dSAdrian Chadd  */
241d413a349SAdrian Chadd #define	MAX_CAL_CHECK		32
242c0b9002dSAdrian Chadd HAL_BOOL
ar5416InitCal(struct ath_hal * ah,const struct ieee80211_channel * chan)243c0b9002dSAdrian Chadd ar5416InitCal(struct ath_hal *ah, const struct ieee80211_channel *chan)
244c0b9002dSAdrian Chadd {
245c0b9002dSAdrian Chadd 	struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
246c0b9002dSAdrian Chadd 	HAL_CHANNEL_INTERNAL *ichan;
247c0b9002dSAdrian Chadd 
248c0b9002dSAdrian Chadd 	ichan = ath_hal_checkchannel(ah, chan);
249c0b9002dSAdrian Chadd 	HALASSERT(ichan != AH_NULL);
250c0b9002dSAdrian Chadd 
251c0b9002dSAdrian Chadd 	/* Do initial chipset-specific calibration */
252c0b9002dSAdrian Chadd 	if (! AH5416(ah)->ah_cal_initcal(ah, chan)) {
253827660cfSAdrian Chadd 		HALDEBUG(ah, HAL_DEBUG_ANY,
254827660cfSAdrian Chadd 		    "%s: initial chipset calibration did "
255c0b9002dSAdrian Chadd 		    "not complete in time; noisy environment?\n", __func__);
256c0b9002dSAdrian Chadd 		return AH_FALSE;
257c0b9002dSAdrian Chadd 	}
258c0b9002dSAdrian Chadd 
259c0b9002dSAdrian Chadd 	/* If there's PA Cal, do it */
260c0b9002dSAdrian Chadd 	if (AH5416(ah)->ah_cal_pacal)
261c0b9002dSAdrian Chadd 		AH5416(ah)->ah_cal_pacal(ah, AH_TRUE);
262c0b9002dSAdrian Chadd 
26314779705SSam Leffler 	/*
26414779705SSam Leffler 	 * Do NF calibration after DC offset and other CALs.
26514779705SSam Leffler 	 * Per system engineers, noise floor value can sometimes be 20 dB
26614779705SSam Leffler 	 * higher than normal value if DC offset and noise floor cal are
26714779705SSam Leffler 	 * triggered at the same time.
26814779705SSam Leffler 	 */
26914779705SSam Leffler 	OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
270d413a349SAdrian Chadd 
271d413a349SAdrian Chadd 	/*
27285191ae6SAdrian Chadd 	 * This may take a while to run; make sure subsequent
27385191ae6SAdrian Chadd 	 * calibration routines check that this has completed
27485191ae6SAdrian Chadd 	 * before reading the value and triggering a subsequent
27585191ae6SAdrian Chadd 	 * calibration.
276d413a349SAdrian Chadd 	 */
27714779705SSam Leffler 
27814779705SSam Leffler 	/* Initialize list pointers */
27914779705SSam Leffler 	cal->cal_list = cal->cal_last = cal->cal_curr = AH_NULL;
28014779705SSam Leffler 
28114779705SSam Leffler 	/*
28214779705SSam Leffler 	 * Enable IQ, ADC Gain, ADC DC Offset Cals
28314779705SSam Leffler 	 */
284307abf28SAdrian Chadd 	if (AR_SREV_HOWL(ah) || AR_SREV_SOWL_10_OR_LATER(ah)) {
28514779705SSam Leffler 		/* Setup all non-periodic, init time only calibrations */
28614779705SSam Leffler 		/* XXX: Init DC Offset not working yet */
28714779705SSam Leffler #if 0
28814779705SSam Leffler 		if (ar5416IsCalSupp(ah, chan, ADC_DC_INIT_CAL)) {
28914779705SSam Leffler 			INIT_CAL(&cal->adcDcCalInitData);
29014779705SSam Leffler 			INSERT_CAL(cal, &cal->adcDcCalInitData);
29114779705SSam Leffler 		}
29214779705SSam Leffler 		/* Initialize current pointer to first element in list */
29314779705SSam Leffler 		cal->cal_curr = cal->cal_list;
29414779705SSam Leffler 
29514779705SSam Leffler 		if (cal->ah_cal_curr != AH_NULL && !ar5416RunInitCals(ah, 0))
29614779705SSam Leffler 			return AH_FALSE;
29714779705SSam Leffler #endif
29814779705SSam Leffler 	}
29914779705SSam Leffler 
30014779705SSam Leffler 	/* If Cals are supported, add them to list via INIT/INSERT_CAL */
30114779705SSam Leffler 	if (ar5416IsCalSupp(ah, chan, ADC_GAIN_CAL)) {
30214779705SSam Leffler 		INIT_CAL(&cal->adcGainCalData);
30314779705SSam Leffler 		INSERT_CAL(cal, &cal->adcGainCalData);
30414779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_PERCAL,
30514779705SSam Leffler 		    "%s: enable ADC Gain Calibration.\n", __func__);
30614779705SSam Leffler 	}
30714779705SSam Leffler 	if (ar5416IsCalSupp(ah, chan, ADC_DC_CAL)) {
30814779705SSam Leffler 		INIT_CAL(&cal->adcDcCalData);
30914779705SSam Leffler 		INSERT_CAL(cal, &cal->adcDcCalData);
31014779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_PERCAL,
31114779705SSam Leffler 		    "%s: enable ADC DC Calibration.\n", __func__);
31214779705SSam Leffler 	}
31314779705SSam Leffler 	if (ar5416IsCalSupp(ah, chan, IQ_MISMATCH_CAL)) {
31414779705SSam Leffler 		INIT_CAL(&cal->iqCalData);
31514779705SSam Leffler 		INSERT_CAL(cal, &cal->iqCalData);
31614779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_PERCAL,
31714779705SSam Leffler 		    "%s: enable IQ Calibration.\n", __func__);
31814779705SSam Leffler 	}
31914779705SSam Leffler 	/* Initialize current pointer to first element in list */
32014779705SSam Leffler 	cal->cal_curr = cal->cal_list;
32114779705SSam Leffler 
32214779705SSam Leffler 	/* Kick off measurements for the first cal */
32314779705SSam Leffler 	if (cal->cal_curr != AH_NULL)
32414779705SSam Leffler 		ar5416ResetMeasurement(ah, cal->cal_curr);
32514779705SSam Leffler 
32614779705SSam Leffler 	/* Mark all calibrations on this channel as being invalid */
32714779705SSam Leffler 	ichan->calValid = 0;
32814779705SSam Leffler 
32914779705SSam Leffler 	return AH_TRUE;
330d413a349SAdrian Chadd #undef	MAX_CAL_CHECK
33114779705SSam Leffler }
33214779705SSam Leffler 
33314779705SSam Leffler /*
33414779705SSam Leffler  * Entry point for upper layers to restart current cal.
33514779705SSam Leffler  * Reset the calibration valid bit in channel.
33614779705SSam Leffler  */
33714779705SSam Leffler HAL_BOOL
ar5416ResetCalValid(struct ath_hal * ah,const struct ieee80211_channel * chan)33859efa8b5SSam Leffler ar5416ResetCalValid(struct ath_hal *ah, const struct ieee80211_channel *chan)
33914779705SSam Leffler {
34014779705SSam Leffler 	struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
34114779705SSam Leffler 	HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan);
34214779705SSam Leffler 	HAL_CAL_LIST *currCal = cal->cal_curr;
34314779705SSam Leffler 
34414779705SSam Leffler 	if (!AR_SREV_SOWL_10_OR_LATER(ah))
34514779705SSam Leffler 		return AH_FALSE;
34614779705SSam Leffler 	if (currCal == AH_NULL)
34714779705SSam Leffler 		return AH_FALSE;
34814779705SSam Leffler 	if (ichan == AH_NULL) {
34914779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY,
35014779705SSam Leffler 		    "%s: invalid channel %u/0x%x; no mapping\n",
35159efa8b5SSam Leffler 		    __func__, chan->ic_freq, chan->ic_flags);
35214779705SSam Leffler 		return AH_FALSE;
35314779705SSam Leffler 	}
35414779705SSam Leffler 	/*
35514779705SSam Leffler 	 * Expected that this calibration has run before, post-reset.
35614779705SSam Leffler 	 * Current state should be done
35714779705SSam Leffler 	 */
35814779705SSam Leffler 	if (currCal->calState != CAL_DONE) {
35914779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY,
36014779705SSam Leffler 		    "%s: Calibration state incorrect, %d\n",
36114779705SSam Leffler 		    __func__, currCal->calState);
36214779705SSam Leffler 		return AH_FALSE;
36314779705SSam Leffler 	}
36414779705SSam Leffler 
36514779705SSam Leffler 	/* Verify Cal is supported on this channel */
36614779705SSam Leffler 	if (!ar5416IsCalSupp(ah, chan, currCal->calData->calType))
36714779705SSam Leffler 		return AH_FALSE;
36814779705SSam Leffler 
36914779705SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_PERCAL,
37014779705SSam Leffler 	    "%s: Resetting Cal %d state for channel %u/0x%x\n",
37159efa8b5SSam Leffler 	    __func__, currCal->calData->calType, chan->ic_freq,
37259efa8b5SSam Leffler 	    chan->ic_flags);
37314779705SSam Leffler 
37414779705SSam Leffler 	/* Disable cal validity in channel */
37514779705SSam Leffler 	ichan->calValid &= ~currCal->calData->calType;
37614779705SSam Leffler 	currCal->calState = CAL_WAITING;
37714779705SSam Leffler 
37814779705SSam Leffler 	return AH_TRUE;
37914779705SSam Leffler }
38014779705SSam Leffler 
38114779705SSam Leffler /*
38214779705SSam Leffler  * Recalibrate the lower PHY chips to account for temperature/environment
38314779705SSam Leffler  * changes.
38414779705SSam Leffler  */
38514779705SSam Leffler static void
ar5416DoCalibration(struct ath_hal * ah,HAL_CHANNEL_INTERNAL * ichan,uint8_t rxchainmask,HAL_CAL_LIST * currCal,HAL_BOOL * isCalDone)38614779705SSam Leffler ar5416DoCalibration(struct ath_hal *ah,  HAL_CHANNEL_INTERNAL *ichan,
38714779705SSam Leffler 	uint8_t rxchainmask, HAL_CAL_LIST *currCal, HAL_BOOL *isCalDone)
38814779705SSam Leffler {
38914779705SSam Leffler 	struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
39014779705SSam Leffler 
39114779705SSam Leffler 	/* Cal is assumed not done until explicitly set below */
39214779705SSam Leffler 	*isCalDone = AH_FALSE;
39314779705SSam Leffler 
39414779705SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_PERCAL,
39514779705SSam Leffler 	    "%s: %s Calibration, state %d, calValid 0x%x\n",
39614779705SSam Leffler 	    __func__, currCal->calData->calName, currCal->calState,
39714779705SSam Leffler 	    ichan->calValid);
39814779705SSam Leffler 
39914779705SSam Leffler 	/* Calibration in progress. */
40014779705SSam Leffler 	if (currCal->calState == CAL_RUNNING) {
40114779705SSam Leffler 		/* Check to see if it has finished. */
40214779705SSam Leffler 		if (!(OS_REG_READ(ah, AR_PHY_TIMING_CTRL4) & AR_PHY_TIMING_CTRL4_DO_CAL)) {
40314779705SSam Leffler 			HALDEBUG(ah, HAL_DEBUG_PERCAL,
40414779705SSam Leffler 			    "%s: sample %d of %d finished\n",
40514779705SSam Leffler 			    __func__, cal->calSamples,
40614779705SSam Leffler 			    currCal->calData->calNumSamples);
40714779705SSam Leffler 			/*
40814779705SSam Leffler 			 * Collect measurements for active chains.
40914779705SSam Leffler 			 */
41014779705SSam Leffler 			currCal->calData->calCollect(ah);
41114779705SSam Leffler 			if (++cal->calSamples >= currCal->calData->calNumSamples) {
41214779705SSam Leffler 				int i, numChains = 0;
41314779705SSam Leffler 				for (i = 0; i < AR5416_MAX_CHAINS; i++) {
41414779705SSam Leffler 					if (rxchainmask & (1 << i))
41514779705SSam Leffler 						numChains++;
41614779705SSam Leffler 				}
41714779705SSam Leffler 				/*
41814779705SSam Leffler 				 * Process accumulated data
41914779705SSam Leffler 				 */
42014779705SSam Leffler 				currCal->calData->calPostProc(ah, numChains);
42114779705SSam Leffler 
42214779705SSam Leffler 				/* Calibration has finished. */
42314779705SSam Leffler 				ichan->calValid |= currCal->calData->calType;
42414779705SSam Leffler 				currCal->calState = CAL_DONE;
42514779705SSam Leffler 				*isCalDone = AH_TRUE;
42614779705SSam Leffler 			} else {
42714779705SSam Leffler 				/*
42814779705SSam Leffler 				 * Set-up to collect of another sub-sample.
42914779705SSam Leffler 				 */
43014779705SSam Leffler 				ar5416SetupMeasurement(ah, currCal);
43114779705SSam Leffler 			}
43214779705SSam Leffler 		}
43314779705SSam Leffler 	} else if (!(ichan->calValid & currCal->calData->calType)) {
43414779705SSam Leffler 		/* If current cal is marked invalid in channel, kick it off */
43514779705SSam Leffler 		ar5416ResetMeasurement(ah, currCal);
43614779705SSam Leffler 	}
43714779705SSam Leffler }
43814779705SSam Leffler 
43914779705SSam Leffler /*
44014779705SSam Leffler  * Internal interface to schedule periodic calibration work.
44114779705SSam Leffler  */
44214779705SSam Leffler HAL_BOOL
ar5416PerCalibrationN(struct ath_hal * ah,struct ieee80211_channel * chan,u_int rxchainmask,HAL_BOOL longcal,HAL_BOOL * isCalDone)44359efa8b5SSam Leffler ar5416PerCalibrationN(struct ath_hal *ah, struct ieee80211_channel *chan,
44414779705SSam Leffler 	u_int rxchainmask, HAL_BOOL longcal, HAL_BOOL *isCalDone)
44514779705SSam Leffler {
44614779705SSam Leffler 	struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
44714779705SSam Leffler 	HAL_CAL_LIST *currCal = cal->cal_curr;
44814779705SSam Leffler 	HAL_CHANNEL_INTERNAL *ichan;
4496b00c928SAdrian Chadd 	int r;
45014779705SSam Leffler 
45150d5ad0eSSam Leffler 	OS_MARK(ah, AH_MARK_PERCAL, chan->ic_freq);
45214779705SSam Leffler 
45314779705SSam Leffler 	*isCalDone = AH_TRUE;
45414779705SSam Leffler 
455ccf98f5dSAdrian Chadd 	/*
456ccf98f5dSAdrian Chadd 	 * Since ath_hal calls the PerCal method with rxchainmask=0x1;
457ccf98f5dSAdrian Chadd 	 * override it with the current chainmask. The upper levels currently
458ccf98f5dSAdrian Chadd 	 * doesn't know about the chainmask.
459ccf98f5dSAdrian Chadd 	 */
460ccf98f5dSAdrian Chadd 	rxchainmask = AH5416(ah)->ah_rx_chainmask;
461ccf98f5dSAdrian Chadd 
46214779705SSam Leffler 	/* Invalid channel check */
46314779705SSam Leffler 	ichan = ath_hal_checkchannel(ah, chan);
46414779705SSam Leffler 	if (ichan == AH_NULL) {
46514779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY,
46614779705SSam Leffler 		    "%s: invalid channel %u/0x%x; no mapping\n",
46759efa8b5SSam Leffler 		    __func__, chan->ic_freq, chan->ic_flags);
46814779705SSam Leffler 		return AH_FALSE;
46914779705SSam Leffler 	}
47014779705SSam Leffler 
47114779705SSam Leffler 	/*
47214779705SSam Leffler 	 * For given calibration:
47314779705SSam Leffler 	 * 1. Call generic cal routine
47414779705SSam Leffler 	 * 2. When this cal is done (isCalDone) if we have more cals waiting
47514779705SSam Leffler 	 *    (eg after reset), mask this to upper layers by not propagating
47614779705SSam Leffler 	 *    isCalDone if it is set to TRUE.
47714779705SSam Leffler 	 *    Instead, change isCalDone to FALSE and setup the waiting cal(s)
47814779705SSam Leffler 	 *    to be run.
47914779705SSam Leffler 	 */
48014779705SSam Leffler 	if (currCal != AH_NULL &&
48114779705SSam Leffler 	    (currCal->calState == CAL_RUNNING ||
48214779705SSam Leffler 	     currCal->calState == CAL_WAITING)) {
48314779705SSam Leffler 		ar5416DoCalibration(ah, ichan, rxchainmask, currCal, isCalDone);
48414779705SSam Leffler 		if (*isCalDone == AH_TRUE) {
48514779705SSam Leffler 			cal->cal_curr = currCal = currCal->calNext;
48614779705SSam Leffler 			if (currCal->calState == CAL_WAITING) {
48714779705SSam Leffler 				*isCalDone = AH_FALSE;
48814779705SSam Leffler 				ar5416ResetMeasurement(ah, currCal);
48914779705SSam Leffler 			}
49014779705SSam Leffler 		}
49114779705SSam Leffler 	}
49214779705SSam Leffler 
49314779705SSam Leffler 	/* Do NF cal only at longer intervals */
49414779705SSam Leffler 	if (longcal) {
495c0b9002dSAdrian Chadd 		/* Do PA calibration if the chipset supports */
496c0b9002dSAdrian Chadd 		if (AH5416(ah)->ah_cal_pacal)
497c0b9002dSAdrian Chadd 			AH5416(ah)->ah_cal_pacal(ah, AH_FALSE);
498c0b9002dSAdrian Chadd 
4994342b610SAdrian Chadd 		/* Do open-loop temperature compensation if the chipset needs it */
5004342b610SAdrian Chadd 		if (ath_hal_eepromGetFlag(ah, AR_EEP_OL_PWRCTRL))
50148c1d364SAdrian Chadd 			AH5416(ah)->ah_olcTempCompensation(ah);
50248c1d364SAdrian Chadd 
50314779705SSam Leffler 		/*
50414779705SSam Leffler 		 * Get the value from the previous NF cal
50514779705SSam Leffler 		 * and update the history buffer.
50614779705SSam Leffler 		 */
5076b00c928SAdrian Chadd 		r = ar5416GetNf(ah, chan);
5080148401aSAdrian Chadd 		if (r == 0 || r == -1) {
5096b00c928SAdrian Chadd 			/* NF calibration result isn't valid */
5106b00c928SAdrian Chadd 			HALDEBUG(ah, HAL_DEBUG_UNMASKABLE, "%s: NF calibration"
5116b00c928SAdrian Chadd 			    " didn't finish; delaying CCA\n", __func__);
5126b00c928SAdrian Chadd 		} else {
513*8a97beffSAdrian Chadd 			int ret;
51414779705SSam Leffler 			/*
5156b00c928SAdrian Chadd 			 * NF calibration result is valid.
5166b00c928SAdrian Chadd 			 *
51714779705SSam Leffler 			 * Load the NF from history buffer of the current channel.
51814779705SSam Leffler 			 * NF is slow time-variant, so it is OK to use a
51914779705SSam Leffler 			 * historical value.
52014779705SSam Leffler 			 */
521*8a97beffSAdrian Chadd 			ret = ar5416LoadNF(ah, AH_PRIVATE(ah)->ah_curchan);
52214779705SSam Leffler 
52314779705SSam Leffler 			/* start NF calibration, without updating BB NF register*/
52414779705SSam Leffler 			ar5416StartNFCal(ah);
525*8a97beffSAdrian Chadd 
526*8a97beffSAdrian Chadd 			/*
527*8a97beffSAdrian Chadd 			 * If we failed calibration then tell the driver
528*8a97beffSAdrian Chadd 			 * we failed and it should do a full chip reset
529*8a97beffSAdrian Chadd 			 */
530*8a97beffSAdrian Chadd 			if (! ret)
531*8a97beffSAdrian Chadd 				return AH_FALSE;
53214779705SSam Leffler 		}
5336b00c928SAdrian Chadd 	}
53414779705SSam Leffler 	return AH_TRUE;
53514779705SSam Leffler }
53614779705SSam Leffler 
53714779705SSam Leffler /*
53814779705SSam Leffler  * Recalibrate the lower PHY chips to account for temperature/environment
53914779705SSam Leffler  * changes.
54014779705SSam Leffler  */
54114779705SSam Leffler HAL_BOOL
ar5416PerCalibration(struct ath_hal * ah,struct ieee80211_channel * chan,HAL_BOOL * isIQdone)54259efa8b5SSam Leffler ar5416PerCalibration(struct ath_hal *ah, struct ieee80211_channel *chan,
54359efa8b5SSam Leffler 	HAL_BOOL *isIQdone)
54414779705SSam Leffler {
54514779705SSam Leffler 	struct ath_hal_5416 *ahp = AH5416(ah);
54614779705SSam Leffler 	struct ar5416PerCal *cal = &AH5416(ah)->ah_cal;
54714779705SSam Leffler 	HAL_CAL_LIST *curCal = cal->cal_curr;
54814779705SSam Leffler 
54914779705SSam Leffler 	if (curCal != AH_NULL && curCal->calData->calType == IQ_MISMATCH_CAL) {
55014779705SSam Leffler 		return ar5416PerCalibrationN(ah, chan, ahp->ah_rx_chainmask,
55114779705SSam Leffler 		    AH_TRUE, isIQdone);
55214779705SSam Leffler 	} else {
55314779705SSam Leffler 		HAL_BOOL isCalDone;
55414779705SSam Leffler 
55514779705SSam Leffler 		*isIQdone = AH_FALSE;
55614779705SSam Leffler 		return ar5416PerCalibrationN(ah, chan, ahp->ah_rx_chainmask,
55714779705SSam Leffler 		    AH_TRUE, &isCalDone);
55814779705SSam Leffler 	}
55914779705SSam Leffler }
56014779705SSam Leffler 
56114779705SSam Leffler static HAL_BOOL
ar5416GetEepromNoiseFloorThresh(struct ath_hal * ah,const struct ieee80211_channel * chan,int16_t * nft)56214779705SSam Leffler ar5416GetEepromNoiseFloorThresh(struct ath_hal *ah,
56359efa8b5SSam Leffler 	const struct ieee80211_channel *chan, int16_t *nft)
56414779705SSam Leffler {
56559efa8b5SSam Leffler 	if (IEEE80211_IS_CHAN_5GHZ(chan)) {
56614779705SSam Leffler 		ath_hal_eepromGet(ah, AR_EEP_NFTHRESH_5, nft);
56714779705SSam Leffler 		return AH_TRUE;
56814779705SSam Leffler 	}
56959efa8b5SSam Leffler 	if (IEEE80211_IS_CHAN_2GHZ(chan)) {
57059efa8b5SSam Leffler 		ath_hal_eepromGet(ah, AR_EEP_NFTHRESH_2, nft);
57159efa8b5SSam Leffler 		return AH_TRUE;
57259efa8b5SSam Leffler 	}
57359efa8b5SSam Leffler 	HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
57459efa8b5SSam Leffler 	    __func__, chan->ic_flags);
57559efa8b5SSam Leffler 	return AH_FALSE;
57659efa8b5SSam Leffler }
57714779705SSam Leffler 
57814779705SSam Leffler static void
ar5416StartNFCal(struct ath_hal * ah)57914779705SSam Leffler ar5416StartNFCal(struct ath_hal *ah)
58014779705SSam Leffler {
58114779705SSam Leffler 	OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_ENABLE_NF);
58214779705SSam Leffler 	OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
58314779705SSam Leffler 	OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
58414779705SSam Leffler }
58514779705SSam Leffler 
586*8a97beffSAdrian Chadd static HAL_BOOL
ar5416LoadNF(struct ath_hal * ah,const struct ieee80211_channel * chan)58759efa8b5SSam Leffler ar5416LoadNF(struct ath_hal *ah, const struct ieee80211_channel *chan)
58814779705SSam Leffler {
58914779705SSam Leffler 	static const uint32_t ar5416_cca_regs[] = {
59014779705SSam Leffler 		AR_PHY_CCA,
59114779705SSam Leffler 		AR_PHY_CH1_CCA,
59214779705SSam Leffler 		AR_PHY_CH2_CCA,
59314779705SSam Leffler 		AR_PHY_EXT_CCA,
59414779705SSam Leffler 		AR_PHY_CH1_EXT_CCA,
59514779705SSam Leffler 		AR_PHY_CH2_EXT_CCA
59614779705SSam Leffler 	};
59714779705SSam Leffler 	struct ar5212NfCalHist *h;
59852f81b67SAdrian Chadd 	int i;
59914779705SSam Leffler 	int32_t val;
60014779705SSam Leffler 	uint8_t chainmask;
601c6c9d8c8SAdrian Chadd 	int16_t default_nf = ar5416GetDefaultNF(ah, chan);
60214779705SSam Leffler 
60314779705SSam Leffler 	/*
60414779705SSam Leffler 	 * Force NF calibration for all chains.
60514779705SSam Leffler 	 */
60614779705SSam Leffler 	if (AR_SREV_KITE(ah)) {
60714779705SSam Leffler 		/* Kite has only one chain */
60814779705SSam Leffler 		chainmask = 0x9;
6091ecf8ddfSAdrian Chadd 	} else if (AR_SREV_MERLIN(ah) || AR_SREV_KIWI(ah)) {
6101ecf8ddfSAdrian Chadd 		/* Merlin/Kiwi has only two chains */
61114779705SSam Leffler 		chainmask = 0x1B;
61214779705SSam Leffler 	} else {
61314779705SSam Leffler 		chainmask = 0x3F;
61414779705SSam Leffler 	}
61514779705SSam Leffler 
61614779705SSam Leffler 	/*
61714779705SSam Leffler 	 * Write filtered NF values into maxCCApwr register parameter
61814779705SSam Leffler 	 * so we can load below.
61914779705SSam Leffler 	 */
62014779705SSam Leffler 	h = AH5416(ah)->ah_cal.nfCalHist;
621c6c9d8c8SAdrian Chadd 	HALDEBUG(ah, HAL_DEBUG_NFCAL, "CCA: ");
622c6c9d8c8SAdrian Chadd 	for (i = 0; i < AR5416_NUM_NF_READINGS; i ++) {
62347ff47a8SAdrian Chadd 		/* Don't write to EXT radio CCA registers unless in HT/40 mode */
6241e918679SAdrian Chadd 		/* XXX this check should really be cleaner! */
62547ff47a8SAdrian Chadd 		if (i > 2 && !IEEE80211_IS_CHAN_HT40(chan))
6261e918679SAdrian Chadd 			continue;
6271e918679SAdrian Chadd 
62814779705SSam Leffler 		if (chainmask & (1 << i)) {
629c6c9d8c8SAdrian Chadd 			int16_t nf_val;
630c6c9d8c8SAdrian Chadd 
631c6c9d8c8SAdrian Chadd 			if (h)
632c6c9d8c8SAdrian Chadd 				nf_val = h[i].privNF;
633c6c9d8c8SAdrian Chadd 			else
634c6c9d8c8SAdrian Chadd 				nf_val = default_nf;
635c6c9d8c8SAdrian Chadd 
63614779705SSam Leffler 			val = OS_REG_READ(ah, ar5416_cca_regs[i]);
63714779705SSam Leffler 			val &= 0xFFFFFE00;
638c6c9d8c8SAdrian Chadd 			val |= (((uint32_t) nf_val << 1) & 0x1ff);
639c6c9d8c8SAdrian Chadd 			HALDEBUG(ah, HAL_DEBUG_NFCAL, "[%d: %d]", i, nf_val);
64014779705SSam Leffler 			OS_REG_WRITE(ah, ar5416_cca_regs[i], val);
64114779705SSam Leffler 		}
642c6c9d8c8SAdrian Chadd 	}
643c6c9d8c8SAdrian Chadd 	HALDEBUG(ah, HAL_DEBUG_NFCAL, "\n");
64414779705SSam Leffler 
64514779705SSam Leffler 	/* Load software filtered NF value into baseband internal minCCApwr variable. */
64614779705SSam Leffler 	OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_ENABLE_NF);
64714779705SSam Leffler 	OS_REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
64814779705SSam Leffler 	OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
64914779705SSam Leffler 
650d86cdfe4SAdrian Chadd 	/* Wait for load to complete, should be fast, a few 10s of us. */
651cf5d42d4SAdrian Chadd 	if (! ar5212WaitNFCalComplete(ah, 1000)) {
65252f81b67SAdrian Chadd 		/*
65352f81b67SAdrian Chadd 		 * We timed out waiting for the noisefloor to load, probably due to an
65452f81b67SAdrian Chadd 		 * in-progress rx. Simply return here and allow the load plenty of time
65552f81b67SAdrian Chadd 		 * to complete before the next calibration interval.  We need to avoid
65652f81b67SAdrian Chadd 		 * trying to load -50 (which happens below) while the previous load is
65752f81b67SAdrian Chadd 		 * still in progress as this can cause rx deafness. Instead by returning
65852f81b67SAdrian Chadd 		 * here, the baseband nf cal will just be capped by our present
65952f81b67SAdrian Chadd 		 * noisefloor until the next calibration timer.
66052f81b67SAdrian Chadd 		 */
661fd331bf9SAdrian Chadd 		HALDEBUG(ah, HAL_DEBUG_UNMASKABLE, "Timeout while waiting for "
662fd331bf9SAdrian Chadd 		    "nf to load: AR_PHY_AGC_CONTROL=0x%x\n",
66352f81b67SAdrian Chadd 		    OS_REG_READ(ah, AR_PHY_AGC_CONTROL));
664*8a97beffSAdrian Chadd 		return AH_FALSE;
66514779705SSam Leffler 	}
66614779705SSam Leffler 
66714779705SSam Leffler 	/*
66814779705SSam Leffler 	 * Restore maxCCAPower register parameter again so that we're not capped
66914779705SSam Leffler 	 * by the median we just loaded.  This will be initial (and max) value
67014779705SSam Leffler 	 * of next noise floor calibration the baseband does.
67114779705SSam Leffler 	 */
67230696562SAdrian Chadd 	for (i = 0; i < AR5416_NUM_NF_READINGS; i ++) {
67347ff47a8SAdrian Chadd 		/* Don't write to EXT radio CCA registers unless in HT/40 mode */
67447ff47a8SAdrian Chadd 		/* XXX this check should really be cleaner! */
67547ff47a8SAdrian Chadd 		if (i > 2 && !IEEE80211_IS_CHAN_HT40(chan))
67647ff47a8SAdrian Chadd 			continue;
67747ff47a8SAdrian Chadd 
67814779705SSam Leffler 		if (chainmask & (1 << i)) {
67914779705SSam Leffler 			val = OS_REG_READ(ah, ar5416_cca_regs[i]);
68014779705SSam Leffler 			val &= 0xFFFFFE00;
68114779705SSam Leffler 			val |= (((uint32_t)(-50) << 1) & 0x1ff);
68214779705SSam Leffler 			OS_REG_WRITE(ah, ar5416_cca_regs[i], val);
68314779705SSam Leffler 		}
68414779705SSam Leffler 	}
685*8a97beffSAdrian Chadd 	return AH_TRUE;
68630696562SAdrian Chadd }
68714779705SSam Leffler 
688c6c9d8c8SAdrian Chadd /*
689c6c9d8c8SAdrian Chadd  * This just initialises the "good" values for AR5416 which
690c6c9d8c8SAdrian Chadd  * may not be right; it'lll be overridden by ar5416SanitizeNF()
691c6c9d8c8SAdrian Chadd  * to nominal values.
692c6c9d8c8SAdrian Chadd  */
69314779705SSam Leffler void
ar5416InitNfHistBuff(struct ar5212NfCalHist * h)69412fefae2SRui Paulo ar5416InitNfHistBuff(struct ar5212NfCalHist *h)
69514779705SSam Leffler {
69614779705SSam Leffler 	int i, j;
69714779705SSam Leffler 
69814779705SSam Leffler 	for (i = 0; i < AR5416_NUM_NF_READINGS; i ++) {
69914779705SSam Leffler 		h[i].currIndex = 0;
70014779705SSam Leffler 		h[i].privNF = AR5416_CCA_MAX_GOOD_VALUE;
70114779705SSam Leffler 		h[i].invalidNFcount = AR512_NF_CAL_HIST_MAX;
70214779705SSam Leffler 		for (j = 0; j < AR512_NF_CAL_HIST_MAX; j ++)
70314779705SSam Leffler 			h[i].nfCalBuffer[j] = AR5416_CCA_MAX_GOOD_VALUE;
70414779705SSam Leffler 	}
70514779705SSam Leffler }
70614779705SSam Leffler 
70714779705SSam Leffler /*
70814779705SSam Leffler  * Update the noise floor buffer as a ring buffer
70914779705SSam Leffler  */
71014779705SSam Leffler static void
ar5416UpdateNFHistBuff(struct ath_hal * ah,struct ar5212NfCalHist * h,int16_t * nfarray)71147ff47a8SAdrian Chadd ar5416UpdateNFHistBuff(struct ath_hal *ah, struct ar5212NfCalHist *h,
71247ff47a8SAdrian Chadd     int16_t *nfarray)
71314779705SSam Leffler {
71414779705SSam Leffler 	int i;
71514779705SSam Leffler 
71647ff47a8SAdrian Chadd 	/* XXX TODO: don't record nfarray[] entries for inactive chains */
71714779705SSam Leffler 	for (i = 0; i < AR5416_NUM_NF_READINGS; i ++) {
71814779705SSam Leffler 		h[i].nfCalBuffer[h[i].currIndex] = nfarray[i];
71914779705SSam Leffler 
72014779705SSam Leffler 		if (++h[i].currIndex >= AR512_NF_CAL_HIST_MAX)
72114779705SSam Leffler 			h[i].currIndex = 0;
72214779705SSam Leffler 		if (h[i].invalidNFcount > 0) {
72314779705SSam Leffler 			if (nfarray[i] < AR5416_CCA_MIN_BAD_VALUE ||
72414779705SSam Leffler 			    nfarray[i] > AR5416_CCA_MAX_HIGH_VALUE) {
72514779705SSam Leffler 				h[i].invalidNFcount = AR512_NF_CAL_HIST_MAX;
72614779705SSam Leffler 			} else {
72714779705SSam Leffler 				h[i].invalidNFcount--;
72814779705SSam Leffler 				h[i].privNF = nfarray[i];
72914779705SSam Leffler 			}
73014779705SSam Leffler 		} else {
73114779705SSam Leffler 			h[i].privNF = ar5212GetNfHistMid(h[i].nfCalBuffer);
73214779705SSam Leffler 		}
73314779705SSam Leffler 	}
73414779705SSam Leffler }
73514779705SSam Leffler 
736c6c9d8c8SAdrian Chadd static uint16_t
ar5416GetDefaultNF(struct ath_hal * ah,const struct ieee80211_channel * chan)737c6c9d8c8SAdrian Chadd ar5416GetDefaultNF(struct ath_hal *ah, const struct ieee80211_channel *chan)
738c6c9d8c8SAdrian Chadd {
739c6c9d8c8SAdrian Chadd         struct ar5416NfLimits *limit;
740c6c9d8c8SAdrian Chadd 
741c6c9d8c8SAdrian Chadd         if (!chan || IEEE80211_IS_CHAN_2GHZ(chan))
742c6c9d8c8SAdrian Chadd                 limit = &AH5416(ah)->nf_2g;
743c6c9d8c8SAdrian Chadd         else
744c6c9d8c8SAdrian Chadd                 limit = &AH5416(ah)->nf_5g;
745c6c9d8c8SAdrian Chadd 
746c6c9d8c8SAdrian Chadd         return limit->nominal;
747c6c9d8c8SAdrian Chadd }
748c6c9d8c8SAdrian Chadd 
749c6c9d8c8SAdrian Chadd static void
ar5416SanitizeNF(struct ath_hal * ah,int16_t * nf)750c6c9d8c8SAdrian Chadd ar5416SanitizeNF(struct ath_hal *ah, int16_t *nf)
751c6c9d8c8SAdrian Chadd {
752c6c9d8c8SAdrian Chadd 
753c6c9d8c8SAdrian Chadd         struct ar5416NfLimits *limit;
754c6c9d8c8SAdrian Chadd         int i;
755c6c9d8c8SAdrian Chadd 
756c6c9d8c8SAdrian Chadd         if (IEEE80211_IS_CHAN_2GHZ(AH_PRIVATE(ah)->ah_curchan))
757c6c9d8c8SAdrian Chadd                 limit = &AH5416(ah)->nf_2g;
758c6c9d8c8SAdrian Chadd         else
759c6c9d8c8SAdrian Chadd                 limit = &AH5416(ah)->nf_5g;
760c6c9d8c8SAdrian Chadd 
761c6c9d8c8SAdrian Chadd         for (i = 0; i < AR5416_NUM_NF_READINGS; i++) {
762c6c9d8c8SAdrian Chadd                 if (!nf[i])
763c6c9d8c8SAdrian Chadd                         continue;
764c6c9d8c8SAdrian Chadd 
765c6c9d8c8SAdrian Chadd                 if (nf[i] > limit->max) {
766c6c9d8c8SAdrian Chadd                         HALDEBUG(ah, HAL_DEBUG_NFCAL,
767c6c9d8c8SAdrian Chadd                                   "NF[%d] (%d) > MAX (%d), correcting to MAX\n",
768c6c9d8c8SAdrian Chadd                                   i, nf[i], limit->max);
769c6c9d8c8SAdrian Chadd                         nf[i] = limit->max;
770c6c9d8c8SAdrian Chadd                 } else if (nf[i] < limit->min) {
771c6c9d8c8SAdrian Chadd                         HALDEBUG(ah, HAL_DEBUG_NFCAL,
772c6c9d8c8SAdrian Chadd                                   "NF[%d] (%d) < MIN (%d), correcting to NOM\n",
773c6c9d8c8SAdrian Chadd                                   i, nf[i], limit->min);
774c6c9d8c8SAdrian Chadd                         nf[i] = limit->nominal;
775c6c9d8c8SAdrian Chadd                 }
776c6c9d8c8SAdrian Chadd         }
777c6c9d8c8SAdrian Chadd }
778c6c9d8c8SAdrian Chadd 
77914779705SSam Leffler /*
780f6b6084bSPedro F. Giffuni  * Read the NF and check it against the noise floor threshold
7816b00c928SAdrian Chadd  *
7826b00c928SAdrian Chadd  * Return 0 if the NF calibration hadn't finished, 0 if it was
7836b00c928SAdrian Chadd  * invalid, or > 0 for a valid NF reading.
78414779705SSam Leffler  */
78514779705SSam Leffler static int16_t
ar5416GetNf(struct ath_hal * ah,struct ieee80211_channel * chan)78659efa8b5SSam Leffler ar5416GetNf(struct ath_hal *ah, struct ieee80211_channel *chan)
78714779705SSam Leffler {
78814779705SSam Leffler 	int16_t nf, nfThresh;
789f1ff1148SAdrian Chadd 	int i;
7906b00c928SAdrian Chadd 	int retval = 0;
79114779705SSam Leffler 
7925215ce10SAdrian Chadd 	if (ar5212IsNFCalInProgress(ah)) {
79314779705SSam Leffler 		HALDEBUG(ah, HAL_DEBUG_ANY,
79414779705SSam Leffler 		    "%s: NF didn't complete in calibration window\n", __func__);
79514779705SSam Leffler 		nf = 0;
7966b00c928SAdrian Chadd 		retval = -1;	/* NF didn't finish */
79714779705SSam Leffler 	} else {
79814779705SSam Leffler 		/* Finished NF cal, check against threshold */
79914779705SSam Leffler 		int16_t nfarray[NUM_NOISEFLOOR_READINGS] = { 0 };
80059efa8b5SSam Leffler 		HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan);
80114779705SSam Leffler 
80214779705SSam Leffler 		/* TODO - enhance for multiple chains and ext ch */
80314779705SSam Leffler 		ath_hal_getNoiseFloor(ah, nfarray);
80414779705SSam Leffler 		nf = nfarray[0];
805c6c9d8c8SAdrian Chadd 		ar5416SanitizeNF(ah, nfarray);
80614779705SSam Leffler 		if (ar5416GetEepromNoiseFloorThresh(ah, chan, &nfThresh)) {
80714779705SSam Leffler 			if (nf > nfThresh) {
8086b00c928SAdrian Chadd 				HALDEBUG(ah, HAL_DEBUG_UNMASKABLE,
80914779705SSam Leffler 				    "%s: noise floor failed detected; "
81014779705SSam Leffler 				    "detected %d, threshold %d\n", __func__,
81114779705SSam Leffler 				    nf, nfThresh);
81214779705SSam Leffler 				/*
81314779705SSam Leffler 				 * NB: Don't discriminate 2.4 vs 5Ghz, if this
81414779705SSam Leffler 				 *     happens it indicates a problem regardless
81514779705SSam Leffler 				 *     of the band.
81614779705SSam Leffler 				 */
81759efa8b5SSam Leffler 				chan->ic_state |= IEEE80211_CHANSTATE_CWINT;
81814779705SSam Leffler 				nf = 0;
8196b00c928SAdrian Chadd 				retval = 0;
82014779705SSam Leffler 			}
82114779705SSam Leffler 		} else {
82214779705SSam Leffler 			nf = 0;
8236b00c928SAdrian Chadd 			retval = 0;
82414779705SSam Leffler 		}
825f1ff1148SAdrian Chadd 		/* Update MIMO channel statistics, regardless of validity or not (for now) */
826f1ff1148SAdrian Chadd 		for (i = 0; i < 3; i++) {
827f1ff1148SAdrian Chadd 			ichan->noiseFloorCtl[i] = nfarray[i];
828f1ff1148SAdrian Chadd 			ichan->noiseFloorExt[i] = nfarray[i + 3];
829f1ff1148SAdrian Chadd 		}
830f1ff1148SAdrian Chadd 		ichan->privFlags |= CHANNEL_MIMO_NF_VALID;
831f1ff1148SAdrian Chadd 
83247ff47a8SAdrian Chadd 		ar5416UpdateNFHistBuff(ah, AH5416(ah)->ah_cal.nfCalHist, nfarray);
83359efa8b5SSam Leffler 		ichan->rawNoiseFloor = nf;
8346b00c928SAdrian Chadd 		retval = nf;
83514779705SSam Leffler 	}
8366b00c928SAdrian Chadd 	return retval;
83714779705SSam Leffler }
838