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Searched full:extal (Results 1 – 25 of 66) sorted by relevance

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/linux/arch/arm/mach-shmobile/
H A Dsetup-rcar-gen2.c22 { .compatible = "renesas,r8a7742-cpg-mssr", .data = "extal" },
23 { .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" },
24 { .compatible = "renesas,r8a7744-cpg-mssr", .data = "extal" },
25 { .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" },
26 { .compatible = "renesas,r8a7791-cpg-mssr", .data = "extal" },
27 { .compatible = "renesas,r8a7793-cpg-mssr", .data = "extal" },
34 struct device_node *cpg, *extal; in get_extal_freq() local
44 extal = of_parse_phandle(cpg, "clocks", idx); in get_extal_freq()
46 if (!extal) in get_extal_freq()
49 of_property_read_u32(extal, "clock-frequency", &freq); in get_extal_freq()
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,lvds.yaml100 - description: EXTAL input clock
108 # The LVDS encoder can use the EXTAL or DU_DOTCLKINx clocks.
111 - extal
115 - extal
119 - extal
181 clock-names = "fck", "dclkin.0", "extal";
212 clock-names = "fck", "dclkin.0", "extal";
/linux/drivers/clk/renesas/
H A Drcar-usb2-clock-sel.c39 bool extal; member
49 priv->extal, priv->xtal, val); in usb2_clock_sel_enable_extal_only()
51 if (priv->extal && !priv->xtal && val != CLKSET0_EXTAL_ONLY) in usb2_clock_sel_enable_extal_only()
57 if (priv->extal && !priv->xtal) in usb2_clock_sel_disable_extal_only()
164 priv->extal = !!clk_get_rate(clk); in rcar_usb2_clock_sel_probe()
173 if (!priv->extal && !priv->xtal) { in rcar_usb2_clock_sel_probe()
H A Dr8a77470-cpg-mssr.c39 DEF_INPUT("extal", CLK_EXTAL),
173 * MD EXTAL PLL0 PLL1 PLL3
188 /* EXTAL div PLL1 mult x2 PLL3 mult */
H A Dr8a779f0-cpg-mssr.c56 DEF_INPUT("extal", CLK_EXTAL),
179 * MD EXTAL PLL1 PLL2 PLL3 PLL4 PLL5 PLL6 OSC
191 /* EXTAL div PLL1 mult/div PLL5 mult/div OSC prediv */
H A Dr8a77995-cpg-mssr.c55 DEF_INPUT("extal", CLK_EXTAL),
211 * MD19 EXTAL (MHz) PLL0 PLL1 PLL3
219 /* EXTAL div PLL1 mult/div PLL3 mult/div */
H A Dr8a7745-cpg-mssr.c39 DEF_INPUT("extal", CLK_EXTAL),
190 * MD EXTAL PLL0 PLL1 PLL3
205 /* EXTAL div PLL1 mult PLL3 mult PLL0 mult */
H A Dr8a77980-cpg-mssr.c53 DEF_INPUT("extal", CLK_EXTAL),
211 * MD EXTAL PLL2 PLL1 PLL3 OSC
223 /* EXTAL div PLL1 mult/div PLL3 mult/div OSC prediv */
H A Dr8a7742-cpg-mssr.c39 DEF_INPUT("extal", CLK_EXTAL),
212 * MD EXTAL PLL0 PLL1 PLL3
231 /* EXTAL div PLL1 mult PLL3 mult */
H A Dr8a774c0-cpg-mssr.c57 DEF_INPUT("extal", CLK_EXTAL),
261 * MD19 EXTAL (MHz) PLL0 PLL1 PLL3
269 /* EXTAL div PLL1 mult/div PLL3 mult/div */
H A Dr8a7743-cpg-mssr.c40 DEF_INPUT("extal", CLK_EXTAL),
206 * MD EXTAL PLL0 PLL1 PLL3
225 /* EXTAL div PLL1 mult PLL3 mult */
H A Dr8a77990-cpg-mssr.c57 DEF_INPUT("extal", CLK_EXTAL),
275 * MD19 EXTAL (MHz) PLL0 PLL1 PLL3
283 /* EXTAL div PLL1 mult/div PLL3 mult/div */
H A Dr8a774b1-cpg-mssr.c52 DEF_INPUT("extal", CLK_EXTAL),
259 * MD EXTAL PLL0 PLL1 PLL3 PLL4 OSC
285 /* EXTAL div PLL1 mult/div PLL3 mult/div OSC prediv */
H A Dr8a774e1-cpg-mssr.c53 DEF_INPUT("extal", CLK_EXTAL),
271 * MD EXTAL PLL0 PLL1 PLL2 PLL3 PLL4 OSC
297 /* EXTAL div PLL1 mult/div PLL3 mult/div OSC prediv */
H A Dr8a77965-cpg-mssr.c55 DEF_INPUT("extal", CLK_EXTAL),
288 * MD EXTAL PLL0 PLL1 PLL3 PLL4 OSC
314 /* EXTAL div PLL1 mult/div PLL3 mult/div OSC prediv */
H A Dr8a774a1-cpg-mssr.c53 DEF_INPUT("extal", CLK_EXTAL),
263 * MD EXTAL PLL0 PLL1 PLL2 PLL3 PLL4 OSC
289 /* EXTAL div PLL1 mult/div PLL3 mult/div OSC prediv */
/linux/Documentation/devicetree/bindings/rtc/
H A Drenesas,sh-rtc.yaml44 enum: [ fck, rtc_x1, rtc_x3, extal ]
76 clock-names = "fck", "rtc_x1", "rtc_x3", "extal";
/linux/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7722.c42 /* The dll block multiplies the 32khz r_clk, may be used instead of extal */
172 CLKDEV_CON_ID("extal", &extal_clk),
224 /* autodetect extal or dll configuration */ in arch_clk_init()
H A Dclock-sh7343.c39 /* The dll block multiplies the 32khz r_clk, may be used instead of extal */
188 CLKDEV_CON_ID("extal", &extal_clk),
256 /* autodetect extal or dll configuration */ in arch_clk_init()
H A Dclock-sh7366.c39 /* The dll block multiplies the 32khz r_clk, may be used instead of extal */
186 CLKDEV_CON_ID("extal", &extal_clk),
249 /* autodetect extal or dll configuration */ in arch_clk_init()
H A Dclock-sh7723.c43 /* The dll multiplies the 32khz r_clk, may be used instead of extal */
197 CLKDEV_CON_ID("extal", &extal_clk),
272 /* autodetect extal or dll configuration */ in arch_clk_init()
H A Dclock-sh7724.c46 /* The fll multiplies the 32khz r_clk, may be used instead of extal */
262 CLKDEV_CON_ID("extal", &extal_clk),
346 /* autodetect extal or fll configuration */ in arch_clk_init()
/linux/arch/sh/boards/
H A Dboard-urquell.c184 * Only handle the EXTAL case, anyone interfacing a crystal in urquell_clk_init()
190 clk = clk_get(NULL, "extal"); in urquell_clk_init()
/linux/arch/sh/boards/mach-sdk7786/
H A Dsetup.c195 * Only handle the EXTAL case, anyone interfacing a crystal in sdk7786_clk_init()
201 clk = clk_get(NULL, "extal"); in sdk7786_clk_init()
/linux/drivers/usb/renesas_usbhs/
H A Drza.c23 extal_clk = of_find_node_by_name(NULL, "extal"); in usbhs_rza1_hardware_init()

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