1*add5ca2cSKuninori Morimoto // SPDX-License-Identifier: GPL-2.0
2c521dc02SMagnus Damm /*
3c521dc02SMagnus Damm * arch/sh/kernel/cpu/sh4a/clock-sh7723.c
4c521dc02SMagnus Damm *
5c521dc02SMagnus Damm * SH7723 clock framework support
6c521dc02SMagnus Damm *
7c521dc02SMagnus Damm * Copyright (C) 2009 Magnus Damm
8c521dc02SMagnus Damm */
9c521dc02SMagnus Damm #include <linux/init.h>
10c521dc02SMagnus Damm #include <linux/kernel.h>
11c521dc02SMagnus Damm #include <linux/io.h>
12f4221802SPaul Mundt #include <linux/clk.h>
136d803ba7SJean-Christop PLAGNIOL-VILLARD #include <linux/clkdev.h>
147fa4632dSGuennadi Liakhovetski #include <linux/sh_clk.h>
15c521dc02SMagnus Damm #include <asm/clock.h>
162094e504SMagnus Damm #include <cpu/sh7723.h>
17c521dc02SMagnus Damm
18c521dc02SMagnus Damm /* SH7723 registers */
19c521dc02SMagnus Damm #define FRQCR 0xa4150000
20c521dc02SMagnus Damm #define VCLKCR 0xa4150004
21c521dc02SMagnus Damm #define SCLKACR 0xa4150008
22c521dc02SMagnus Damm #define SCLKBCR 0xa415000c
23c521dc02SMagnus Damm #define IRDACLKCR 0xa4150018
24c521dc02SMagnus Damm #define PLLCR 0xa4150024
257fa4632dSGuennadi Liakhovetski #define MSTPCR0 0xa4150030
267fa4632dSGuennadi Liakhovetski #define MSTPCR1 0xa4150034
277fa4632dSGuennadi Liakhovetski #define MSTPCR2 0xa4150038
28c521dc02SMagnus Damm #define DLLFRQ 0xa4150050
29c521dc02SMagnus Damm
30c521dc02SMagnus Damm /* Fixed 32 KHz root clock for RTC and Power Management purposes */
31c521dc02SMagnus Damm static struct clk r_clk = {
32c521dc02SMagnus Damm .rate = 32768,
33c521dc02SMagnus Damm };
34c521dc02SMagnus Damm
35c521dc02SMagnus Damm /*
36c521dc02SMagnus Damm * Default rate for the root input clock, reset this with clk_set_rate()
37c521dc02SMagnus Damm * from the platform code.
38c521dc02SMagnus Damm */
39c521dc02SMagnus Damm struct clk extal_clk = {
40c521dc02SMagnus Damm .rate = 33333333,
41c521dc02SMagnus Damm };
42c521dc02SMagnus Damm
43c521dc02SMagnus Damm /* The dll multiplies the 32khz r_clk, may be used instead of extal */
dll_recalc(struct clk * clk)44c521dc02SMagnus Damm static unsigned long dll_recalc(struct clk *clk)
45c521dc02SMagnus Damm {
46c521dc02SMagnus Damm unsigned long mult;
47c521dc02SMagnus Damm
48c521dc02SMagnus Damm if (__raw_readl(PLLCR) & 0x1000)
49c521dc02SMagnus Damm mult = __raw_readl(DLLFRQ);
50c521dc02SMagnus Damm else
51c521dc02SMagnus Damm mult = 0;
52c521dc02SMagnus Damm
53c521dc02SMagnus Damm return clk->parent->rate * mult;
54c521dc02SMagnus Damm }
55c521dc02SMagnus Damm
5633cb61a4SMagnus Damm static struct sh_clk_ops dll_clk_ops = {
57c521dc02SMagnus Damm .recalc = dll_recalc,
58c521dc02SMagnus Damm };
59c521dc02SMagnus Damm
60c521dc02SMagnus Damm static struct clk dll_clk = {
61c521dc02SMagnus Damm .ops = &dll_clk_ops,
62c521dc02SMagnus Damm .parent = &r_clk,
63c521dc02SMagnus Damm .flags = CLK_ENABLE_ON_INIT,
64c521dc02SMagnus Damm };
65c521dc02SMagnus Damm
pll_recalc(struct clk * clk)66c521dc02SMagnus Damm static unsigned long pll_recalc(struct clk *clk)
67c521dc02SMagnus Damm {
68c521dc02SMagnus Damm unsigned long mult = 1;
69c521dc02SMagnus Damm unsigned long div = 1;
70c521dc02SMagnus Damm
71c521dc02SMagnus Damm if (__raw_readl(PLLCR) & 0x4000)
72c521dc02SMagnus Damm mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1);
73c521dc02SMagnus Damm else
74c521dc02SMagnus Damm div = 2;
75c521dc02SMagnus Damm
76c521dc02SMagnus Damm return (clk->parent->rate * mult) / div;
77c521dc02SMagnus Damm }
78c521dc02SMagnus Damm
7933cb61a4SMagnus Damm static struct sh_clk_ops pll_clk_ops = {
80c521dc02SMagnus Damm .recalc = pll_recalc,
81c521dc02SMagnus Damm };
82c521dc02SMagnus Damm
83c521dc02SMagnus Damm static struct clk pll_clk = {
84c521dc02SMagnus Damm .ops = &pll_clk_ops,
85c521dc02SMagnus Damm .flags = CLK_ENABLE_ON_INIT,
86c521dc02SMagnus Damm };
87c521dc02SMagnus Damm
88c521dc02SMagnus Damm struct clk *main_clks[] = {
89c521dc02SMagnus Damm &r_clk,
90c521dc02SMagnus Damm &extal_clk,
91c521dc02SMagnus Damm &dll_clk,
92c521dc02SMagnus Damm &pll_clk,
93c521dc02SMagnus Damm };
94c521dc02SMagnus Damm
95c521dc02SMagnus Damm static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
96c521dc02SMagnus Damm static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
97c521dc02SMagnus Damm
980a5f337eSMagnus Damm static struct clk_div_mult_table div4_div_mult_table = {
99c521dc02SMagnus Damm .divisors = divisors,
100c521dc02SMagnus Damm .nr_divisors = ARRAY_SIZE(divisors),
101c521dc02SMagnus Damm .multipliers = multipliers,
102c521dc02SMagnus Damm .nr_multipliers = ARRAY_SIZE(multipliers),
103c521dc02SMagnus Damm };
104c521dc02SMagnus Damm
1050a5f337eSMagnus Damm static struct clk_div4_table div4_table = {
1060a5f337eSMagnus Damm .div_mult_table = &div4_div_mult_table,
1070a5f337eSMagnus Damm };
1080a5f337eSMagnus Damm
109801cd56eSMagnus Damm enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR };
110c521dc02SMagnus Damm
111914ebf0bSMagnus Damm #define DIV4(_reg, _bit, _mask, _flags) \
112914ebf0bSMagnus Damm SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
113c521dc02SMagnus Damm
114c521dc02SMagnus Damm struct clk div4_clks[DIV4_NR] = {
115914ebf0bSMagnus Damm [DIV4_I] = DIV4(FRQCR, 20, 0x0dbf, CLK_ENABLE_ON_INIT),
116914ebf0bSMagnus Damm [DIV4_U] = DIV4(FRQCR, 16, 0x0dbf, CLK_ENABLE_ON_INIT),
117914ebf0bSMagnus Damm [DIV4_SH] = DIV4(FRQCR, 12, 0x0dbf, CLK_ENABLE_ON_INIT),
118914ebf0bSMagnus Damm [DIV4_B] = DIV4(FRQCR, 8, 0x0dbf, CLK_ENABLE_ON_INIT),
119914ebf0bSMagnus Damm [DIV4_B3] = DIV4(FRQCR, 4, 0x0db4, CLK_ENABLE_ON_INIT),
120914ebf0bSMagnus Damm [DIV4_P] = DIV4(FRQCR, 0, 0x0dbf, 0),
121801cd56eSMagnus Damm };
122801cd56eSMagnus Damm
123801cd56eSMagnus Damm enum { DIV4_IRDA, DIV4_ENABLE_NR };
124801cd56eSMagnus Damm
125801cd56eSMagnus Damm struct clk div4_enable_clks[DIV4_ENABLE_NR] = {
126914ebf0bSMagnus Damm [DIV4_IRDA] = DIV4(IRDACLKCR, 0, 0x0dbf, 0),
127c521dc02SMagnus Damm };
128c521dc02SMagnus Damm
129801cd56eSMagnus Damm enum { DIV4_SIUA, DIV4_SIUB, DIV4_REPARENT_NR };
130801cd56eSMagnus Damm
131801cd56eSMagnus Damm struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {
132914ebf0bSMagnus Damm [DIV4_SIUA] = DIV4(SCLKACR, 0, 0x0dbf, 0),
133914ebf0bSMagnus Damm [DIV4_SIUB] = DIV4(SCLKBCR, 0, 0x0dbf, 0),
134801cd56eSMagnus Damm };
135098ec49bSMagnus Damm enum { DIV6_V, DIV6_NR };
136098ec49bSMagnus Damm
137098ec49bSMagnus Damm struct clk div6_clks[DIV6_NR] = {
1389e1985e1SMagnus Damm [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
139c521dc02SMagnus Damm };
140c521dc02SMagnus Damm
141c521dc02SMagnus Damm static struct clk mstp_clks[] = {
142c521dc02SMagnus Damm /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */
1437fa4632dSGuennadi Liakhovetski [HWBLK_TLB] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
1447fa4632dSGuennadi Liakhovetski [HWBLK_IC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
1457fa4632dSGuennadi Liakhovetski [HWBLK_OC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
1467fa4632dSGuennadi Liakhovetski [HWBLK_L2C] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
1477fa4632dSGuennadi Liakhovetski [HWBLK_ILMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 27, CLK_ENABLE_ON_INIT),
1487fa4632dSGuennadi Liakhovetski [HWBLK_FPU] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 24, CLK_ENABLE_ON_INIT),
1497fa4632dSGuennadi Liakhovetski [HWBLK_INTC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 22, CLK_ENABLE_ON_INIT),
1507fa4632dSGuennadi Liakhovetski [HWBLK_DMAC0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 21, 0),
1517fa4632dSGuennadi Liakhovetski [HWBLK_SHYWAY] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 20, CLK_ENABLE_ON_INIT),
1527fa4632dSGuennadi Liakhovetski [HWBLK_HUDI] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 19, 0),
1537fa4632dSGuennadi Liakhovetski [HWBLK_UBC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 17, 0),
1547fa4632dSGuennadi Liakhovetski [HWBLK_TMU0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
1557fa4632dSGuennadi Liakhovetski [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0),
1567fa4632dSGuennadi Liakhovetski [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0),
1577fa4632dSGuennadi Liakhovetski [HWBLK_DMAC1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 12, 0),
1587fa4632dSGuennadi Liakhovetski [HWBLK_TMU1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 11, 0),
1597fa4632dSGuennadi Liakhovetski [HWBLK_FLCTL] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0),
1607fa4632dSGuennadi Liakhovetski [HWBLK_SCIF0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 9, 0),
1617fa4632dSGuennadi Liakhovetski [HWBLK_SCIF1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 8, 0),
1627fa4632dSGuennadi Liakhovetski [HWBLK_SCIF2] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0),
1637fa4632dSGuennadi Liakhovetski [HWBLK_SCIF3] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 6, 0),
1647fa4632dSGuennadi Liakhovetski [HWBLK_SCIF4] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 5, 0),
1657fa4632dSGuennadi Liakhovetski [HWBLK_SCIF5] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 4, 0),
1667fa4632dSGuennadi Liakhovetski [HWBLK_MSIOF0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 2, 0),
1677fa4632dSGuennadi Liakhovetski [HWBLK_MSIOF1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 1, 0),
1687fa4632dSGuennadi Liakhovetski [HWBLK_MERAM] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 0, 0),
169c521dc02SMagnus Damm
1707fa4632dSGuennadi Liakhovetski [HWBLK_IIC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
1717fa4632dSGuennadi Liakhovetski [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0),
172c521dc02SMagnus Damm
1737fa4632dSGuennadi Liakhovetski [HWBLK_ATAPI] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR2, 28, 0),
1747fa4632dSGuennadi Liakhovetski [HWBLK_ADC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 27, 0),
1757fa4632dSGuennadi Liakhovetski [HWBLK_TPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 25, 0),
1767fa4632dSGuennadi Liakhovetski [HWBLK_IRDA] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 24, 0),
1777fa4632dSGuennadi Liakhovetski [HWBLK_TSIF] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 22, 0),
1787fa4632dSGuennadi Liakhovetski [HWBLK_ICB] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 21, CLK_ENABLE_ON_INIT),
1797fa4632dSGuennadi Liakhovetski [HWBLK_SDHI0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 18, 0),
1807fa4632dSGuennadi Liakhovetski [HWBLK_SDHI1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 17, 0),
1817fa4632dSGuennadi Liakhovetski [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR2, 14, 0),
1827fa4632dSGuennadi Liakhovetski [HWBLK_USB] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 11, 0),
1837fa4632dSGuennadi Liakhovetski [HWBLK_2DG] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 10, 0),
1847fa4632dSGuennadi Liakhovetski [HWBLK_SIU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 8, 0),
1857fa4632dSGuennadi Liakhovetski [HWBLK_VEU2H1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 6, 0),
1867fa4632dSGuennadi Liakhovetski [HWBLK_VOU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 5, 0),
1877fa4632dSGuennadi Liakhovetski [HWBLK_BEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 4, 0),
1887fa4632dSGuennadi Liakhovetski [HWBLK_CEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 3, 0),
1897fa4632dSGuennadi Liakhovetski [HWBLK_VEU2H0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 2, 0),
1907fa4632dSGuennadi Liakhovetski [HWBLK_VPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 1, 0),
1917fa4632dSGuennadi Liakhovetski [HWBLK_LCDC] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 0, 0),
192c521dc02SMagnus Damm };
193c521dc02SMagnus Damm
194f4221802SPaul Mundt static struct clk_lookup lookups[] = {
19500522ac3SMagnus Damm /* main clocks */
19600522ac3SMagnus Damm CLKDEV_CON_ID("rclk", &r_clk),
19700522ac3SMagnus Damm CLKDEV_CON_ID("extal", &extal_clk),
19800522ac3SMagnus Damm CLKDEV_CON_ID("dll_clk", &dll_clk),
19900522ac3SMagnus Damm CLKDEV_CON_ID("pll_clk", &pll_clk),
20000522ac3SMagnus Damm
2013f662349SMagnus Damm /* DIV4 clocks */
2023f662349SMagnus Damm CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
2033f662349SMagnus Damm CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
2043f662349SMagnus Damm CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
2053f662349SMagnus Damm CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
2063f662349SMagnus Damm CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
2073f662349SMagnus Damm CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
2083f662349SMagnus Damm CLKDEV_CON_ID("irda_clk", &div4_enable_clks[DIV4_IRDA]),
2093f662349SMagnus Damm CLKDEV_CON_ID("siua_clk", &div4_reparent_clks[DIV4_SIUA]),
2103f662349SMagnus Damm CLKDEV_CON_ID("siub_clk", &div4_reparent_clks[DIV4_SIUB]),
2113f662349SMagnus Damm
212098ec49bSMagnus Damm /* DIV6 clocks */
213098ec49bSMagnus Damm CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
214098ec49bSMagnus Damm
215fd30401bSMagnus Damm /* MSTP clocks */
216fd30401bSMagnus Damm CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
217fd30401bSMagnus Damm CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
218fd30401bSMagnus Damm CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
219fd30401bSMagnus Damm CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
220fd30401bSMagnus Damm CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
221fd30401bSMagnus Damm CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
222fd30401bSMagnus Damm CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
2237fa4632dSGuennadi Liakhovetski CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[HWBLK_DMAC0]),
224fd30401bSMagnus Damm CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
225fd30401bSMagnus Damm CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
226fd30401bSMagnus Damm CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
2279b17e48cSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-cmt-32.0", &mstp_clks[HWBLK_CMT]),
2287fa4632dSGuennadi Liakhovetski CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
2297fa4632dSGuennadi Liakhovetski CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[HWBLK_DMAC1]),
230fd30401bSMagnus Damm CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
2317fa4632dSGuennadi Liakhovetski CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[HWBLK_MSIOF0]),
2327fa4632dSGuennadi Liakhovetski CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[HWBLK_MSIOF1]),
2337fa4632dSGuennadi Liakhovetski CLKDEV_DEV_ID("sh_mobile_meram.0", &mstp_clks[HWBLK_MERAM]),
23416d9856aSKuninori Morimoto CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]),
235fd30401bSMagnus Damm CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
236fd30401bSMagnus Damm CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
237fd30401bSMagnus Damm CLKDEV_CON_ID("adc0", &mstp_clks[HWBLK_ADC]),
238fd30401bSMagnus Damm CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
239fd30401bSMagnus Damm CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
240fd30401bSMagnus Damm CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),
241fd30401bSMagnus Damm CLKDEV_CON_ID("icb0", &mstp_clks[HWBLK_ICB]),
2427fa4632dSGuennadi Liakhovetski CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI0]),
2437fa4632dSGuennadi Liakhovetski CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[HWBLK_SDHI1]),
2447fa4632dSGuennadi Liakhovetski CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]),
245fd30401bSMagnus Damm CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB]),
246fd30401bSMagnus Damm CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
2477fa4632dSGuennadi Liakhovetski CLKDEV_DEV_ID("siu-pcm-audio", &mstp_clks[HWBLK_SIU]),
248fd30401bSMagnus Damm CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU2H1]),
2497fa4632dSGuennadi Liakhovetski CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]),
250fd30401bSMagnus Damm CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]),
25139fb9930SJacopo Mondi CLKDEV_DEV_ID("ceu.0", &mstp_clks[HWBLK_CEU]),
252fd30401bSMagnus Damm CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU2H0]),
253fd30401bSMagnus Damm CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
2547e28c7bbSKuninori Morimoto
2551399c195SLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU0]),
2561399c195SLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[HWBLK_TMU1]),
2579f06cf38SPaul Mundt
258fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
259fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
260fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
261fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[HWBLK_SCIF3]),
262fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.4", &mstp_clks[HWBLK_SCIF4]),
263fa3d39bfSLaurent Pinchart CLKDEV_ICK_ID("fck", "sh-sci.5", &mstp_clks[HWBLK_SCIF5]),
2649f06cf38SPaul Mundt
2657fa4632dSGuennadi Liakhovetski CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]),
266f4221802SPaul Mundt };
267f4221802SPaul Mundt
arch_clk_init(void)268c521dc02SMagnus Damm int __init arch_clk_init(void)
269c521dc02SMagnus Damm {
270c521dc02SMagnus Damm int k, ret = 0;
271c521dc02SMagnus Damm
272c521dc02SMagnus Damm /* autodetect extal or dll configuration */
273c521dc02SMagnus Damm if (__raw_readl(PLLCR) & 0x1000)
274c521dc02SMagnus Damm pll_clk.parent = &dll_clk;
275c521dc02SMagnus Damm else
276c521dc02SMagnus Damm pll_clk.parent = &extal_clk;
277c521dc02SMagnus Damm
278c521dc02SMagnus Damm for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
279f4221802SPaul Mundt ret |= clk_register(main_clks[k]);
280f4221802SPaul Mundt
281f4221802SPaul Mundt clkdev_add_table(lookups, ARRAY_SIZE(lookups));
282c521dc02SMagnus Damm
283c521dc02SMagnus Damm if (!ret)
284c521dc02SMagnus Damm ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
285c521dc02SMagnus Damm
286c521dc02SMagnus Damm if (!ret)
287801cd56eSMagnus Damm ret = sh_clk_div4_enable_register(div4_enable_clks,
288801cd56eSMagnus Damm DIV4_ENABLE_NR, &div4_table);
289801cd56eSMagnus Damm
290801cd56eSMagnus Damm if (!ret)
291801cd56eSMagnus Damm ret = sh_clk_div4_reparent_register(div4_reparent_clks,
292801cd56eSMagnus Damm DIV4_REPARENT_NR, &div4_table);
293801cd56eSMagnus Damm
294801cd56eSMagnus Damm if (!ret)
295098ec49bSMagnus Damm ret = sh_clk_div6_register(div6_clks, DIV6_NR);
296c521dc02SMagnus Damm
297c521dc02SMagnus Damm if (!ret)
298ad3337cbSNobuhiro Iwamatsu ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
299c521dc02SMagnus Damm
300c521dc02SMagnus Damm return ret;
301c521dc02SMagnus Damm }
302