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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dnvidia,tegra234-mgbe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nvidia,tegra234-mgbe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra234 MGBE Multi-Gigabit Ethernet Controller
10 - Thierry Reding <treding@nvidia.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra234-mgbe
20 reg-names:
22 - const: hypervisor
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/freebsd/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_mac_regs.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
402 /* [0x28] XAUI PCS configuration */
404 /* [0x2c] XAUI PCS status */
406 /* [0x30] RXAUI PCS configuration */
408 /* [0x34] RXAUI PCS status */
446 /* [0x0] PCS register file address */
448 /* [0x4] PCS register file data */
462 /* [0x20] KR PCS config */
464 /* [0x24] KR PCS status */
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H A Dal_hal_eth_main.c1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
98 /* tx Meta Descriptor defines - MacSec */
105 #define AL_ETH_TX_MACSEC_SECURED_PYLD_LEN_LSB_SHIFT 10 /* Secure Payload Length (0x3FFF for non-S…
364 al_warn("[%s] warn: failed to change state, error %d\n", dma->name, rc); in al_udma_state_set_wait()
376 if (count-- == 0) { in al_udma_state_set_wait()
378 dma->name, al_udma_states_name[new_state]); in al_udma_state_set_wait()
379 return -ETIMEDOUT; in al_udma_state_set_wait()
389 al_reg_write32(&adapter->ec_regs_base->epe_p[idx].comp_data, reg_entry->data); in al_eth_epe_entry_set()
390 al_reg_write32(&adapter->ec_regs_base->epe_p[idx].comp_mask, reg_entry->mask); in al_eth_epe_entry_set()
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H A Dal_hal_eth.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
61 /* *INDENT-OFF* */
65 /* *INDENT-ON* */
97 #define AL_ETH_TSO_MSS_MAX_VAL (AL_ETH_MAX_FRAME_LEN - 200)
153 al_bool eee; /**< Energy Efficient Ethernet */ member
194 * will be set according to inner packet when packet is tunneled, for non-tunneled
327 uint8_t l4_header_len; /**< in words(32-bits) */
342 * Target-ID to be assigned to the packet descriptors
343 * Requires Target-ID in descriptor to be enabled for the specific UDMA
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/freebsd/sys/dev/e1000/
H A De1000_82575.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
121 * e1000_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO
134 switch (hw->mac.type) { in e1000_sgmii_uses_mdio_82575()
155 * e1000_init_phy_params_82575 - Initialize PHY function ptrs
160 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_82575()
166 phy->ops.read_i2c_byte = e1000_read_i2c_byte_generic; in e1000_init_phy_params_82575()
167 phy->ops.write_i2c_byte = e1000_write_i2c_byte_generic; in e1000_init_phy_params_82575()
169 if (hw->phy.media_type != e1000_media_type_copper) { in e1000_init_phy_params_82575()
170 phy->type = e1000_phy_none; in e1000_init_phy_params_82575()
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H A De1000_regs.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
38 #define E1000_CTRL 0x00000 /* Device Control - RW */
39 #define E1000_CTRL_DUP 0x00004 /* Device Control Duplicate (Shadow) - RW */
40 #define E1000_STATUS 0x00008 /* Device Status - RO */
41 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
42 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
43 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
44 #define E1000_FLA 0x0001C /* Flash Access - RW */
45 #define E1000_MDIC 0x00020 /* MDI Control - RW */
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H A De1000_defines.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
94 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
122 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
173 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
174 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
262 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
264 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
341 #define E1000_STATUS_PCIX_MODE 0x00002000 /* PCI-X mode */
342 #define E1000_STATUS_PCIX_SPEED 0x0000C000 /* PCI-X bus speed */
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H A De1000_ich8lan.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
36 * 82562G-2 10/100 Network Connection
38 * 82562GT-2 10/100 Network Connection
40 * 82562V-2 10/100 Network Connection
41 * 82566DC-2 Gigabit Network Connection
43 * 82566DM-2 Gigabit Network Connection
50 * 82567LM-2 Gigabit Network Connection
51 * 82567LF-2 Gigabit Network Connection
52 * 82567V-2 Gigabit Network Connection
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gi
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/freebsd/sys/contrib/ncsw/inc/flib/
H A Dfsl_fman_memac.h2 * Copyright 2008-2012 Freescale Semiconductor Inc.
89 #define IF_MODE_MASK 0x00000003 /* 30-31 Mask on i/f mode bits */
90 #define IF_MODE_XGMII 0x00000000 /* 30-31 XGMII (10G) interface */
91 #define IF_MODE_GMII 0x00000002 /* 30-31 GMII (1G) interface */
94 #define IF_MODE_RGMII_1000 0x00004000 /* 10 - 1000Mbps RGMII */
95 #define IF_MODE_RGMII_100 0x00000000 /* 00 - 100Mbps RGMII */
96 #define IF_MODE_RGMII_10 0x00002000 /* 01 - 10Mbps RGMII */
104 #define HASH_CTRL_ADDR_MASK 0x0000003F /* 26-31 Hash table address code */
109 /* Transmit Inter-Packet Gap Length Register (TX_IPG_LENGTH) */
129 #define MEMAC_IEVNT_PCS 0x80000000 /* PCS (XG). Link sync (G) */
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dmcp_public.h2 * Copyright (c) 2017-2018 Cavium, Inc.
72 #define ETH_SPEED_SMARTLINQ 0x8 /* deprecated - use link_modes field instead */
86 #define ETH_LOOPBACK_MAC (4) /* MAC Loopback - not supported */
89 #define ETH_LOOPBACK_PCS_AH_ONLY (7) /* PCS loopback (TX to RX) */
90 #define ETH_LOOPBACK_REVERSE_MAC_AH_ONLY (8) /* Loop RX packet from PCS to TX */
94 #define EEE_CFG_EEE_ENABLED (1<<0) /* EEE is enabled (configuration). Refer to eee_status->active f…
121 u64 r64; /* 0x00 (Offset 0x00 ) RX 64-byte frame counter*/
129 u64 r1522; /* 0x06 (Offset 0x30 ) RX 1519 to 1522 byte VLAN-tagged frame counter */
154 u64 t64; /* 0x40 (Offset 0xa8 ) TX 64-byte frame counter */
196 /* HSI - Cannot add more stats to this struct. If needed, then need to open new struct */
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H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
128 … (0x1<<23) // Fast back-to-back capable. Not ap…
145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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/freebsd/sys/dev/ixl/
H A Dixl_pf_main.c3 Copyright (c) 2013-2018, Intel Corporation
115 "CL108 RS-FEC",
116 "CL74 FC-FEC/BASE-R",
127 * ixl_set_state - Set the specified state
141 * ixl_clear_state - Clear the specified state
155 * ixl_test_state - Test the specified state
170 * ixl_testandset_state - Test and set the specified state
193 u8 oem_ver = (u8)(hw->nvm.oem_ver >> 24); in ixl_nvm_version_str()
194 u16 oem_build = (u16)((hw->nvm.oem_ver >> 16) & 0xFFFF); in ixl_nvm_version_str()
195 u8 oem_patch = (u8)(hw->nvm.oem_ver & 0xFF); in ixl_nvm_version_str()
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H A Di40e_common.c3 Copyright (c) 2013-2018, Intel Corporation
41 * i40e_set_mac_type - Sets MAC type
53 if (hw->vendor_id == I40E_INTEL_VENDOR_ID) { in i40e_set_mac_type()
54 switch (hw->device_id) { in i40e_set_mac_type()
75 hw->mac.type = I40E_MAC_XL710; in i40e_set_mac_type()
83 hw->mac.type = I40E_MAC_X722; in i40e_set_mac_type()
86 hw->mac.type = I40E_MAC_X722_VF; in i40e_set_mac_type()
91 hw->mac.type = I40E_MAC_VF; in i40e_set_mac_type()
94 hw->mac.type = I40E_MAC_GENERIC; in i40e_set_mac_type()
102 hw->mac.type, status); in i40e_set_mac_type()
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/freebsd/sys/dev/ixgbe/
H A Dixgbe_type.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
42 * - IXGBE_ERROR_INVALID_STATE
48 * - IXGBE_ERROR_POLLING
53 * - IXGBE_ERROR_CAUTION
58 * - IXGBE_ERROR_SOFTWARE
64 * - IXGBE_ERROR_ARGUMENT
69 * - IXGBE_ERROR_UNSUPPORTED
162 #define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, _IDX)])
419 (0x012300 + (((_i) - 24) * 4)))
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/freebsd/sys/dev/bxe/
H A Dbxe_elink.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved.
508 /* When this pin is active high during reset, 10GBASE-T core is power
509 * down, When it is active low the 10GBASE-T is power up
774 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)
936 (_phy)->def_md_devad, \
942 (_phy)->def_md_devad, \
970 * elink_check_lfa - This function checks if link reinitialization is required,
982 struct bxe_softc *sc = params->sc; in elink_check_lfa()
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/freebsd/share/misc/
H A Dusb_vendors6 # http://www.linux-usb.org/usb-ids.html
7 # or send entries as patches (diff -u old new) in the
10 # http://www.linux-usb.org/usb.ids
13 # Date: 2024-07-04 20:34:02
20 # device device_name <-- single tab
21 # interface interface_name <-- two tabs
38 5301 GW-US54ZGL 802.11bg
54 145f NW-3100 802.11b/g 54Mbps Wireless Network Adapter [zd1211]
62 0200 TP-Link
81 120e ASI120MC-S Planetary Camera
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