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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dti,cp-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,cp-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bartosz Golaszewski <brgl@bgdev.pl>
13 Common Platform Interrupt Controller (cp_intc) is used on OMAP-L1x SoCs and
18 const: ti,cp-intc
23 interrupt-controller: true
25 '#interrupt-cells':
29 ti,intc-size:
[all …]
/linux/drivers/irqchip/
H A Dirq-davinci-cp-intc.c1 // SPDX-License-Identifier: GPL-2.0-only
4 // Copyright (C) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
56 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_STAT_IDX_CLR); in davinci_cp_intc_ack_irq()
63 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR); in davinci_cp_intc_mask_irq()
69 davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET); in davinci_cp_intc_unmask_irq()
77 reg = BIT_WORD(d->hwirq); in davinci_cp_intc_set_irq_type()
78 mask = BIT_MASK(d->hwirq); in davinci_cp_intc_set_irq_type()
100 return -EINVAL; in davinci_cp_intc_set_irq_type()
163 req = request_mem_region(res->start, resource_size(res), "davinci-cp-intc"); in davinci_cp_intc_do_init()
166 return -EBUSY; in davinci_cp_intc_do_init()
[all …]
/linux/drivers/clk/renesas/
H A Dr8a77995-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a7795-cpg-mssr.c
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen3-cpg.h"
99 DEF_FIXED("cp", R8A77995_CLK_CP, CLK_EXTAL, 2, 1),
136 DEF_MOD("sys-dmac2", 217, R8A77995_CLK_S3D1),
137 DEF_MOD("sys-dmac1", 218, R8A77995_CLK_S3D1),
138 DEF_MOD("sys-dmac0", 219, R8A77995_CLK_S3D1),
[all …]
H A Dr8a77980-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on r8a7795-cpg-mssr.c
16 #include <linux/soc/renesas/rcar-rst.h>
19 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
21 #include "renesas-cpg-mssr.h"
22 #include "rcar-gen3-cpg.h"
104 DEF_FIXED("cp", R8A77980_CLK_CP, CLK_EXTAL, 2, 1),
129 DEF_MOD("sys-dmac2", 217, R8A77980_CLK_S0D3),
130 DEF_MOD("sys-dmac1", 218, R8A77980_CLK_S0D3),
139 DEF_MOD("intc-ex", 407, R8A77980_CLK_CP),
[all …]
H A Dr8a774c0-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a77990-cpg-mssr.c
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen3-cpg.h"
117 DEF_FIXED("cp", R8A774C0_CLK_CP, CLK_EXTAL, 2, 1),
149 DEF_MOD("sys-dmac2", 217, R8A774C0_CLK_S3D1),
150 DEF_MOD("sys-dmac1", 218, R8A774C0_CLK_S3D1),
151 DEF_MOD("sys-dmac0", 219, R8A774C0_CLK_S3D1),
[all …]
H A Dr8a77470-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/soc/renesas/rcar-rst.h>
13 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
15 #include "renesas-cpg-mssr.h"
16 #include "rcar-gen2-cpg.h"
65 DEF_FIXED("cp", R8A77470_CLK_CP, CLK_PLL1, 48, 1),
82 DEF_MOD("2d-dmac", 115, R8A77470_CLK_ZS),
83 DEF_MOD("fdp1-0", 119, R8A77470_CLK_ZS),
91 DEF_MOD("sys-dmac1", 218, R8A77470_CLK_ZS),
92 DEF_MOD("sys-dmac0", 219, R8A77470_CLK_ZS),
[all …]
H A Dr8a7792-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-rcar-gen2.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen2-cpg.h"
72 DEF_FIXED("cp", R8A7792_CLK_CP, CLK_PLL1, 48, 1),
84 DEF_MOD("2d-dmac", 115, R8A7792_CLK_ZS),
93 DEF_MOD("sys-dmac1", 218, R8A7792_CLK_ZS),
94 DEF_MOD("sys-dmac0", 219, R8A7792_CLK_ZS),
[all …]
H A Dr8a7745-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/soc/renesas/rcar-rst.h>
13 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
15 #include "renesas-cpg-mssr.h"
16 #include "rcar-gen2-cpg.h"
65 DEF_FIXED("cp", R8A7745_CLK_CP, CLK_PLL1, 48, 1),
86 DEF_MOD("2d-dmac", 115, R8A7745_CLK_ZS),
87 DEF_MOD("fdp1-0", 119, R8A7745_CLK_ZS),
102 DEF_MOD("sys-dmac1", 218, R8A7745_CLK_ZS),
103 DEF_MOD("sys-dmac0", 219, R8A7745_CLK_ZS),
[all …]
H A Dr8a77990-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
7 * Based on r8a7795-cpg-mssr.c
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen3-cpg.h"
118 DEF_FIXED("cp", R8A77990_CLK_CP, CLK_EXTAL, 2, 1),
150 DEF_MOD("sys-dmac2", 217, R8A77990_CLK_S3D1),
151 DEF_MOD("sys-dmac1", 218, R8A77990_CLK_S3D1),
[all …]
H A Dr8a7794-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-rcar-gen2.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen2-cpg.h"
71 DEF_FIXED("cp", R8A7794_CLK_CP, CLK_PLL1, 48, 1),
93 DEF_MOD("2d-dmac", 115, R8A7794_CLK_ZS),
94 DEF_MOD("fdp1-0", 119, R8A7794_CLK_ZS),
109 DEF_MOD("sys-dmac1", 218, R8A7794_CLK_ZS),
[all …]
H A Dr8a774b1-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a7796-cpg-mssr.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen3-cpg.h"
110 DEF_FIXED("cp", R8A774B1_CLK_CP, CLK_EXTAL, 2, 1),
130 DEF_MOD("fdp1-0", 119, R8A774B1_CLK_S0D1),
140 DEF_MOD("sys-dmac2", 217, R8A774B1_CLK_S3D1),
141 DEF_MOD("sys-dmac1", 218, R8A774B1_CLK_S3D1),
[all …]
H A Dr8a7791-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Glider bvba
7 * Based on clk-rcar-gen2.c
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen2-cpg.h"
77 DEF_FIXED("cp", R8A7791_CLK_CP, CLK_EXTAL, 2, 1),
96 DEF_MOD("2d-dmac", 115, R8A7791_CLK_ZS),
97 DEF_MOD("fdp1-1", 118, R8A7791_CLK_ZS),
[all …]
H A Dr8a7742-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/soc/renesas/rcar-rst.h>
13 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
15 #include "renesas-cpg-mssr.h"
16 #include "rcar-gen2-cpg.h"
72 DEF_FIXED("cp", R8A7742_CLK_CP, CLK_EXTAL, 2, 1),
90 DEF_MOD("2d-dmac", 115, R8A7742_CLK_ZS),
91 DEF_MOD("fdp1-2", 117, R8A7742_CLK_ZS),
92 DEF_MOD("fdp1-1", 118, R8A7742_CLK_ZS),
93 DEF_MOD("fdp1-0", 119, R8A7742_CLK_ZS),
[all …]
H A Dr8a7790-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-rcar-gen2.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen2-cpg.h"
79 DEF_FIXED("cp", R8A7790_CLK_CP, CLK_EXTAL, 2, 1),
101 DEF_MOD("2d-dmac", 115, R8A7790_CLK_ZS),
102 DEF_MOD("fdp1-2", 117, R8A7790_CLK_ZS),
103 DEF_MOD("fdp1-1", 118, R8A7790_CLK_ZS),
[all …]
H A Dr8a7743-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/soc/renesas/rcar-rst.h>
14 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
16 #include "renesas-cpg-mssr.h"
17 #include "rcar-gen2-cpg.h"
71 DEF_FIXED("cp", R8A7743_CLK_CP, CLK_EXTAL, 2, 1),
86 DEF_MOD("2d-dmac", 115, R8A7743_CLK_ZS),
87 DEF_MOD("fdp1-1", 118, R8A7743_CLK_ZS),
88 DEF_MOD("fdp1-0", 119, R8A7743_CLK_ZS),
104 DEF_MOD("sys-dmac1", 218, R8A7743_CLK_ZS),
[all …]
H A Dr8a774e1-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a7795-cpg-mssr.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen3-cpg.h"
114 DEF_FIXED("cp", R8A774E1_CLK_CP, CLK_EXTAL, 2, 1),
129 DEF_MOD("fdp1-1", 118, R8A774E1_CLK_S0D1),
130 DEF_MOD("fdp1-0", 119, R8A774E1_CLK_S0D1),
147 DEF_MOD("sys-dmac2", 217, R8A774E1_CLK_S3D1),
[all …]
H A Dr8a774a1-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a7796-cpg-mssr.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen3-cpg.h"
113 DEF_FIXED("cp", R8A774A1_CLK_CP, CLK_EXTAL, 2, 1),
133 DEF_MOD("fdp1-0", 119, R8A774A1_CLK_S0D1),
143 DEF_MOD("sys-dmac2", 217, R8A774A1_CLK_S3D1),
144 DEF_MOD("sys-dmac1", 218, R8A774A1_CLK_S3D1),
[all …]
H A Dr8a77965-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on r8a7795-cpg-mssr.c
17 #include <linux/soc/renesas/rcar-rst.h>
19 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
21 #include "renesas-cpg-mssr.h"
22 #include "rcar-gen3-cpg.h"
115 DEF_FIXED("cp", R8A77965_CLK_CP, CLK_EXTAL, 2, 1),
130 DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1),
145 DEF_MOD("sys-dmac2", 217, R8A77965_CLK_S3D1),
146 DEF_MOD("sys-dmac1", 218, R8A77965_CLK_S3D1),
[all …]
H A Dr8a7796-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
3 * r8a7796 (R-Car M3-W/W+) Clock Pulse Generator / Module Standby and Software
6 * Copyright (C) 2016-2019 Glider bvba
7 * Copyright (C) 2018-2019 Renesas Electronics Corp.
9 * Based on r8a7795-cpg-mssr.c
19 #include <linux/soc/renesas/rcar-rst.h>
21 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
23 #include "renesas-cpg-mssr.h"
24 #include "rcar-gen3-cpg.h"
120 DEF_FIXED("cp", R8A7796_CLK_CP, CLK_EXTAL, 2, 1),
[all …]
H A Dr8a7795-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 * Based on clk-rcar-gen3.c
16 #include <linux/soc/renesas/rcar-rst.h>
19 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
21 #include "renesas-cpg-mssr.h"
22 #include "rcar-gen3-cpg.h"
118 DEF_FIXED("cp", R8A7795_CLK_CP, CLK_EXTAL, 2, 1),
133 DEF_MOD("fdp1-1", 118, R8A7795_CLK_S0D1),
134 DEF_MOD("fdp1-0", 119, R8A7795_CLK_S0D1),
[all …]
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7740.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Mobile A1 (R8A77400) SoC
8 #include <dt-bindings/clock/r8a7740-clock.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <1>;
16 #size-cells = <1>;
19 #address-cells = <1>;
20 #size-cells = <0>;
[all …]
/linux/arch/arm/mach-pxa/
H A Dpxa25x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/pxa25x.c
17 #include <linux/dma/pxa-dma.h>
19 #include <linux/gpio-pxa.h>
38 #include "addr-map.h"
55 * More ones like CP and general purpose register values are preserved
122 int gpio = pxa_irq_to_gpio(d->irq); in pxa25x_set_wake()
128 if (d->irq == IRQ_RTCAlrm) { in pxa25x_set_wake()
133 return -EINVAL; in pxa25x_set_wake()
158 IRQCHIP_DECLARE(pxa25x_intc, "marvell,pxa-intc", pxa25x_dt_init_irq);
[all …]
H A Dpxa27x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/pxa27x.c
12 #include <linux/dma/pxa-dma.h>
14 #include <linux/gpio-pxa.h>
24 #include <linux/platform_data/i2c-pxa.h>
36 #include <linux/platform_data/usb-ohci-pxa27x.h>
37 #include <linux/platform_data/asoc-pxa.h>
39 #include "addr-map.h"
44 #include <linux/clk-provider.h>
93 * More ones like CP and general purpose register values are preserved
[all …]
/linux/drivers/net/can/cc770/
H A Dcc770_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * in your board-specific code:
29 * interrupt-parent = <&mpic>;
30 * bosch,external-clock-frequency = <16000000>;
53 MODULE_DESCRIPTION("Socket-CAN driver for CC770 on the platform bus");
61 return ioread8(priv->reg_base + reg); in cc770_platform_read_reg()
67 iowrite8(val, priv->reg_base + reg); in cc770_platform_write_reg()
74 struct device_node *np = pdev->dev.of_node; in cc770_get_of_node_data()
76 of_property_read_u32(np, "bosch,external-clock-frequency", &clkext); in cc770_get_of_node_data()
77 priv->can.clock.freq = clkext; in cc770_get_of_node_data()
[all …]
/linux/arch/arm/boot/dts/ti/davinci/
H A Dda850.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "arm,arm926ej-s";
28 operating-points-v2 = <&opp_table>;
32 opp_table: opp-table {
33 compatible = "operating-points-v2";
[all …]

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