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/linux/drivers/dma/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
17 config DMADEVICES_DEBUG
24 config DMADEVICES_VDEBUG
38 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
41 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
44 config DMA_ENGINE
47 config DMA_VIRTUAL_CHANNELS
50 config DMA_ACPI
54 config DMA_OF
60 config ALTERA_MSGDMA
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/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
20 - enum:
21 - qcom,pcie-apq8064
22 - qcom,pcie-apq8084
23 - qcom,pcie-ipq4019
24 - qcom,pcie-ipq6018
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H A Dqcom,pcie-sm8550.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8550.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
20 - const: qcom,pcie-sm8550
21 - items:
22 - enum:
23 - qcom,pcie-sm8650
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H A Dqcom,pcie-x1e80100.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-x1e80100.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 const: qcom,pcie-x1e80100
25 reg-names:
27 - const: parf # Qualcomm specific registers
28 - const: dbi # DesignWare PCIe registers
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H A Dqcom,pcie-sm8350.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8350.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 const: qcom,pcie-sm8350
25 reg-names:
28 - const: parf # Qualcomm specific registers
29 - const: dbi # DesignWare PCIe registers
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H A Dqcom,pcie-sm8250.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8250.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 const: qcom,pcie-sm8250
25 reg-names:
28 - const: parf # Qualcomm specific registers
29 - const: dbi # DesignWare PCIe registers
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H A Dqcom,pcie-sc7280.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sc7280.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 const: qcom,pcie-sc7280
25 reg-names:
28 - const: parf # Qualcomm specific registers
29 - const: dbi # DesignWare PCIe registers
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/linux/sound/soc/adi/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config SND_SOC_ADI
7 config SND_SOC_ADI_AXI_I2S
8 tristate "AXI-I2S support"
13 ASoC driver for the Analog Devices AXI-I2S softcore peripheral.
15 config SND_SOC_ADI_AXI_SPDIF
16 tristate "AXI-SPDIF support"
21 ASoC driver for the Analog Devices AXI-SPDIF softcore peripheral.
/linux/drivers/bus/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
8 config ARM_CCI
11 config ARM_CCI400_COMMON
15 config ARM_CCI400_PORT_CTRL
23 config ARM_INTEGRATOR_LM
32 config BRCMSTB_GISB_ARB
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
41 config BT1_APB
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
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/linux/drivers/staging/axis-fifo/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 # "Xilinx AXI-Stream FIFO IP core driver"
5 config XIL_AXIS_FIFO
6 tristate "Xilinx AXI-Stream FIFO IP core driver"
9 This adds support for the Xilinx AXI-Stream FIFO IP core driver.
10 The AXI Streaming FIFO allows memory mapped access to a AXI Streaming
11 interface. The Xilinx AXI-Stream FIFO IP core can be used to interface
12 to the AXI Ethernet without the need to use DMA.
/linux/Documentation/admin-guide/perf/
H A Dimx-ddr.rst10 Selection of the value for each counter is done via the config registers. There
16 The "format" directory describes format of the config (event ID) and config1/2
17 (AXI filter setting) fields of the perf_event_attr structure, see /sys/bus/event_source/
23 .. code-block:: bash
25 perf stat -a -e imx8_ddr0/cycles/ cmd
26 perf stat -a -e imx8_ddr0/read/,imx8_ddr0/write/ cmd
28 AXI filtering is only used by CSV modes 0x41 (axid-read) and 0x42 (axid-write)
32 type of AXI filter (filter, enhanced_filter and super_filter). Value 0 for
33 un-supported, and value 1 for supported.
37 --AXI_ID defines AxID matching value.
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/linux/drivers/gpu/drm/v3d/
H A Dv3d_perfmon.c1 // SPDX-License-Identifier: GPL-2.0
13 …{"FEP", "FEP-valid-primitives-no-rendered-pixels", "[FEP] Valid primitives that result in no rende…
14 …{"FEP", "FEP-valid-primitives-rendered-pixels", "[FEP] Valid primitives for all rendered tiles (pr…
15 {"FEP", "FEP-clipped-quads", "[FEP] Early-Z/Near/Far clipped quads"},
16 {"FEP", "FEP-valid-quads", "[FEP] Valid quads"},
17 …{"TLB", "TLB-quads-not-passing-stencil-test", "[TLB] Quads with no pixels passing the stencil test…
18 …{"TLB", "TLB-quads-not-passing-z-and-stencil-test", "[TLB] Quads with no pixels passing the Z and …
19 …{"TLB", "TLB-quads-passing-z-and-stencil-test", "[TLB] Quads with any pixels passing the Z and ste…
20 {"TLB", "TLB-quads-with-zero-coverage", "[TLB] Quads with all pixels having zero coverage"},
21 …{"TLB", "TLB-quads-with-non-zero-coverage", "[TLB] Quads with any pixels having non-zero coverage"…
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/linux/drivers/pci/controller/mobiveil/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 menu "Mobiveil-based PCIe controllers"
6 config PCIE_MOBIVEIL
9 config PCIE_MOBIVEIL_HOST
14 config PCIE_LAYERSCAPE_GEN4
23 config PCIE_MOBIVEIL_PLAT
24 bool "Mobiveil AXI PCIe controller"
30 Say Y here if you want to enable support for the Mobiveil AXI PCIe
/linux/drivers/net/ethernet/freescale/fman/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config FSL_FMAN
11 Freescale Data-Path Acceleration Architecture Frame Manager
14 config DPAA_ERRATUM_A050385
26 such that more than 17 AXI transactions are in flight from FMAN
30 1. FMAN AXI transaction crosses 4K address boundary (Errata
32 2. FMAN DMA address for an AXI transaction is not 16 byte
33 aligned, i.e. the last 4 bits of an address are non-zero
40 stress with multiple ports injecting line-rate traffic.
/linux/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
26 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
57 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
88 * stmmac_axi_setup - parse DT parameters for programming the AXI register
91 * if required, from device-tree the AXI internal register can be tuned
97 struct stmmac_axi *axi; in stmmac_axi_setup() local
99 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0); in stmmac_axi_setup()
103 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL); in stmmac_axi_setup()
104 if (!axi) { in stmmac_axi_setup()
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/linux/drivers/net/ethernet/xilinx/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 config NET_VENDOR_XILINX
19 config XILINX_EMACLITE
26 config XILINX_AXI_EMAC
27 tristate "Xilinx 10/100/1000 AXI Ethernet support"
33 AXI bus interface used in Xilinx Virtex FPGAs and Soc's.
35 config XILINX_LL_TEMAC
36 tristate "Xilinx LL TEMAC (LocalLink Tri-mode Ethernet MAC) driver"
/linux/drivers/pci/controller/plda/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 menu "PLDA-based PCIe controllers"
6 config PCIE_PLDA_HOST
9 config PCIE_MICROCHIP_HOST
10 tristate "Microchip AXI PCIe controller"
15 Say Y here if you want kernel to support the Microchip AXI PCIe
18 config PCIE_STARFIVE_HOST
28 linked and module will be called pcie-starfive.ko.
/linux/drivers/w1/masters/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # 1-wire bus master configuration
6 menu "1-wire Bus Masters"
8 config W1_MASTER_AMD_AXI
9 tristate "AMD AXI 1-wire bus host"
11 Say Y here is you want to support the AMD AXI 1-wire IP core.
19 config W1_MASTER_MATROX
20 tristate "Matrox G400 transport layer for 1-wire"
23 Say Y here if you want to communicate with your 1-wire devices
29 config W1_MASTER_DS2490
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/linux/drivers/clk/baikal-t1/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 config CLK_BAIKAL_T1
3 bool "Baikal-T1 Clocks Control Unit interface"
7 Clocks Control Unit is the core of Baikal-T1 SoC System Controller
13 to select Baikal-T1 CCU PLLs and Dividers drivers.
17 config CLK_BT1_CCU_PLL
18 bool "Baikal-T1 CCU PLLs support"
22 Enable this to support the PLLs embedded into the Baikal-T1 SoC
30 config CLK_BT1_CCU_DIV
31 bool "Baikal-T1 CCU Dividers support"
[all …]
/linux/drivers/dma/xilinx/
H A Dxilinx_dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved.
10 * The AXI Video Direct Memory Access (AXI VDMA) core is a soft Xilinx IP
11 * core that provides high-bandwidth direct memory access between memory
12 * and AXI4-Stream type video target peripherals. The core provides efficient
18 * registers are accessed through an AXI4-Lite slave interface.
20 * The AXI Direct Memory Access (AXI DMA) core is a soft Xilinx IP core that
21 * provides high-bandwidth one dimensional direct memory access between memory
22 * and AXI4-Stream target peripherals. It supports one receive and one
25 * The AXI CDMA, is a soft IP, which provides high-bandwidth Direct Memory
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/linux/arch/arm64/boot/dts/st/
H A Dstm32mp253.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
11 compatible = "arm,cortex-a35";
14 enable-method = "psci";
15 power-domains = <&CPU_PD1>;
16 power-domain-names = "psci";
20 arm-pmu {
23 interrupt-affinity = <&cpu0>, <&cpu1>;
27 CPU_PD1: power-domain-cpu1 {
28 #power-domain-cells = <0>;
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/linux/arch/arc/plat-axs10x/
H A Daxs10x.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
11 #include <asm/asm-offsets.h>
33 * --------------------- in axs10x_enable_gpio_intc_wire()
34 * | snps,arc700-intc | in axs10x_enable_gpio_intc_wire()
35 * --------------------- in axs10x_enable_gpio_intc_wire()
37 * ------------------- ------------------- in axs10x_enable_gpio_intc_wire()
38 * | snps,dw-apb-gpio | | snps,dw-apb-gpio | in axs10x_enable_gpio_intc_wire()
39 * ------------------- ------------------- in axs10x_enable_gpio_intc_wire()
43 * ------------------------ in axs10x_enable_gpio_intc_wire()
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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sm8450-rpmh.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8450-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8450
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
17 See also:: include/dt-bindings/interconnect/qcom,sm8450.h
22 - qcom,sm8450-aggre1-noc
23 - qcom,sm8450-aggre2-noc
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/linux/drivers/pwm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Pulse-Width Modulation (PWM) Support"
5 Generic Pulse-Width Modulation (PWM) support.
7 In Pulse-Width Modulation, a variation of the width of pulses
32 config PWM_DEBUG
41 config PWM_AB8500
48 will be called pwm-ab8500.
50 config PWM_ADP5585
57 config PWM_APPLE
67 will be called pwm-apple.
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/linux/Documentation/devicetree/bindings/net/
H A Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: snps,dwmac.yaml#
27 - items:
28 - enum:
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