Lines Matching +full:axi +full:- +full:config
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sc7280.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 const: qcom,pcie-sc7280
25 reg-names:
28 - const: parf # Qualcomm specific registers
29 - const: dbi # DesignWare PCIe registers
30 - const: elbi # External local bus interface registers
31 - const: atu # ATU address space
32 - const: config # PCIe configuration space
33 - const: mhi # MHI registers
39 clock-names:
41 - const: pipe # PIPE clock
42 - const: pipe_mux # PIPE MUX
43 - const: phy_pipe # PIPE output clock
44 - const: ref # REFERENCE clock
45 - const: aux # Auxiliary clock
46 - const: cfg # Configuration clock
47 - const: bus_master # Master AXI clock
48 - const: bus_slave # Slave AXI clock
49 - const: slave_q2a # Slave Q2A clock
50 - const: tbu # PCIe TBU clock
51 - const: ddrss_sf_tbu # PCIe SF TBU clock
52 - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock
53 - const: aggre1 # Aggre NoC PCIe1 AXI clock
59 interrupt-names:
61 - const: msi0
62 - const: msi1
63 - const: msi2
64 - const: msi3
65 - const: msi4
66 - const: msi5
67 - const: msi6
68 - const: msi7
73 reset-names:
75 - const: pci
78 - $ref: qcom,pcie-common.yaml#
83 - |
84 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
85 #include <dt-bindings/clock/qcom,rpmh.h>
86 #include <dt-bindings/gpio/gpio.h>
87 #include <dt-bindings/interrupt-controller/arm-gic.h>
90 #address-cells = <2>;
91 #size-cells = <2>;
94 compatible = "qcom,pcie-sc7280";
100 reg-names = "parf", "dbi", "elbi", "atu", "config";
104 bus-range = <0x00 0xff>;
106 linux,pci-domain = <1>;
107 num-lanes = <2>;
109 #address-cells = <3>;
110 #size-cells = <2>;
112 assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
113 assigned-clock-rates = <19200000>;
129 clock-names = "pipe",
143 dma-coherent;
153 interrupt-names = "msi0", "msi1", "msi2", "msi3",
155 #interrupt-cells = <1>;
156 interrupt-map-mask = <0 0 0 0x7>;
157 interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>,
162 iommu-map = <0x0 &apps_smmu 0x1c80 0x1>,
166 phy-names = "pciephy";
168 pinctrl-names = "default";
169 pinctrl-0 = <&pcie1_clkreq_n>;
171 power-domains = <&gcc GCC_PCIE_1_GDSC>;
174 reset-names = "pci";
176 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
177 vddpe-3v3-supply = <&pp3300_ssd>;