Lines Matching +full:axi +full:- +full:config
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8350.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 const: qcom,pcie-sm8350
25 reg-names:
28 - const: parf # Qualcomm specific registers
29 - const: dbi # DesignWare PCIe registers
30 - const: elbi # External local bus interface registers
31 - const: atu # ATU address space
32 - const: config # PCIe configuration space
33 - const: mhi # MHI registers
39 clock-names:
42 - const: aux # Auxiliary clock
43 - const: cfg # Configuration clock
44 - const: bus_master # Master AXI clock
45 - const: bus_slave # Slave AXI clock
46 - const: slave_q2a # Slave Q2A clock
47 - const: tbu # PCIe TBU clock
48 - const: ddrss_sf_tbu # PCIe SF TBU clock
49 - const: aggre1 # Aggre NoC PCIe1 AXI clock
50 - const: aggre0 # Aggre NoC PCIe0 AXI clock
56 interrupt-names:
58 - const: msi0
59 - const: msi1
60 - const: msi2
61 - const: msi3
62 - const: msi4
63 - const: msi5
64 - const: msi6
65 - const: msi7
70 reset-names:
72 - const: pci
75 - $ref: qcom,pcie-common.yaml#
80 - |
81 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
82 #include <dt-bindings/gpio/gpio.h>
83 #include <dt-bindings/interconnect/qcom,sm8350.h>
84 #include <dt-bindings/interrupt-controller/arm-gic.h>
87 #address-cells = <2>;
88 #size-cells = <2>;
91 compatible = "qcom,pcie-sm8350";
97 reg-names = "parf", "dbi", "elbi", "atu", "config";
101 bus-range = <0x00 0xff>;
103 linux,pci-domain = <0>;
104 num-lanes = <1>;
106 #address-cells = <3>;
107 #size-cells = <2>;
118 clock-names = "aux",
136 interrupt-names = "msi0", "msi1", "msi2", "msi3",
138 #interrupt-cells = <1>;
139 interrupt-map-mask = <0 0 0 0x7>;
140 interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
145 iommu-map = <0x0 &apps_smmu 0x1c00 0x1>,
149 phy-names = "pciephy";
151 pinctrl-0 = <&pcie0_default_state>;
152 pinctrl-names = "default";
154 power-domains = <&gcc PCIE_0_GDSC>;
157 reset-names = "pci";
159 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
160 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;