Home
last modified time | relevance | path

Searched full:th1520 (Results 1 – 25 of 27) sorted by relevance

12

/linux/Documentation/devicetree/bindings/clock/
H A Dthead,th1520-clk-ap.yaml4 $id: http://devicetree.org/schemas/clock/thead,th1520-clk-ap.yaml#
7 title: T-HEAD TH1520 AP sub-system clock controller
10 The T-HEAD TH1520 AP sub-system clock controller configures the
15 …https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manua…
25 - thead,th1520-clk-ap
26 - thead,th1520-clk-vo
35 - For "thead,th1520-clk-ap": the clock input must be the 24 MHz
37 - For "thead,th1520-clk-vo": the clock input must be the VIDEO_PLL,
39 TH1520 manual, VIDEO_PLL is a Silicon Creations Sigma-Delta PLL
46 See <dt-bindings/clock/thead,th1520-clk-ap.h> for valid indices.
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dthead,th1520-gmac.yaml4 $id: http://devicetree.org/schemas/net/thead,th1520-gmac.yaml#
7 title: T-HEAD TH1520 GMAC Ethernet controller
13 The TH1520 GMAC is described in the TH1520 Peripheral Interface User Manual
37 - thead,th1520-gmac
48 - thead,th1520-gmac
90 compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";
/linux/Documentation/devicetree/bindings/reset/
H A Dthead,th1520-reset.yaml4 $id: http://devicetree.org/schemas/reset/thead,th1520-reset.yaml#
7 title: T-HEAD TH1520 SoC Reset Controller
10 The T-HEAD TH1520 reset controller is a hardware block that asserts/deasserts
19 - thead,th1520-reset
40 compatible = "thead,th1520-reset";
/linux/Documentation/devicetree/bindings/firmware/
H A Dthead,th1520-aon.yaml4 $id: http://devicetree.org/schemas/firmware/thead,th1520-aon.yaml#
7 title: T-HEAD TH1520 AON (Always-On) Firmware
10 The Always-On (AON) subsystem in the TH1520 SoC is responsible for managing
26 const: thead,th1520-aon
56 compatible = "thead,th1520-aon";
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dthead,th1520-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/thead,th1520-pinctrl.yaml#
7 title: T-Head TH1520 SoC pin controller
13 Pinmux and pinconf controller in the T-Head TH1520 RISC-V SoC.
15 The TH1520 has 3 groups of pads each controlled from different memory ranges.
40 - thead,th1520-pinctrl
130 compatible = "thead,th1520-pinctrl";
159 compatible = "thead,th1520-pinctrl";
/linux/Documentation/devicetree/bindings/mailbox/
H A Dthead,th1520-mbox.yaml4 $id: http://devicetree.org/schemas/mailbox/thead,th1520-mbox.yaml#
7 title: T-head TH1520 Mailbox Controller
20 const: thead,th1520-mbox
71 #include <dt-bindings/clock/thead,th1520-clk-ap.h>
76 compatible = "thead,th1520-mbox";
/linux/drivers/power/sequencing/
H A Dpwrseq-thead-gpu.c3 * T-HEAD TH1520 GPU Power Sequencer Driver
9 * GPU on the T-HEAD TH1520 SoC. The sequence requires coordinating resources
26 #include <dt-bindings/power/thead,th1520-power.h>
125 /* We only match the specific T-HEAD TH1520 GPU compatible */ in pwrseq_thead_gpu_match()
126 if (!of_device_is_compatible(dev->of_node, "thead,th1520-gpu")) in pwrseq_thead_gpu_match()
248 MODULE_DESCRIPTION("T-HEAD TH1520 GPU power sequencer driver");
H A DKconfig31 tristate "T-HEAD TH1520 GPU power sequencing driver"
34 Say Y here to enable the power sequencing driver for the TH1520 SoC
/linux/arch/riscv/boot/dts/thead/
H A DMakefile2 dtb-$(CONFIG_ARCH_THEAD) += th1520-lichee-pi-4a.dtb th1520-beaglev-ahead.dtb
H A Dth1520-lichee-pi-4a.dts6 #include "th1520-lichee-module-4a.dtsi"
10 compatible = "sipeed,lichee-pi-4a", "sipeed,lichee-module-4a", "thead,th1520";
H A Dth1520-lichee-module-4a.dtsi8 #include "th1520.dtsi"
12 compatible = "sipeed,lichee-module-4a", "thead,th1520";
H A Dth1520-beaglev-ahead.dts9 #include "th1520.dtsi"
15 compatible = "beagle,beaglev-ahead", "thead,th1520";
/linux/drivers/clk/thead/
H A DKconfig4 bool "T-HEAD TH1520 AP clock support"
11 on the T-HEAD TH1520 SoC. This includes configuration of
H A DMakefile2 obj-$(CONFIG_CLK_THEAD_TH1520_AP) += clk-th1520-ap.o
H A Dclk-th1520-ap.c8 #include <dt-bindings/clock/thead,th1520-clk-ap.h>
1285 .compatible = "thead,th1520-clk-ap",
1289 .compatible = "thead,th1520-clk-vo",
1299 .name = "th1520-clk",
1305 MODULE_DESCRIPTION("T-HEAD TH1520 AP Clock driver");
/linux/Documentation/devicetree/bindings/riscv/
H A Dthead.yaml23 - const: thead,th1520
29 - const: thead,th1520
/linux/drivers/reset/
H A DKconfig315 tristate "T-HEAD TH1520 reset controller"
319 This driver provides support for the T-HEAD TH1520 SoC reset controller,
321 Enable this option if you need to control hardware resets on TH1520-based
H A DMakefile43 obj-$(CONFIG_RESET_TH1520) += reset-th1520.o
/linux/drivers/pmdomain/thead/
H A DKconfig4 tristate "Support TH1520 Power Domains"
/linux/drivers/pinctrl/
H A Dpinctrl-th1520.c3 * Pinctrl driver for the T-Head TH1520 SoC
340 .name = "th1520-group1",
346 .name = "th1520-group2",
352 .name = "th1520-group3",
902 { .compatible = "thead,th1520-pinctrl"},
910 .name = "pinctrl-th1520",
916 MODULE_DESCRIPTION("Pinctrl driver for the T-Head TH1520 SoC");
/linux/drivers/firmware/
H A DMakefile21 obj-$(CONFIG_TH1520_AON_PROTOCOL) += thead,th1520-aon.o
/linux/Documentation/devicetree/bindings/timer/
H A Dsifive,clint.yaml52 - thead,th1520-clint
/linux/Documentation/devicetree/bindings/mmc/
H A Dsnps,dwcmshc-sdhci.yaml32 - thead,th1520-dwcmshc
/linux/Documentation/devicetree/bindings/i2c/
H A Dsnps,designware-i2c.yaml41 - thead,th1520-i2c
/linux/Documentation/devicetree/bindings/spi/
H A Dsnps,dw-apb-ssi.yaml70 - thead,th1520-spi

12