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/linux/Documentation/devicetree/bindings/mmc/
H A Dloongson,ls2k0500-mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/loongson,ls2k0500-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The SD/SDIO/eMMC host controller for Loongson-2K family SoCs
10 The MMC host controller on the Loongson-2K0500/2K1000 (using an externally
12 The two MMC host controllers on the Loongson-2K2000 are similar,
17 - Binbin Zhou <zhoubinbin@loongson.cn>
20 - $ref: mmc-controller.yaml#
25 - loongson,ls2k0500-mmc
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/linux/Documentation/devicetree/bindings/pwm/
H A Dloongson,ls7a-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/loongson,ls7a-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson PWM Controller
10 - Binbin Zhou <zhoubinbin@loongson.cn>
13 The Loongson PWM has one pulse width output signal and one pulse input
15 It can be found on Loongson-2K series cpus and Loongson LS7A bridge chips.
18 - $ref: pwm.yaml#
23 - const: loongson,ls7a-pwm
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dloongson,eiointc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Extended I/O Interrupt Controller
10 - Binbin Zhou <zhoubinbin@loongson.cn>
13 This interrupt controller is found on the Loongson-3 family chips and
14 Loongson-2K series chips and is used to distribute interrupts directly to
18 - $ref: /schemas/interrupt-controller.yaml#
23 - loongson,ls2k0500-eiointc
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H A Dloongson,liointc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Local I/O Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips and
14 Loongson-2K series chips, as the primary package interrupt controller which
17 1.The Loongson-2K0500 is a single core CPU;
18 2.The Loongson-2K0500/2K1000 has 64 device interrupt sources as inputs, so we
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/linux/drivers/mfd/
H A Dls2k-bmc-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Loongson-2K Board Management Controller (BMC) Core Driver.
5 * Copyright (C) 2024-2025 Loongson Technology Corporation Limited.
8 * Chong Qiao <qiaochong@loongson.cn>
9 * Binbin Zhou <zhoubinbin@loongson.cn>
66 /* Maximum time to wait for U-Boot and DDR to be ready with ms. */
96 DEFINE_RES_MEM_NAMED(LS2K_DISPLAY_RES_START, SZ_4M, "simpledrm-res"),
100 DEFINE_RES_MEM_NAMED(LS2K_IPMI0_RES_START, LS2K_IPMI_RES_SIZE, "ipmi0-res"),
104 DEFINE_RES_MEM_NAMED(LS2K_IPMI1_RES_START, LS2K_IPMI_RES_SIZE, "ipmi1-res"),
108 DEFINE_RES_MEM_NAMED(LS2K_IPMI2_RES_START, LS2K_IPMI_RES_SIZE, "ipmi2-res"),
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/linux/arch/mips/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
144 bool "Generic board-agnostic MIPS kernel"
286 Build a generic DT-based kernel image that boots on select
287 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
379 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
380 DECstation porting pages on <http://decstation.unix-ag.org/>.
444 Olivetti M700-10 workstations.
481 bool "Loongson 32-bit family of machines"
501 This enables support for the Loongson-1 family of machines.
503 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
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/linux/drivers/gpu/drm/loongson/
H A Dlsdc_probe.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
19 #define LOONGSON_CPU_MIPS_IMP_LS2K 0x61 /* Loongson 2K Mips series SoC */
29 * We can achieve fine-grained control with the information about the host.
/linux/Documentation/translations/zh_CN/virt/
H A Dguest-halt-polling.rst1 .. include:: ../disclaimer-zh_CN.rst
3 :Original: Documentation/virt/guest-halt-polling.rst
7 司延腾 Yanteng Si <siyanteng@loongson.cn>
13 .. _cn_virt_guest-halt-polling:
27 2) 可以避免虚拟机退出的成本。
34 每个vcpu都有一个可调整的guest_halt_poll_ns（"per-cpu guest_halt_poll_ns"），
48 2) guest_halt_poll_shrink:
53 默认值: 2
57 当事件发生在per-cpu guest_halt_poll_ns之后但在global guest_halt_poll_ns之前，
58 用于增长per-cpu guest_halt_poll_ns的乘法系数。
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/linux/arch/mips/include/asm/mach-loongson64/
H A Dloongson.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
20 /* machine-specific boot configuration */
40 /* machine-specific reboot/halt operation */
49 /* loongson-specific command line, env and memory initialization */
77 #define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)
81 #define LOONGSON_LIO0_TOP (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1)
85 #define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
88 #define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)
89 /* Loongson-3 specific registers */
92 #define LOONGSON3_REG_TOP (LOONGSON3_REG_BASE+LOONGSON3_REG_SIZE-1)
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/linux/drivers/irqchip/
H A Dirq-loongson-liointc.c1 // SPDX-License-Identifier: GPL-2.0
4 * Loongson Local IO Interrupt Controller support
20 #include <loongson.h>
22 #include <asm/loongson.h>
25 #include "irq-loongson.h"
38 * LIOINTC_REG_INTC_POL register is only valid for Loongson-2K series, and
39 * Loongson-3 series behave as noops.
75 struct irq_chip_generic *gc = handler->priv->gc; in liointc_chained_handle_irq()
81 pending = readl(handler->priv->core_isr[core]); in liointc_chained_handle_irq()
85 if (handler->priv->has_lpc_irq_errata && in liointc_chained_handle_irq()
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/linux/drivers/rtc/
H A Drtc-loongson.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Loongson RTC driver
5 * Maintained out-of-tree by Huacai Chen <chenhuacai@kernel.org>.
7 * Binbin Zhou <zhoubinbin@loongson.cn>
20 #define TOY_WRITE0_REG 0x24 /* TOY low 32-bits value (write-only) */
21 #define TOY_WRITE1_REG 0x28 /* TOY high 32-bits value (write-only) */
22 #define TOY_READ0_REG 0x2c /* TOY low 32-bits value (read-only) */
23 #define TOY_READ1_REG 0x30 /* TOY high 32-bits value (read-only) */
26 #define TOY_MATCH2_REG 0x3c /* TOY timing interrupt 2 */
31 #define RTC_WRITE0_REG 0x64 /* RTC counters value (write-only) */
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/linux/drivers/i2c/busses/
H A Di2c-ls2x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Loongson-2K/Loongson LS7A I2C controller mode driver
5 * Copyright (C) 2013 Loongson Technology Corporation Limited.
6 * Copyright (C) 2014-2017 Lemote, Inc.
7 * Copyright (C) 2018-2022 Loongson Technology Corporation Limited.
10 * Rewritten for mainline by Binbin Zhou <zhoubinbin@loongson.cn>
81 if (!(readb(priv->base + I2C_LS2X_SR) & LS2X_SR_IF)) in ls2x_i2c_isr()
84 writeb(LS2X_CR_IACK, priv->base + I2C_LS2X_CR); in ls2x_i2c_isr()
85 complete(&priv->cmd_complete); in ls2x_i2c_isr()
99 struct i2c_timings *t = &priv->i2c_t; in ls2x_i2c_adjust_bus_speed()
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/linux/arch/mips/include/asm/mach-loongson2ef/
H A Dloongson.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 /* loongson internal northbridge initialization */
17 /* machine-specific reboot/halt operation */
21 /* machine-specific PROM functions */
28 /* loongson-specific command line, env and memory initialization */
71 #define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)
75 #define LOONGSON_LIO0_TOP (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1)
79 #define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
82 #define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)
86 #define LOONGSON_LIO1_TOP (LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1)
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/linux/arch/mips/include/asm/
H A Dcpu.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 +----------------+----------------+----------------+----------------+
20 +----------------+----------------+----------------+----------------+
24 that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64
92 #define PRID_IMP_LOONGSON_32 0x4200 /* Loongson-1 */
95 #define PRID_IMP_LOONGSON_64R 0x6100 /* Reduced Loongson-2 */
96 #define PRID_IMP_LOONGSON_64C 0x6300 /* Classic Loongson-2 and Loongson-3 */
97 #define PRID_IMP_LOONGSON_64G 0xc000 /* Generic Loongson-2 and Loongson-3 */
191 #define PRID_IMP_XBURST2 0x2000 /* XBurst®2 with MXU2.1 SIMD ISA */
268 * 4-bit bitfields, the 4K seems to simply count up and even newer MTI cores
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/linux/arch/loongarch/include/asm/
H A Daddrspace.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
45 #define TO_PHYS_MASK ((1ULL << DMW_PABITS) - 1)
86 * 32/64-bit LoongArch address spaces
121 * |-----------------------|
122 * | pci io ports(16K~32M) |
123 * |-----------------------|
124 * | isa io ports(0 ~16K) |
125 * PCI_IOBASE ->|-----------------------|
128 #define PCI_IOBASE ((void __iomem *)(vm_map_base + (2 * PAGE_SIZE)))
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/linux/Documentation/translations/zh_CN/core-api/
H A Dworkqueue.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/core-api/workqueue.rst
8 司延腾 Yanteng Si <siyanteng@loongson.cn>
9 周彬彬 Binbin Zhou <zhoubinbin@loongson.cn>
79 对于由线程执行的工作队列，被称为（内核）工作者（[k]worker）的特殊
109 每个与实际CPU绑定的worker-pool通过钩住调度器来实现并发管理。每当
139 参数 - ``@name`` , ``@flags`` 和 ``@max_active`` 。
148 ---------
202 --------------
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H A Dprintk-formats.rst1 .. include:: ../disclaimer-zh_CN.rst
3 :Original: Documentation/core-api/printk-formats.rst
7 司延腾 Yanteng Si <siyanteng@loongson.cn>
8 周彬彬 Binbin Zhou <zhoubinbin@loongson.cn>
10 .. _cn_printk-formats.rst:
19 :作者: Andrew Murray <amurray@mpc-data.co.uk>
28 -------------------------------------------
80 ----------
101 --------
105 %pe -ENOSPC
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H A Dcpu_hotplug.rst1 .. include:: ../disclaimer-zh_CN.rst
3 :Original: Documentation/core-api/cpu_hotplug.rst
6 司延腾 Yanteng Si <siyanteng@loongson.cn>
7 周彬彬 Binbin Zhou <zhoubinbin@loongson.cn>
45 限制启动时的CPU为 *n* 个。例如，如果你有四个CPU，使用 ``maxcpus=2`` 将只能启
79 hot-add/hot-remove。目前还没有定死规定。典型的用法是在启动时启动拓扑结构，这时
95 $ ls -lh /sys/devices/system/cpu
97 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu0
98 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu1
99 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu2
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/linux/drivers/mmc/host/
H A Dloongson2-mmc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Loongson-2K MMC/SDIO controller driver
5 * Copyright (C) 2018-2025 Loongson Technology Corporation Limited.
14 #include <linux/dma-mapping.h>
22 #include <linux/mmc/slot-gpio.h>
35 #define LOONGSON2_MMC_REG_RSP2 0x1c /* Command Response Register 2 */
48 #define LOONGSON2_MMC_REG_DLLVAL 0xf0 /* DLL Master Lock-value Register */
113 #define LOONGSON2_MMC_DSTS_SBITERR BIT(2)
130 #define LOONGSON2_MMC_INT_RXCRC BIT(2)
142 #define LOONGSON2_MMC_IEN_RXCRC BIT(2)
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/linux/drivers/clk/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
37 tristate "Clock driver for WM831x/2x PMICs"
40 Supports the clocking subsystem of the WM831x/2x series of
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
87 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
91 tristate "Raspberry Pi RP1-based clock support"
96 This multi-function device has 3 main PLLs and several clock
97 generators to drive the internal sub-peripherals.
106 multi-function device has one fixed-rate oscillator, clocked
137 be pre-programmed to support other configurations and features not yet
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/linux/include/linux/
H A Dpci-ecam.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 * Memory address shift values for the byte-level address that
21 * Section 7.2.2, Table 7-1, p. 677.
28 #define PCIE_ECAM_REG_MASK 0xfff /* Limit offset to a maximum of 4K */
66 void __iomem *win; /* 64-bit single mapping */
67 void __iomem **winp; /* 32-bit per-bus mapping */
78 /* map_bus when ->sysdata is an instance of pci_config_window */
85 extern const struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */
86 extern const struct pci_ecam_ops pci_32b_read_ops; /* 32-bit read only */
88 extern const struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 1.x & 2.x */
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/linux/drivers/thermal/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
47 Say Y to add a debugfs-based thermal core testing facility.
53 int "Emergency poweroff delay in milli-seconds"
145 bool "Fair-share thermal governor"
147 Enable this to manage platform thermals using fair-share governor.
250 memory-mapped reads to get the temperature. Any HW/System that
251 allows temperature reading by a single memory-mapped reading, be it
305 - AM654
360 module will be called sun8i-thermal.
369 ADC (TS-ADC) found on Rockchip SoCs. It supports one critical
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/linux/arch/loongarch/mm/
H A Dinit.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
29 #include <asm/asm-offsets.h>
136 #if CONFIG_PGTABLE_LEVELS == 2 in vmemmap_populate()
209 * Align swapper_pg_dir in to 64K, allows its address to be loaded
211 * __aligned(64K), its size would get rounded up to the alignment
H A Dkasan_init.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
12 #include <asm-generic/sections.h>
89 …return (void *)(((addr - XKVRANGE_VC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKVRANGE_VC_STA… in kasan_shadow_to_mem()
91 …return (void *)(((addr - XKPRANGE_WC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKPRANGE_WC_STA… in kasan_shadow_to_mem()
93 …return (void *)(((addr - XKPRANGE_UC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKPRANGE_UC_STA… in kasan_shadow_to_mem()
95 …return (void *)(((addr - XKPRANGE_CC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKPRANGE_CC_STA… in kasan_shadow_to_mem()
257 * here because it's nop on 2,3-level pagetable setups in clear_pgds()
271 * For example, PGDIR_SIZE of CONFIG_4KB_4LEVEL is 2^39, which is too in kasan_init()
272 * large for Loongson-2K series whose cpu_vabits = 39. in kasan_init()
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/linux/arch/mips/kernel/
H A Dcpu-probe.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 1994 - 2006 Ralf Baechle
20 #include <asm/cpu-features.h>
21 #include <asm/cpu-type.h>
28 #include <asm/pgtable-bits.h>
33 #include "fpu-probe.h"
35 #include <asm/mach-loongson64/cpucfg-emul.h>
134 cpu_data[0].tlbsize -= cpu_data[0].tlbsizeftlbways * in ftlb_disable()
150 c->options |= MIPS_CPU_MT_PER_TC_PERF_COUNTERS; in cpu_set_mt_per_tc_perf()
164 if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_34K_V1_0_2) in check_errata()
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