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/linux/drivers/isdn/mISDN/
H A Ddsp_cmx.c132 #include "dsp.h"
148 dsp_cmx_debug(struct dsp *dsp) in dsp_cmx_debug() argument
152 struct dsp *odsp; in dsp_cmx_debug()
154 printk(KERN_DEBUG "-----Current DSP\n"); in dsp_cmx_debug()
161 if (dsp == odsp) in dsp_cmx_debug()
173 member->dsp->name, member->dsp->pcm_slot_tx, in dsp_cmx_debug()
174 member->dsp->pcm_bank_tx, member->dsp->pcm_slot_rx, in dsp_cmx_debug()
175 member->dsp->pcm_bank_rx, member->dsp->hfc_conf, in dsp_cmx_debug()
176 member->dsp->tx_data, member->dsp->rx_is_off, in dsp_cmx_debug()
177 (member->dsp == dsp) ? " *this*" : ""); in dsp_cmx_debug()
[all …]
H A Ddsp_core.c23 * The dsp module provides layer 2 for b-channels (64kbit). It provides
96 * NOTE: The channel must be activated in order to make dsp work, even if
137 * When data is received from upper or lower layer (card), the complete dsp
139 * must lock timer events by DSP poll timer.
161 #include "dsp.h"
180 DEFINE_SPINLOCK(dsp_lock); /* global dsp lock */
189 dsp_rx_off_member(struct dsp *dsp) in dsp_rx_off_member() argument
196 if (!dsp->features_rx_off) in dsp_rx_off_member()
200 if (!dsp->rx_disabled) in dsp_rx_off_member()
203 else if (dsp->dtmf.software) in dsp_rx_off_member()
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H A Ddsp_dtmf.c15 #include "dsp.h"
40 void dsp_dtmf_goertzel_init(struct dsp *dsp) in dsp_dtmf_goertzel_init() argument
42 dsp->dtmf.size = 0; in dsp_dtmf_goertzel_init()
43 dsp->dtmf.lastwhat = '\0'; in dsp_dtmf_goertzel_init()
44 dsp->dtmf.lastdigit = '\0'; in dsp_dtmf_goertzel_init()
45 dsp->dtmf.count = 0; in dsp_dtmf_goertzel_init()
50 void dsp_dtmf_hardware(struct dsp *dsp) in dsp_dtmf_hardware() argument
54 if (!dsp->dtmf.enable) in dsp_dtmf_hardware()
57 if (!dsp->features.hfc_dtmf) in dsp_dtmf_hardware()
61 if (dsp->tx_volume) { in dsp_dtmf_hardware()
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H A Ddsp.h91 /* all members within a conference (this is linked 1:1 with the dsp) */
92 struct dsp;
95 struct dsp *dsp; member
170 struct dsp { struct
245 extern void dsp_cmx_debug(struct dsp *dsp); argument
246 extern void dsp_cmx_hardware(struct dsp_conf *conf, struct dsp *dsp);
247 extern int dsp_cmx_conf(struct dsp *dsp, u32 conf_id);
248 extern void dsp_cmx_receive(struct dsp *dsp, struct sk_buff *skb);
249 extern void dsp_cmx_hdlc(struct dsp *dsp, struct sk_buff *skb);
251 extern void dsp_cmx_transmit(struct dsp *dsp, struct sk_buff *skb);
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H A Ddsp_hwec.c4 * builtin mISDN dsp pipeline element for enabling the hw echocanceller
16 #include "dsp.h"
34 void dsp_hwec_enable(struct dsp *dsp, const char *arg) in dsp_hwec_enable() argument
40 if (!dsp) { in dsp_hwec_enable()
41 printk(KERN_ERR "%s: failed to enable hwec: dsp is NULL\n", in dsp_hwec_enable()
85 if (!dsp->ch.peer->ctrl(&dsp->ch, CONTROL_CHANNEL, &cq)) { in dsp_hwec_enable()
92 void dsp_hwec_disable(struct dsp *dsp) in dsp_hwec_disable() argument
96 if (!dsp) { in dsp_hwec_disable()
97 printk(KERN_ERR "%s: failed to disable hwec: dsp is NULL\n", in dsp_hwec_disable()
105 if (!dsp->ch.peer->ctrl(&dsp->ch, CONTROL_CHANNEL, &cq)) { in dsp_hwec_disable()
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dcirrus,lochnagar.yaml72 enum: [ codec-aif1, codec-aif2, codec-aif3, dsp-aif1,
73 dsp-aif2, psia1, psia2, gf-aif1, gf-aif2, gf-aif3,
84 codec-gpio7, codec-gpio8, dsp-gpio1, dsp-gpio2,
85 dsp-gpio3, dsp-gpio4, dsp-gpio5, dsp-gpio6,
90 codec-aif3-lrclk, codec-aif3-txdat, dsp-aif1-bclk,
91 dsp-aif1-rxdat, dsp-aif1-lrclk, dsp-aif1-txdat,
92 dsp-aif2-bclk, dsp-aif2-rxdat, dsp-aif2-lrclk,
93 dsp-aif2-txdat, psia1-bclk, psia1-rxdat, psia1-lrclk,
100 gf-aif2-lrclk, gf-aif2-txdat, dsp-uart1-rx,
101 dsp-uart1-tx, dsp-uart2-rx, dsp-uart2-tx,
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/linux/drivers/firmware/cirrus/test/
H A Dcs_dsp_test_bin_error.c82 /* Add a single payload to be written to DSP memory */ in bin_load_with_unknown_blocks()
91 cs_dsp_power_up(priv->dsp, local->wmfw, "wmfw", bin, "bin", "misc"), in bin_load_with_unknown_blocks()
97 regmap_raw_read(priv->dsp->regmap, reg_addr, readback, payload_size_bytes), in bin_load_with_unknown_blocks()
111 cs_dsp_power_up(priv->dsp, local->wmfw, "wmfw", NULL, NULL, "misc"), in bin_err_wrong_magic()
113 cs_dsp_power_down(priv->dsp); in bin_err_wrong_magic()
119 cs_dsp_power_up(priv->dsp, local->wmfw, "wmfw", bin, "bin", "misc"), in bin_err_wrong_magic()
124 cs_dsp_power_up(priv->dsp, local->wmfw, "wmfw", bin, "bin", "misc"), in bin_err_wrong_magic()
129 cs_dsp_power_up(priv->dsp, local->wmfw, "wmfw", bin, "bin", "misc"), in bin_err_wrong_magic()
134 cs_dsp_power_up(priv->dsp, local->wmfw, "wmfw", bin, "bin", "misc"), in bin_err_wrong_magic()
139 cs_dsp_power_up(priv->dsp, local->wmfw, "wmfw", bin, "bin", "misc"), in bin_err_wrong_magic()
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H A Dcs_dsp_test_control_cache.c149 struct cs_dsp *dsp = priv->dsp; in cs_dsp_ctl_v2_cache_alloc() local
158 /* Create some DSP data to initialize the control cache */ in cs_dsp_ctl_v2_cache_alloc()
166 regmap_raw_write(dsp->regmap, reg, reg_vals, alg_size_bytes); in cs_dsp_ctl_v2_cache_alloc()
185 KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0); in cs_dsp_ctl_v2_cache_alloc()
187 KUNIT_EXPECT_EQ(test, list_count_nodes(&dsp->ctl_list), num_ctls); in cs_dsp_ctl_v2_cache_alloc()
190 list_for_each_entry(ctl, &dsp->ctl_list, list) in cs_dsp_ctl_v2_cache_alloc()
203 struct cs_dsp *dsp = priv->dsp; in cs_dsp_ctl_cache_init() local
217 /* Create some DSP data to be read into the control cache */ in cs_dsp_ctl_cache_init()
223 regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes); in cs_dsp_ctl_cache_init()
238 KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0); in cs_dsp_ctl_cache_init()
[all …]
H A Dcs_dsp_mock_mem_maps.c3 // Mock DSP memory maps for cs_dsp KUnit tests.
87 * @dsp: Pointer to struct cs_dsp.
92 unsigned int cs_dsp_mock_size_of_region(const struct cs_dsp *dsp, int mem_type) in cs_dsp_mock_size_of_region() argument
97 if (dsp->mem == cs_dsp_mock_halo_dsp1_regions) in cs_dsp_mock_size_of_region()
99 else if (dsp->mem == cs_dsp_mock_adsp2_32bit_dsp1_regions) in cs_dsp_mock_size_of_region()
101 else if (dsp->mem == cs_dsp_mock_adsp2_16bit_dsp1_regions) in cs_dsp_mock_size_of_region()
106 for (i = 0; i < dsp->num_mems; ++i) { in cs_dsp_mock_size_of_region()
107 if (dsp->mem[i].type == mem_type) in cs_dsp_mock_size_of_region()
125 int num_mems = priv->dsp->num_mems; in cs_dsp_mock_base_addr_for_mem()
126 const struct cs_dsp_region *region = priv->dsp->mem; in cs_dsp_mock_base_addr_for_mem()
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H A Dcs_dsp_test_bin.c37 * dsp words: The addressing scheme used by the DSP, pointers and lengths
38 * in DSP memory use this. A memory region (XM, YM, ZM) is
39 * also required to create a unique DSP memory address.
44 * unpacked: Registers that have a 1:1 mapping to DSP words
45 * packed: Registers that pack multiple DSP words more efficiently into
51 * of multiple DSP words.
55 * can be expressed in dsp words, register addresses, or bytes.
106 * Convert number of DSP words to number of packed registers rounded
115 /* bin file that patches a single DSP word */
140 cs_dsp_power_up(priv->dsp, priv->local->wmfw, "mock_wmfw", in bin_patch_one_word()
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/linux/Documentation/devicetree/bindings/dsp/
H A Dmediatek,mt8186-dsp.yaml4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#
7 title: MediaTek mt8186 DSP core
13 MediaTek mt8186 SoC contains a DSP core used for
19 - mediatek,mt8186-dsp
20 - mediatek,mt8188-dsp
24 - description: Address and size of the DSP config registers
25 - description: Address and size of the DSP SRAM
26 - description: Address and size of the DSP secure registers
27 - description: Address and size of the DSP bus registers
38 - description: mux for audio dsp clock
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H A Dmediatek,mt8195-dsp.yaml4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8195-dsp.yaml#
7 title: Mediatek mt8195 DSP core
13 Some boards from mt8195 contain a DSP core used for
18 const: mediatek,mt8195-dsp
22 - description: Address and size of the DSP Cfg registers
23 - description: Address and size of the DSP SRAM
32 - description: mux for audio dsp clock
34 - description: mux for audio dsp local bus
35 - description: default audio dsp local bus clock source
36 - description: clock gate for audio dsp clock
[all …]
H A Dfsl,dsp.yaml4 $id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml#
7 title: NXP i.MX8 DSP core
14 Some boards from i.MX8 family contain a DSP core used for
20 - fsl,imx8qxp-dsp
21 - fsl,imx8qm-dsp
22 - fsl,imx8mp-dsp
23 - fsl,imx8ulp-dsp
72 used by DSP (see bindings/reserved-memory/reserved-memory.txt)
80 fsl,dsp-ctrl:
113 - fsl,imx8qxp-dsp
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,keystone-rproc.txt1 TI Keystone DSP devices
4 The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core
10 a dedicated local power/sleep controller etc. The DSP processor core in
13 DSP Device Node:
15 Each DSP Core sub-system is represented as a single DT node, and should also
26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs
27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs
28 "ti,k2e-dsp" for DSPs on Keystone 2 66AK2E SoCs
29 "ti,k2g-dsp" for DSPs on Keystone 2 66AK2G SoCs
42 State Control node, and the register offset of the DSP
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H A Dti,k3-dsp-rproc.yaml4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
7 title: TI K3 DSP devices
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
19 controller, a dedicated local power/sleep controller etc. The DSP processor
23 Each DSP Core sub-system is represented as a single DT node. Each node has a
31 - ti,am62a-c7xv-dsp
32 - ti,j721e-c66-dsp
33 - ti,j721e-c71-dsp
34 - ti,j721s2-c71-dsp
36 Use "ti,am62a-c7xv-dsp" for AM62A Deep learning DSPs on K3 AM62A SoCs
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H A Dti,davinci-rproc.txt1 TI Davinci DSP devices
4 The TI Davinci family of SoCs usually contains a TI DSP Core sub-system that
10 controller, a dedicated local power/sleep controller etc. The DSP processor
11 core used in Davinci SoCs is usually a C674x DSP CPU.
13 DSP Device Node:
15 Each DSP Core sub-system is represented as a single DT node.
22 "ti,da850-dsp" for DSPs on OMAP-L138 SoCs
35 interrupts from the DSP. The value should follow the
49 /* DSP Reserved Memory node */
55 dsp_memory_region: dsp-memory@c3000000 {
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H A Dti,omap-remoteproc.yaml21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
22 sub-system. The DSP processor sub-system can contain any of the TI's C64x,
23 C66x or C67x family of DSP cores as the main execution unit. The IPU processor
42 - ti,omap4-dsp
43 - ti,omap5-dsp
44 - ti,dra7-dsp
108 'reg-names'. These are mandatory for all DSP and IPU
132 This property is required for all the DSP instances on OMAP4, OMAP5
177 - ti,dra7-dsp
225 //Example 1: OMAP4 DSP
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/linux/arch/mips/include/asm/
H A Ddsp.h41 tsk->thread.dsp.dspr[0] = mfhi1(); \
42 tsk->thread.dsp.dspr[1] = mflo1(); \
43 tsk->thread.dsp.dspr[2] = mfhi2(); \
44 tsk->thread.dsp.dspr[3] = mflo2(); \
45 tsk->thread.dsp.dspr[4] = mfhi3(); \
46 tsk->thread.dsp.dspr[5] = mflo3(); \
47 tsk->thread.dsp.dspcontrol = rddsp(DSP_MASK); \
58 mthi1(tsk->thread.dsp.dspr[0]); \
59 mtlo1(tsk->thread.dsp.dspr[1]); \
60 mthi2(tsk->thread.dsp.dspr[2]); \
[all …]
/linux/arch/arm/mach-omap2/
H A Dpowerdomains2xxx_3xxx_data.c12 * The names for the DSP/IVA2 powerdomains are confusing.
14 * Most OMAP chips have an on-board DSP.
16 * On the 2420, this is a 'C55 DSP called, simply, the DSP. Its
17 * powerdomain is called the "DSP power domain." On the 2430, the
18 * on-board DSP is a 'C64 DSP, now called (along with its hardware
20 * the "DSP power domain." On the 3430, the DSP is a 'C64 DSP like the
25 * core, and has nothing to do with the DSP/IVA2.
27 * Ideally the DSP/IVA2 could just be the same powerdomain, but the PRCM
/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2hk.dtsi92 compatible = "ti,keystone-dsp-gpio";
100 compatible = "ti,keystone-dsp-gpio";
108 compatible = "ti,keystone-dsp-gpio";
116 compatible = "ti,keystone-dsp-gpio";
124 compatible = "ti,keystone-dsp-gpio";
132 compatible = "ti,keystone-dsp-gpio";
140 compatible = "ti,keystone-dsp-gpio";
148 compatible = "ti,keystone-dsp-gpio";
156 dsp0: dsp@10800000 {
157 compatible = "ti,k2hk-dsp";
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/linux/Documentation/devicetree/bindings/gpio/
H A Dti,keystone-dsp-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/ti,keystone-dsp-gpio.yaml#
7 title: Keystone 2 DSP GPIO controller
13 HOST OS userland running on ARM can send interrupts to DSP cores using
14 the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP core.
17 For example TCI6638K2K SoC has 8 DSP GPIO controllers:
20 Keystone 2 DSP GPIO controller has specific features:
22 - setting GPIO value to 1 causes IRQ generation on target DSP core;
28 const: ti,keystone-dsp-gpio
60 compatible = "ti,keystone-dsp-gpio";
/linux/Documentation/hwmon/
H A Dlochnagar.rst33 in1_input Measured voltage for 1V8 DSP (milliVolts)
34 in1_label "1V8 DSP"
35 curr2_input Measured current for 1V8 DSP (milliAmps)
36 curr2_label "1V8 DSP"
37 power2_average Measured average power for 1V8 DSP (microWatts)
39 power2_label "1V8 DSP"
47 in3_input Measured voltage for VDDCORE DSP (milliVolts)
48 in3_label "VDDCORE DSP"
49 curr4_input Measured current for VDDCORE DSP (milliAmps)
50 curr4_label "VDDCORE DSP"
[all …]
/linux/sound/pci/asihpi/
H A Dhpidspcd.h10 Functions for reading DSP code to load into DSP
19 /** Header structure for dsp firmware file
48 /** Expected number of words in the whole dsp code,INCL header */
53 /** internal state of DSP code reader */
65 /** Pointer to DSP code control structure */
70 /** Close the DSP code file */
73 /** Rewind to the beginning of the DSP code file (for verify) */
76 /** Read one word from the dsp code file
80 /**< DSP code descriptor */
84 /** Get a block of dsp code into an internal buffer, and provide a pointer to
[all …]
/linux/sound/pci/echoaudio/
H A Dechoaudio_dsp.c38 /* Some vector commands involve the DSP reading or writing data to and from the
39 comm page; if you send one of these commands to the DSP, it will complete the
46 /* Wait up to 20ms for the handshake from the DSP */ in wait_handshake()
56 dev_err(chip->card->dev, "wait_handshake(): Timeout waiting for DSP\n"); in wait_handshake()
62 /* Much of the interaction between the DSP and the driver is done via vector
63 commands; send_vector writes a vector command to the DSP. Typically, this
64 causes the DSP to read or write fields in the comm page.
89 /* write_dsp writes a 32-bit value to the DSP; this is used almost
90 exclusively for loading the DSP. */
106 chip->bad_board = true; /* Set true until DSP re-loaded */ in write_dsp()
[all …]
/linux/sound/soc/sof/
H A Dpm.c16 * Helper function to determine the target DSP state during
28 /* DSP should be in D3 if the system is suspending to S3+ */ in snd_sof_dsp_power_target()
30 /* DSP should be in D3 if the system is suspending to S3 */ in snd_sof_dsp_power_target()
35 * Currently, the only criterion for retaining the DSP in D0 in snd_sof_dsp_power_target()
81 /* do nothing if dsp resume callbacks are not set */ in sof_resume()
88 /* DSP was never successfully started, nothing to resume */ in sof_resume()
102 "error: failed to power up DSP after resume\n"); in sof_resume()
132 "error: failed to load DSP firmware after resume %d\n", in sof_resume()
147 "error: failed to boot DSP firmware after resume %d\n", in sof_resume()
174 /* notify DSP of system resume */ in sof_resume()
[all …]

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