Lines Matching full:dsp
3 * cs_dsp.c -- Cirrus Logic DSP firmware support
286 bool (*validate_version)(struct cs_dsp *dsp, unsigned int version);
287 unsigned int (*parse_sizes)(struct cs_dsp *dsp,
291 int (*setup_algs)(struct cs_dsp *dsp);
295 void (*show_fw_status)(struct cs_dsp *dsp);
296 void (*stop_watchdog)(struct cs_dsp *dsp);
298 int (*enable_memory)(struct cs_dsp *dsp);
299 void (*disable_memory)(struct cs_dsp *dsp);
300 int (*lock_memory)(struct cs_dsp *dsp, unsigned int lock_regions);
302 int (*enable_core)(struct cs_dsp *dsp);
303 void (*disable_core)(struct cs_dsp *dsp);
305 int (*start_core)(struct cs_dsp *dsp);
306 void (*stop_core)(struct cs_dsp *dsp);
384 static void cs_dsp_debugfs_save_wmfwname(struct cs_dsp *dsp, const char *s) in cs_dsp_debugfs_save_wmfwname() argument
388 kfree(dsp->wmfw_file_name); in cs_dsp_debugfs_save_wmfwname()
389 dsp->wmfw_file_name = tmp; in cs_dsp_debugfs_save_wmfwname()
392 static void cs_dsp_debugfs_save_binname(struct cs_dsp *dsp, const char *s) in cs_dsp_debugfs_save_binname() argument
396 kfree(dsp->bin_file_name); in cs_dsp_debugfs_save_binname()
397 dsp->bin_file_name = tmp; in cs_dsp_debugfs_save_binname()
400 static void cs_dsp_debugfs_clear(struct cs_dsp *dsp) in cs_dsp_debugfs_clear() argument
402 kfree(dsp->wmfw_file_name); in cs_dsp_debugfs_clear()
403 kfree(dsp->bin_file_name); in cs_dsp_debugfs_clear()
404 dsp->wmfw_file_name = NULL; in cs_dsp_debugfs_clear()
405 dsp->bin_file_name = NULL; in cs_dsp_debugfs_clear()
412 struct cs_dsp *dsp = file->private_data; in cs_dsp_debugfs_wmfw_read() local
415 mutex_lock(&dsp->pwr_lock); in cs_dsp_debugfs_wmfw_read()
417 if (!dsp->wmfw_file_name || !dsp->booted) in cs_dsp_debugfs_wmfw_read()
421 dsp->wmfw_file_name, in cs_dsp_debugfs_wmfw_read()
422 strlen(dsp->wmfw_file_name)); in cs_dsp_debugfs_wmfw_read()
424 mutex_unlock(&dsp->pwr_lock); in cs_dsp_debugfs_wmfw_read()
432 struct cs_dsp *dsp = file->private_data; in cs_dsp_debugfs_bin_read() local
435 mutex_lock(&dsp->pwr_lock); in cs_dsp_debugfs_bin_read()
437 if (!dsp->bin_file_name || !dsp->booted) in cs_dsp_debugfs_bin_read()
441 dsp->bin_file_name, in cs_dsp_debugfs_bin_read()
442 strlen(dsp->bin_file_name)); in cs_dsp_debugfs_bin_read()
444 mutex_unlock(&dsp->pwr_lock); in cs_dsp_debugfs_bin_read()
473 struct cs_dsp *dsp = s->private; in cs_dsp_debugfs_read_controls_show() local
477 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_debugfs_read_controls_show()
496 * cs_dsp_init_debugfs() - Create and populate DSP representation in debugfs
497 * @dsp: pointer to DSP structure
498 * @debugfs_root: pointer to debugfs directory in which to create this DSP
501 void cs_dsp_init_debugfs(struct cs_dsp *dsp, struct dentry *debugfs_root) in cs_dsp_init_debugfs() argument
506 root = debugfs_create_dir(dsp->name, debugfs_root); in cs_dsp_init_debugfs()
508 debugfs_create_bool("booted", 0444, root, &dsp->booted); in cs_dsp_init_debugfs()
509 debugfs_create_bool("running", 0444, root, &dsp->running); in cs_dsp_init_debugfs()
510 debugfs_create_x32("fw_id", 0444, root, &dsp->fw_id); in cs_dsp_init_debugfs()
511 debugfs_create_x32("fw_version", 0444, root, &dsp->fw_id_version); in cs_dsp_init_debugfs()
515 dsp, &cs_dsp_debugfs_fops[i].fops); in cs_dsp_init_debugfs()
517 debugfs_create_file("controls", 0444, root, dsp, in cs_dsp_init_debugfs()
520 dsp->debugfs_root = root; in cs_dsp_init_debugfs()
525 * cs_dsp_cleanup_debugfs() - Removes DSP representation from debugfs
526 * @dsp: pointer to DSP structure
528 void cs_dsp_cleanup_debugfs(struct cs_dsp *dsp) in cs_dsp_cleanup_debugfs() argument
530 cs_dsp_debugfs_clear(dsp); in cs_dsp_cleanup_debugfs()
531 debugfs_remove_recursive(dsp->debugfs_root); in cs_dsp_cleanup_debugfs()
532 dsp->debugfs_root = ERR_PTR(-ENODEV); in cs_dsp_cleanup_debugfs()
536 void cs_dsp_init_debugfs(struct cs_dsp *dsp, struct dentry *debugfs_root) in cs_dsp_init_debugfs() argument
541 void cs_dsp_cleanup_debugfs(struct cs_dsp *dsp) in cs_dsp_cleanup_debugfs() argument
546 static inline void cs_dsp_debugfs_save_wmfwname(struct cs_dsp *dsp, in cs_dsp_debugfs_save_wmfwname() argument
551 static inline void cs_dsp_debugfs_save_binname(struct cs_dsp *dsp, in cs_dsp_debugfs_save_binname() argument
556 static inline void cs_dsp_debugfs_clear(struct cs_dsp *dsp) in cs_dsp_debugfs_clear() argument
561 static const struct cs_dsp_region *cs_dsp_find_region(struct cs_dsp *dsp, in cs_dsp_find_region() argument
566 for (i = 0; i < dsp->num_mems; i++) in cs_dsp_find_region()
567 if (dsp->mem[i].type == type) in cs_dsp_find_region()
568 return &dsp->mem[i]; in cs_dsp_find_region()
608 static void cs_dsp_read_fw_status(struct cs_dsp *dsp, in cs_dsp_read_fw_status() argument
615 ret = regmap_read(dsp->regmap, dsp->base + offs[i], &offs[i]); in cs_dsp_read_fw_status()
617 cs_dsp_err(dsp, "Failed to read SCRATCH%u: %d\n", i, ret); in cs_dsp_read_fw_status()
623 static void cs_dsp_adsp2_show_fw_status(struct cs_dsp *dsp) in cs_dsp_adsp2_show_fw_status() argument
629 cs_dsp_read_fw_status(dsp, ARRAY_SIZE(offs), offs); in cs_dsp_adsp2_show_fw_status()
631 cs_dsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", in cs_dsp_adsp2_show_fw_status()
635 static void cs_dsp_adsp2v2_show_fw_status(struct cs_dsp *dsp) in cs_dsp_adsp2v2_show_fw_status() argument
639 cs_dsp_read_fw_status(dsp, ARRAY_SIZE(offs), offs); in cs_dsp_adsp2v2_show_fw_status()
641 cs_dsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", in cs_dsp_adsp2v2_show_fw_status()
646 static void cs_dsp_halo_show_fw_status(struct cs_dsp *dsp) in cs_dsp_halo_show_fw_status() argument
652 cs_dsp_read_fw_status(dsp, ARRAY_SIZE(offs), offs); in cs_dsp_halo_show_fw_status()
654 cs_dsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n", in cs_dsp_halo_show_fw_status()
662 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_base_reg() local
665 mem = cs_dsp_find_region(dsp, alg_region->type); in cs_dsp_coeff_base_reg()
667 cs_dsp_err(dsp, "No base for region %x\n", in cs_dsp_coeff_base_reg()
672 *reg = dsp->ops->region_to_reg(mem, ctl->alg_region.base + ctl->offset + off); in cs_dsp_coeff_base_reg()
691 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_write_acked_control() local
696 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_coeff_write_acked_control()
698 if (!dsp->running) in cs_dsp_coeff_write_acked_control()
705 cs_dsp_dbg(dsp, "Sending 0x%x to acked control alg 0x%x %s:0x%x\n", in cs_dsp_coeff_write_acked_control()
709 ret = regmap_raw_write(dsp->regmap, reg, &val, sizeof(val)); in cs_dsp_coeff_write_acked_control()
711 cs_dsp_err(dsp, "Failed to write %x: %d\n", reg, ret); in cs_dsp_coeff_write_acked_control()
733 ret = regmap_raw_read(dsp->regmap, reg, &val, sizeof(val)); in cs_dsp_coeff_write_acked_control()
735 cs_dsp_err(dsp, "Failed to read %x: %d\n", reg, ret); in cs_dsp_coeff_write_acked_control()
740 cs_dsp_dbg(dsp, "Acked control ACKED at poll %u\n", i); in cs_dsp_coeff_write_acked_control()
745 cs_dsp_warn(dsp, "Acked control @0x%x alg:0x%x %s:0x%x timed out\n", in cs_dsp_coeff_write_acked_control()
757 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_write_ctrl_raw() local
770 ret = regmap_raw_write(dsp->regmap, reg, scratch, in cs_dsp_coeff_write_ctrl_raw()
773 cs_dsp_err(dsp, "Failed to write %zu bytes to %x: %d\n", in cs_dsp_coeff_write_ctrl_raw()
778 cs_dsp_dbg(dsp, "Wrote %zu bytes to %x\n", len, reg); in cs_dsp_coeff_write_ctrl_raw()
804 lockdep_assert_held(&ctl->dsp->pwr_lock); in cs_dsp_coeff_write_ctrl()
822 if (ctl->enabled && ctl->dsp->running) in cs_dsp_coeff_write_ctrl()
846 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_lock_and_write_ctrl() local
849 lockdep_assert_not_held(&dsp->pwr_lock); in cs_dsp_coeff_lock_and_write_ctrl()
851 mutex_lock(&dsp->pwr_lock); in cs_dsp_coeff_lock_and_write_ctrl()
853 mutex_unlock(&dsp->pwr_lock); in cs_dsp_coeff_lock_and_write_ctrl()
862 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_read_ctrl_raw() local
875 ret = regmap_raw_read(dsp->regmap, reg, scratch, len); in cs_dsp_coeff_read_ctrl_raw()
877 cs_dsp_err(dsp, "Failed to read %zu bytes from %x: %d\n", in cs_dsp_coeff_read_ctrl_raw()
882 cs_dsp_dbg(dsp, "Read %zu bytes from %x\n", len, reg); in cs_dsp_coeff_read_ctrl_raw()
909 lockdep_assert_held(&ctl->dsp->pwr_lock); in cs_dsp_coeff_read_ctrl()
915 if (ctl->enabled && ctl->dsp->running) in cs_dsp_coeff_read_ctrl()
920 if (!ctl->flags && ctl->enabled && ctl->dsp->running) in cs_dsp_coeff_read_ctrl()
945 struct cs_dsp *dsp = ctl->dsp; in cs_dsp_coeff_lock_and_read_ctrl() local
948 lockdep_assert_not_held(&dsp->pwr_lock); in cs_dsp_coeff_lock_and_read_ctrl()
950 mutex_lock(&dsp->pwr_lock); in cs_dsp_coeff_lock_and_read_ctrl()
952 mutex_unlock(&dsp->pwr_lock); in cs_dsp_coeff_lock_and_read_ctrl()
958 static int cs_dsp_coeff_init_control_caches(struct cs_dsp *dsp) in cs_dsp_coeff_init_control_caches() argument
963 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_coeff_init_control_caches()
970 * For readable controls populate the cache from the DSP memory. in cs_dsp_coeff_init_control_caches()
984 static int cs_dsp_coeff_sync_controls(struct cs_dsp *dsp) in cs_dsp_coeff_sync_controls() argument
989 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_coeff_sync_controls()
1003 static void cs_dsp_signal_event_controls(struct cs_dsp *dsp, in cs_dsp_signal_event_controls() argument
1009 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_signal_event_controls()
1018 cs_dsp_warn(dsp, in cs_dsp_signal_event_controls()
1031 static int cs_dsp_create_control(struct cs_dsp *dsp, in cs_dsp_create_control() argument
1040 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_create_control()
1041 if (ctl->fw_name == dsp->fw_name && in cs_dsp_create_control()
1058 ctl->fw_name = dsp->fw_name; in cs_dsp_create_control()
1060 if (subname && dsp->wmfw_ver >= 2) { in cs_dsp_create_control()
1070 ctl->dsp = dsp; in cs_dsp_create_control()
1082 list_add(&ctl->list, &dsp->ctl_list); in cs_dsp_create_control()
1084 if (dsp->client_ops->control_add) { in cs_dsp_create_control()
1085 ret = dsp->client_ops->control_add(ctl); in cs_dsp_create_control()
1176 static int cs_dsp_coeff_parse_alg(struct cs_dsp *dsp, in cs_dsp_coeff_parse_alg() argument
1187 switch (dsp->wmfw_ver) { in cs_dsp_coeff_parse_alg()
1231 cs_dsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id); in cs_dsp_coeff_parse_alg()
1232 cs_dsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name); in cs_dsp_coeff_parse_alg()
1233 cs_dsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff); in cs_dsp_coeff_parse_alg()
1238 static int cs_dsp_coeff_parse_coeff(struct cs_dsp *dsp, in cs_dsp_coeff_parse_coeff() argument
1264 switch (dsp->wmfw_ver) { in cs_dsp_coeff_parse_coeff()
1307 cs_dsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type); in cs_dsp_coeff_parse_coeff()
1308 cs_dsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset); in cs_dsp_coeff_parse_coeff()
1309 cs_dsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name); in cs_dsp_coeff_parse_coeff()
1310 cs_dsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags); in cs_dsp_coeff_parse_coeff()
1311 cs_dsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type); in cs_dsp_coeff_parse_coeff()
1312 cs_dsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len); in cs_dsp_coeff_parse_coeff()
1317 static int cs_dsp_check_coeff_flags(struct cs_dsp *dsp, in cs_dsp_check_coeff_flags() argument
1324 cs_dsp_err(dsp, "Illegal flags 0x%x for control type 0x%x\n", in cs_dsp_check_coeff_flags()
1332 static int cs_dsp_parse_coeff(struct cs_dsp *dsp, in cs_dsp_parse_coeff() argument
1340 pos = cs_dsp_coeff_parse_alg(dsp, region, &alg_blk); in cs_dsp_parse_coeff()
1345 pos = cs_dsp_coeff_parse_coeff(dsp, region, pos, &coeff_blk); in cs_dsp_parse_coeff()
1356 ret = cs_dsp_check_coeff_flags(dsp, &coeff_blk, in cs_dsp_parse_coeff()
1366 ret = cs_dsp_check_coeff_flags(dsp, &coeff_blk, in cs_dsp_parse_coeff()
1376 ret = cs_dsp_check_coeff_flags(dsp, &coeff_blk, in cs_dsp_parse_coeff()
1385 cs_dsp_err(dsp, "Unknown control type: %d\n", in cs_dsp_parse_coeff()
1393 ret = cs_dsp_create_control(dsp, &alg_region, in cs_dsp_parse_coeff()
1401 cs_dsp_err(dsp, "Failed to create control: %.*s, %d\n", in cs_dsp_parse_coeff()
1408 static unsigned int cs_dsp_adsp1_parse_sizes(struct cs_dsp *dsp, in cs_dsp_adsp1_parse_sizes() argument
1417 cs_dsp_err(dsp, "%s: file truncated\n", file); in cs_dsp_adsp1_parse_sizes()
1421 cs_dsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n", file, in cs_dsp_adsp1_parse_sizes()
1428 static unsigned int cs_dsp_adsp2_parse_sizes(struct cs_dsp *dsp, in cs_dsp_adsp2_parse_sizes() argument
1437 cs_dsp_err(dsp, "%s: file truncated\n", file); in cs_dsp_adsp2_parse_sizes()
1441 cs_dsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n", file, in cs_dsp_adsp2_parse_sizes()
1448 static bool cs_dsp_validate_version(struct cs_dsp *dsp, unsigned int version) in cs_dsp_validate_version() argument
1452 cs_dsp_warn(dsp, "Deprecated file format %d\n", version); in cs_dsp_validate_version()
1462 static bool cs_dsp_halo_validate_version(struct cs_dsp *dsp, unsigned int version) in cs_dsp_halo_validate_version() argument
1472 static int cs_dsp_load(struct cs_dsp *dsp, const struct firmware *firmware, in cs_dsp_load() argument
1476 struct regmap *regmap = dsp->regmap; in cs_dsp_load()
1501 cs_dsp_err(dsp, "%s: invalid magic\n", file); in cs_dsp_load()
1505 if (!dsp->ops->validate_version(dsp, header->ver)) { in cs_dsp_load()
1506 cs_dsp_err(dsp, "%s: unknown file format %d\n", in cs_dsp_load()
1511 dsp->wmfw_ver = header->ver; in cs_dsp_load()
1513 if (header->core != dsp->type) { in cs_dsp_load()
1514 cs_dsp_err(dsp, "%s: invalid core %d != %d\n", in cs_dsp_load()
1515 file, header->core, dsp->type); in cs_dsp_load()
1520 pos = dsp->ops->parse_sizes(dsp, file, pos, firmware); in cs_dsp_load()
1534 cs_dsp_info(dsp, "%s: format %d timestamp %#llx\n", file, header->ver, in cs_dsp_load()
1560 cs_dsp_info(dsp, "%s: %.*s\n", file, in cs_dsp_load()
1565 ret = cs_dsp_parse_coeff(dsp, region); in cs_dsp_load()
1581 mem = cs_dsp_find_region(dsp, type); in cs_dsp_load()
1583 cs_dsp_err(dsp, "No region of type: %x\n", type); in cs_dsp_load()
1589 reg = dsp->ops->region_to_reg(mem, offset); in cs_dsp_load()
1592 cs_dsp_warn(dsp, in cs_dsp_load()
1598 cs_dsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file, in cs_dsp_load()
1607 cs_dsp_err(dsp, "Out of memory\n"); in cs_dsp_load()
1615 cs_dsp_err(dsp, in cs_dsp_load()
1629 cs_dsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", in cs_dsp_load()
1632 cs_dsp_debugfs_save_wmfwname(dsp, file); in cs_dsp_load()
1638 cs_dsp_err(dsp, "%s: file content overflows file data\n", file); in cs_dsp_load()
1645 * @dsp: pointer to DSP structure
1654 struct cs_dsp_coeff_ctl *cs_dsp_get_ctl(struct cs_dsp *dsp, const char *name, int type, in cs_dsp_get_ctl() argument
1659 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_get_ctl()
1661 list_for_each_entry(pos, &dsp->ctl_list, list) { in cs_dsp_get_ctl()
1665 pos->fw_name == dsp->fw_name && in cs_dsp_get_ctl()
1677 static void cs_dsp_ctl_fixup_base(struct cs_dsp *dsp, in cs_dsp_ctl_fixup_base() argument
1682 list_for_each_entry(ctl, &dsp->ctl_list, list) { in cs_dsp_ctl_fixup_base()
1683 if (ctl->fw_name == dsp->fw_name && in cs_dsp_ctl_fixup_base()
1691 static void *cs_dsp_read_algs(struct cs_dsp *dsp, size_t n_algs, in cs_dsp_read_algs() argument
1701 cs_dsp_err(dsp, "No algorithms\n"); in cs_dsp_read_algs()
1706 cs_dsp_err(dsp, "Algorithm count %zx excessive\n", n_algs); in cs_dsp_read_algs()
1711 reg = dsp->ops->region_to_reg(mem, pos + len); in cs_dsp_read_algs()
1713 ret = regmap_raw_read(dsp->regmap, reg, &val, sizeof(val)); in cs_dsp_read_algs()
1715 cs_dsp_err(dsp, "Failed to read algorithm list end: %d\n", in cs_dsp_read_algs()
1721 cs_dsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbedead\n", in cs_dsp_read_algs()
1724 /* Convert length from DSP words to bytes */ in cs_dsp_read_algs()
1731 reg = dsp->ops->region_to_reg(mem, pos); in cs_dsp_read_algs()
1733 ret = regmap_raw_read(dsp->regmap, reg, alg, len); in cs_dsp_read_algs()
1735 cs_dsp_err(dsp, "Failed to read algorithm list: %d\n", ret); in cs_dsp_read_algs()
1745 * @dsp: pointer to DSP structure
1751 struct cs_dsp_alg_region *cs_dsp_find_alg_region(struct cs_dsp *dsp, in cs_dsp_find_alg_region() argument
1756 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_find_alg_region()
1758 list_for_each_entry(alg_region, &dsp->alg_regions, list) { in cs_dsp_find_alg_region()
1767 static struct cs_dsp_alg_region *cs_dsp_create_region(struct cs_dsp *dsp, in cs_dsp_create_region() argument
1782 list_add_tail(&alg_region->list, &dsp->alg_regions); in cs_dsp_create_region()
1784 if (dsp->wmfw_ver > 0) in cs_dsp_create_region()
1785 cs_dsp_ctl_fixup_base(dsp, alg_region); in cs_dsp_create_region()
1790 static void cs_dsp_free_alg_regions(struct cs_dsp *dsp) in cs_dsp_free_alg_regions() argument
1794 while (!list_empty(&dsp->alg_regions)) { in cs_dsp_free_alg_regions()
1795 alg_region = list_first_entry(&dsp->alg_regions, in cs_dsp_free_alg_regions()
1803 static void cs_dsp_parse_wmfw_id_header(struct cs_dsp *dsp, in cs_dsp_parse_wmfw_id_header() argument
1806 dsp->fw_id = be32_to_cpu(fw->id); in cs_dsp_parse_wmfw_id_header()
1807 dsp->fw_id_version = be32_to_cpu(fw->ver); in cs_dsp_parse_wmfw_id_header()
1809 cs_dsp_info(dsp, "Firmware: %x v%d.%d.%d, %d algorithms\n", in cs_dsp_parse_wmfw_id_header()
1810 dsp->fw_id, (dsp->fw_id_version & 0xff0000) >> 16, in cs_dsp_parse_wmfw_id_header()
1811 (dsp->fw_id_version & 0xff00) >> 8, dsp->fw_id_version & 0xff, in cs_dsp_parse_wmfw_id_header()
1815 static void cs_dsp_parse_wmfw_v3_id_header(struct cs_dsp *dsp, in cs_dsp_parse_wmfw_v3_id_header() argument
1818 dsp->fw_id = be32_to_cpu(fw->id); in cs_dsp_parse_wmfw_v3_id_header()
1819 dsp->fw_id_version = be32_to_cpu(fw->ver); in cs_dsp_parse_wmfw_v3_id_header()
1820 dsp->fw_vendor_id = be32_to_cpu(fw->vendor_id); in cs_dsp_parse_wmfw_v3_id_header()
1822 cs_dsp_info(dsp, "Firmware: %x vendor: 0x%x v%d.%d.%d, %d algorithms\n", in cs_dsp_parse_wmfw_v3_id_header()
1823 dsp->fw_id, dsp->fw_vendor_id, in cs_dsp_parse_wmfw_v3_id_header()
1824 (dsp->fw_id_version & 0xff0000) >> 16, in cs_dsp_parse_wmfw_v3_id_header()
1825 (dsp->fw_id_version & 0xff00) >> 8, dsp->fw_id_version & 0xff, in cs_dsp_parse_wmfw_v3_id_header()
1829 static int cs_dsp_create_regions(struct cs_dsp *dsp, __be32 id, __be32 ver, in cs_dsp_create_regions() argument
1836 alg_region = cs_dsp_create_region(dsp, type[i], id, ver, base[i]); in cs_dsp_create_regions()
1844 static int cs_dsp_adsp1_setup_algs(struct cs_dsp *dsp) in cs_dsp_adsp1_setup_algs() argument
1854 mem = cs_dsp_find_region(dsp, WMFW_ADSP1_DM); in cs_dsp_adsp1_setup_algs()
1858 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id, in cs_dsp_adsp1_setup_algs()
1861 cs_dsp_err(dsp, "Failed to read algorithm info: %d\n", in cs_dsp_adsp1_setup_algs()
1868 cs_dsp_parse_wmfw_id_header(dsp, &adsp1_id.fw, n_algs); in cs_dsp_adsp1_setup_algs()
1870 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP1_ZM, in cs_dsp_adsp1_setup_algs()
1876 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP1_DM, in cs_dsp_adsp1_setup_algs()
1882 /* Calculate offset and length in DSP words */ in cs_dsp_adsp1_setup_algs()
1886 adsp1_alg = cs_dsp_read_algs(dsp, n_algs, mem, pos, len); in cs_dsp_adsp1_setup_algs()
1891 cs_dsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n", in cs_dsp_adsp1_setup_algs()
1899 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP1_DM, in cs_dsp_adsp1_setup_algs()
1907 if (dsp->wmfw_ver == 0) { in cs_dsp_adsp1_setup_algs()
1912 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp1_setup_algs()
1916 cs_dsp_warn(dsp, "Missing length info for region DM with ID %x\n", in cs_dsp_adsp1_setup_algs()
1921 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP1_ZM, in cs_dsp_adsp1_setup_algs()
1929 if (dsp->wmfw_ver == 0) { in cs_dsp_adsp1_setup_algs()
1934 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp1_setup_algs()
1938 cs_dsp_warn(dsp, "Missing length info for region ZM with ID %x\n", in cs_dsp_adsp1_setup_algs()
1949 static int cs_dsp_adsp2_setup_algs(struct cs_dsp *dsp) in cs_dsp_adsp2_setup_algs() argument
1959 mem = cs_dsp_find_region(dsp, WMFW_ADSP2_XM); in cs_dsp_adsp2_setup_algs()
1963 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id, in cs_dsp_adsp2_setup_algs()
1966 cs_dsp_err(dsp, "Failed to read algorithm info: %d\n", in cs_dsp_adsp2_setup_algs()
1973 cs_dsp_parse_wmfw_id_header(dsp, &adsp2_id.fw, n_algs); in cs_dsp_adsp2_setup_algs()
1975 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_XM, in cs_dsp_adsp2_setup_algs()
1981 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_YM, in cs_dsp_adsp2_setup_algs()
1987 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_ZM, in cs_dsp_adsp2_setup_algs()
1993 /* Calculate offset and length in DSP words */ in cs_dsp_adsp2_setup_algs()
1997 adsp2_alg = cs_dsp_read_algs(dsp, n_algs, mem, pos, len); in cs_dsp_adsp2_setup_algs()
2002 cs_dsp_dbg(dsp, in cs_dsp_adsp2_setup_algs()
2012 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_XM, in cs_dsp_adsp2_setup_algs()
2020 if (dsp->wmfw_ver == 0) { in cs_dsp_adsp2_setup_algs()
2025 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp2_setup_algs()
2029 cs_dsp_warn(dsp, "Missing length info for region XM with ID %x\n", in cs_dsp_adsp2_setup_algs()
2034 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_YM, in cs_dsp_adsp2_setup_algs()
2042 if (dsp->wmfw_ver == 0) { in cs_dsp_adsp2_setup_algs()
2047 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp2_setup_algs()
2051 cs_dsp_warn(dsp, "Missing length info for region YM with ID %x\n", in cs_dsp_adsp2_setup_algs()
2056 alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_ZM, in cs_dsp_adsp2_setup_algs()
2064 if (dsp->wmfw_ver == 0) { in cs_dsp_adsp2_setup_algs()
2069 cs_dsp_create_control(dsp, alg_region, 0, in cs_dsp_adsp2_setup_algs()
2073 cs_dsp_warn(dsp, "Missing length info for region ZM with ID %x\n", in cs_dsp_adsp2_setup_algs()
2084 static int cs_dsp_halo_create_regions(struct cs_dsp *dsp, __be32 id, __be32 ver, in cs_dsp_halo_create_regions() argument
2093 return cs_dsp_create_regions(dsp, id, ver, ARRAY_SIZE(types), types, bases); in cs_dsp_halo_create_regions()
2096 static int cs_dsp_halo_setup_algs(struct cs_dsp *dsp) in cs_dsp_halo_setup_algs() argument
2105 mem = cs_dsp_find_region(dsp, WMFW_ADSP2_XM); in cs_dsp_halo_setup_algs()
2109 ret = regmap_raw_read(dsp->regmap, mem->base, &halo_id, in cs_dsp_halo_setup_algs()
2112 cs_dsp_err(dsp, "Failed to read algorithm info: %d\n", in cs_dsp_halo_setup_algs()
2119 cs_dsp_parse_wmfw_v3_id_header(dsp, &halo_id.fw, n_algs); in cs_dsp_halo_setup_algs()
2121 ret = cs_dsp_halo_create_regions(dsp, halo_id.fw.id, halo_id.fw.ver, in cs_dsp_halo_setup_algs()
2126 /* Calculate offset and length in DSP words */ in cs_dsp_halo_setup_algs()
2130 halo_alg = cs_dsp_read_algs(dsp, n_algs, mem, pos, len); in cs_dsp_halo_setup_algs()
2135 cs_dsp_dbg(dsp, in cs_dsp_halo_setup_algs()
2144 ret = cs_dsp_halo_create_regions(dsp, halo_alg[i].alg.id, in cs_dsp_halo_setup_algs()
2157 static int cs_dsp_load_coeff(struct cs_dsp *dsp, const struct firmware *firmware, in cs_dsp_load_coeff() argument
2161 struct regmap *regmap = dsp->regmap; in cs_dsp_load_coeff()
2176 cs_dsp_err(dsp, "%s: coefficient file too short, %zu bytes\n", in cs_dsp_load_coeff()
2183 cs_dsp_err(dsp, "%s: invalid coefficient magic\n", file); in cs_dsp_load_coeff()
2192 cs_dsp_err(dsp, "%s: Unsupported coefficient file format %d\n", in cs_dsp_load_coeff()
2198 cs_dsp_info(dsp, "%s: v%d.%d.%d\n", file, in cs_dsp_load_coeff()
2224 cs_dsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n", in cs_dsp_load_coeff()
2229 cs_dsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n", in cs_dsp_load_coeff()
2236 cs_dsp_info(dsp, "%s: %.*s\n", dsp->fw_name, in cs_dsp_load_coeff()
2247 if (le32_to_cpu(blk->id) == dsp->fw_id && in cs_dsp_load_coeff()
2250 mem = cs_dsp_find_region(dsp, type); in cs_dsp_load_coeff()
2252 cs_dsp_err(dsp, "No ZM\n"); in cs_dsp_load_coeff()
2255 reg = dsp->ops->region_to_reg(mem, 0); in cs_dsp_load_coeff()
2270 cs_dsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n", in cs_dsp_load_coeff()
2275 mem = cs_dsp_find_region(dsp, type); in cs_dsp_load_coeff()
2277 cs_dsp_err(dsp, "No base for region %x\n", type); in cs_dsp_load_coeff()
2281 alg_region = cs_dsp_find_alg_region(dsp, type, in cs_dsp_load_coeff()
2285 cs_dsp_warn(dsp, in cs_dsp_load_coeff()
2295 reg = dsp->ops->region_to_reg(mem, reg); in cs_dsp_load_coeff()
2298 cs_dsp_err(dsp, "No %s for algorithm %x\n", in cs_dsp_load_coeff()
2304 cs_dsp_err(dsp, "%s.%d: Unknown region type %x at %d\n", in cs_dsp_load_coeff()
2314 cs_dsp_err(dsp, "Out of memory\n"); in cs_dsp_load_coeff()
2319 cs_dsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n", in cs_dsp_load_coeff()
2325 cs_dsp_err(dsp, in cs_dsp_load_coeff()
2336 cs_dsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", in cs_dsp_load_coeff()
2339 cs_dsp_debugfs_save_binname(dsp, file); in cs_dsp_load_coeff()
2345 cs_dsp_err(dsp, "%s: file content overflows file data\n", file); in cs_dsp_load_coeff()
2350 static int cs_dsp_create_name(struct cs_dsp *dsp) in cs_dsp_create_name() argument
2352 if (!dsp->name) { in cs_dsp_create_name()
2353 dsp->name = devm_kasprintf(dsp->dev, GFP_KERNEL, "DSP%d", in cs_dsp_create_name()
2354 dsp->num); in cs_dsp_create_name()
2355 if (!dsp->name) in cs_dsp_create_name()
2362 static int cs_dsp_common_init(struct cs_dsp *dsp) in cs_dsp_common_init() argument
2366 ret = cs_dsp_create_name(dsp); in cs_dsp_common_init()
2370 INIT_LIST_HEAD(&dsp->alg_regions); in cs_dsp_common_init()
2371 INIT_LIST_HEAD(&dsp->ctl_list); in cs_dsp_common_init()
2373 mutex_init(&dsp->pwr_lock); in cs_dsp_common_init()
2377 dsp->debugfs_root = ERR_PTR(-ENODEV); in cs_dsp_common_init()
2385 * @dsp: pointer to DSP structure
2389 int cs_dsp_adsp1_init(struct cs_dsp *dsp) in cs_dsp_adsp1_init() argument
2391 dsp->ops = &cs_dsp_adsp1_ops; in cs_dsp_adsp1_init()
2393 return cs_dsp_common_init(dsp); in cs_dsp_adsp1_init()
2399 * @dsp: pointer to DSP structure
2408 int cs_dsp_adsp1_power_up(struct cs_dsp *dsp, in cs_dsp_adsp1_power_up() argument
2416 mutex_lock(&dsp->pwr_lock); in cs_dsp_adsp1_power_up()
2418 dsp->fw_name = fw_name; in cs_dsp_adsp1_power_up()
2420 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_up()
2424 * For simplicity set the DSP clock rate to be the in cs_dsp_adsp1_power_up()
2427 if (dsp->sysclk_reg) { in cs_dsp_adsp1_power_up()
2428 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val); in cs_dsp_adsp1_power_up()
2430 cs_dsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret); in cs_dsp_adsp1_power_up()
2434 val = (val & dsp->sysclk_mask) >> dsp->sysclk_shift; in cs_dsp_adsp1_power_up()
2436 ret = regmap_update_bits(dsp->regmap, in cs_dsp_adsp1_power_up()
2437 dsp->base + ADSP1_CONTROL_31, in cs_dsp_adsp1_power_up()
2440 cs_dsp_err(dsp, "Failed to set clock rate: %d\n", ret); in cs_dsp_adsp1_power_up()
2445 ret = cs_dsp_load(dsp, wmfw_firmware, wmfw_filename); in cs_dsp_adsp1_power_up()
2449 ret = cs_dsp_adsp1_setup_algs(dsp); in cs_dsp_adsp1_power_up()
2453 ret = cs_dsp_load_coeff(dsp, coeff_firmware, coeff_filename); in cs_dsp_adsp1_power_up()
2458 ret = cs_dsp_coeff_init_control_caches(dsp); in cs_dsp_adsp1_power_up()
2463 ret = cs_dsp_coeff_sync_controls(dsp); in cs_dsp_adsp1_power_up()
2467 dsp->booted = true; in cs_dsp_adsp1_power_up()
2470 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_up()
2474 dsp->running = true; in cs_dsp_adsp1_power_up()
2476 mutex_unlock(&dsp->pwr_lock); in cs_dsp_adsp1_power_up()
2481 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_up()
2484 mutex_unlock(&dsp->pwr_lock); in cs_dsp_adsp1_power_up()
2490 * cs_dsp_adsp1_power_down() - Halts the DSP
2491 * @dsp: pointer to DSP structure
2493 void cs_dsp_adsp1_power_down(struct cs_dsp *dsp) in cs_dsp_adsp1_power_down() argument
2497 mutex_lock(&dsp->pwr_lock); in cs_dsp_adsp1_power_down()
2499 dsp->running = false; in cs_dsp_adsp1_power_down()
2500 dsp->booted = false; in cs_dsp_adsp1_power_down()
2503 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_down()
2506 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19, in cs_dsp_adsp1_power_down()
2509 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, in cs_dsp_adsp1_power_down()
2512 list_for_each_entry(ctl, &dsp->ctl_list, list) in cs_dsp_adsp1_power_down()
2515 cs_dsp_free_alg_regions(dsp); in cs_dsp_adsp1_power_down()
2517 mutex_unlock(&dsp->pwr_lock); in cs_dsp_adsp1_power_down()
2521 static int cs_dsp_adsp2v2_enable_core(struct cs_dsp *dsp) in cs_dsp_adsp2v2_enable_core() argument
2528 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, &val); in cs_dsp_adsp2v2_enable_core()
2539 cs_dsp_err(dsp, "Failed to start DSP RAM\n"); in cs_dsp_adsp2v2_enable_core()
2543 cs_dsp_dbg(dsp, "RAM ready after %d polls\n", count); in cs_dsp_adsp2v2_enable_core()
2548 static int cs_dsp_adsp2_enable_core(struct cs_dsp *dsp) in cs_dsp_adsp2_enable_core() argument
2552 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_enable_core()
2557 return cs_dsp_adsp2v2_enable_core(dsp); in cs_dsp_adsp2_enable_core()
2560 static int cs_dsp_adsp2_lock(struct cs_dsp *dsp, unsigned int lock_regions) in cs_dsp_adsp2_lock() argument
2562 struct regmap *regmap = dsp->regmap; in cs_dsp_adsp2_lock()
2569 lock_reg = dsp->base + ADSP2_LOCK_REGION_1_LOCK_REGION_0; in cs_dsp_adsp2_lock()
2590 static int cs_dsp_adsp2_enable_memory(struct cs_dsp *dsp) in cs_dsp_adsp2_enable_memory() argument
2592 return regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_enable_memory()
2596 static void cs_dsp_adsp2_disable_memory(struct cs_dsp *dsp) in cs_dsp_adsp2_disable_memory() argument
2598 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_disable_memory()
2602 static void cs_dsp_adsp2_disable_core(struct cs_dsp *dsp) in cs_dsp_adsp2_disable_core() argument
2604 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); in cs_dsp_adsp2_disable_core()
2605 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); in cs_dsp_adsp2_disable_core()
2606 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0); in cs_dsp_adsp2_disable_core()
2608 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_disable_core()
2612 static void cs_dsp_adsp2v2_disable_core(struct cs_dsp *dsp) in cs_dsp_adsp2v2_disable_core() argument
2614 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); in cs_dsp_adsp2v2_disable_core()
2615 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); in cs_dsp_adsp2v2_disable_core()
2616 regmap_write(dsp->regmap, dsp->base + ADSP2V2_WDMA_CONFIG_2, 0); in cs_dsp_adsp2v2_disable_core()
2619 static int cs_dsp_halo_configure_mpu(struct cs_dsp *dsp, unsigned int lock_regions) in cs_dsp_halo_configure_mpu() argument
2622 { dsp->base + HALO_MPU_LOCK_CONFIG, 0x5555 }, in cs_dsp_halo_configure_mpu()
2623 { dsp->base + HALO_MPU_LOCK_CONFIG, 0xAAAA }, in cs_dsp_halo_configure_mpu()
2624 { dsp->base + HALO_MPU_XMEM_ACCESS_0, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2625 { dsp->base + HALO_MPU_YMEM_ACCESS_0, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2626 { dsp->base + HALO_MPU_WINDOW_ACCESS_0, lock_regions }, in cs_dsp_halo_configure_mpu()
2627 { dsp->base + HALO_MPU_XREG_ACCESS_0, lock_regions }, in cs_dsp_halo_configure_mpu()
2628 { dsp->base + HALO_MPU_YREG_ACCESS_0, lock_regions }, in cs_dsp_halo_configure_mpu()
2629 { dsp->base + HALO_MPU_XMEM_ACCESS_1, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2630 { dsp->base + HALO_MPU_YMEM_ACCESS_1, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2631 { dsp->base + HALO_MPU_WINDOW_ACCESS_1, lock_regions }, in cs_dsp_halo_configure_mpu()
2632 { dsp->base + HALO_MPU_XREG_ACCESS_1, lock_regions }, in cs_dsp_halo_configure_mpu()
2633 { dsp->base + HALO_MPU_YREG_ACCESS_1, lock_regions }, in cs_dsp_halo_configure_mpu()
2634 { dsp->base + HALO_MPU_XMEM_ACCESS_2, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2635 { dsp->base + HALO_MPU_YMEM_ACCESS_2, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2636 { dsp->base + HALO_MPU_WINDOW_ACCESS_2, lock_regions }, in cs_dsp_halo_configure_mpu()
2637 { dsp->base + HALO_MPU_XREG_ACCESS_2, lock_regions }, in cs_dsp_halo_configure_mpu()
2638 { dsp->base + HALO_MPU_YREG_ACCESS_2, lock_regions }, in cs_dsp_halo_configure_mpu()
2639 { dsp->base + HALO_MPU_XMEM_ACCESS_3, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2640 { dsp->base + HALO_MPU_YMEM_ACCESS_3, 0xFFFFFFFF }, in cs_dsp_halo_configure_mpu()
2641 { dsp->base + HALO_MPU_WINDOW_ACCESS_3, lock_regions }, in cs_dsp_halo_configure_mpu()
2642 { dsp->base + HALO_MPU_XREG_ACCESS_3, lock_regions }, in cs_dsp_halo_configure_mpu()
2643 { dsp->base + HALO_MPU_YREG_ACCESS_3, lock_regions }, in cs_dsp_halo_configure_mpu()
2644 { dsp->base + HALO_MPU_LOCK_CONFIG, 0 }, in cs_dsp_halo_configure_mpu()
2647 return regmap_multi_reg_write(dsp->regmap, config, ARRAY_SIZE(config)); in cs_dsp_halo_configure_mpu()
2652 * @dsp: pointer to DSP structure
2659 int cs_dsp_set_dspclk(struct cs_dsp *dsp, unsigned int freq) in cs_dsp_set_dspclk() argument
2663 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CLOCKING, in cs_dsp_set_dspclk()
2667 cs_dsp_err(dsp, "Failed to set clock rate: %d\n", ret); in cs_dsp_set_dspclk()
2673 static void cs_dsp_stop_watchdog(struct cs_dsp *dsp) in cs_dsp_stop_watchdog() argument
2675 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_WATCHDOG, in cs_dsp_stop_watchdog()
2679 static void cs_dsp_halo_stop_watchdog(struct cs_dsp *dsp) in cs_dsp_halo_stop_watchdog() argument
2681 regmap_update_bits(dsp->regmap, dsp->base + HALO_WDT_CONTROL, in cs_dsp_halo_stop_watchdog()
2686 * cs_dsp_power_up() - Downloads firmware to the DSP
2687 * @dsp: pointer to DSP structure
2694 * This function is used on ADSP2 and Halo DSP cores, it powers-up the DSP core
2702 int cs_dsp_power_up(struct cs_dsp *dsp, in cs_dsp_power_up() argument
2709 mutex_lock(&dsp->pwr_lock); in cs_dsp_power_up()
2711 dsp->fw_name = fw_name; in cs_dsp_power_up()
2713 if (dsp->ops->enable_memory) { in cs_dsp_power_up()
2714 ret = dsp->ops->enable_memory(dsp); in cs_dsp_power_up()
2719 if (dsp->ops->enable_core) { in cs_dsp_power_up()
2720 ret = dsp->ops->enable_core(dsp); in cs_dsp_power_up()
2725 ret = cs_dsp_load(dsp, wmfw_firmware, wmfw_filename); in cs_dsp_power_up()
2729 ret = dsp->ops->setup_algs(dsp); in cs_dsp_power_up()
2733 ret = cs_dsp_load_coeff(dsp, coeff_firmware, coeff_filename); in cs_dsp_power_up()
2738 ret = cs_dsp_coeff_init_control_caches(dsp); in cs_dsp_power_up()
2742 if (dsp->ops->disable_core) in cs_dsp_power_up()
2743 dsp->ops->disable_core(dsp); in cs_dsp_power_up()
2745 dsp->booted = true; in cs_dsp_power_up()
2747 mutex_unlock(&dsp->pwr_lock); in cs_dsp_power_up()
2751 if (dsp->ops->disable_core) in cs_dsp_power_up()
2752 dsp->ops->disable_core(dsp); in cs_dsp_power_up()
2754 if (dsp->ops->disable_memory) in cs_dsp_power_up()
2755 dsp->ops->disable_memory(dsp); in cs_dsp_power_up()
2757 mutex_unlock(&dsp->pwr_lock); in cs_dsp_power_up()
2764 * cs_dsp_power_down() - Powers-down the DSP
2765 * @dsp: pointer to DSP structure
2770 void cs_dsp_power_down(struct cs_dsp *dsp) in cs_dsp_power_down() argument
2774 mutex_lock(&dsp->pwr_lock); in cs_dsp_power_down()
2776 cs_dsp_debugfs_clear(dsp); in cs_dsp_power_down()
2778 dsp->fw_id = 0; in cs_dsp_power_down()
2779 dsp->fw_id_version = 0; in cs_dsp_power_down()
2781 dsp->booted = false; in cs_dsp_power_down()
2783 if (dsp->ops->disable_memory) in cs_dsp_power_down()
2784 dsp->ops->disable_memory(dsp); in cs_dsp_power_down()
2786 list_for_each_entry(ctl, &dsp->ctl_list, list) in cs_dsp_power_down()
2789 cs_dsp_free_alg_regions(dsp); in cs_dsp_power_down()
2791 mutex_unlock(&dsp->pwr_lock); in cs_dsp_power_down()
2793 cs_dsp_dbg(dsp, "Shutdown complete\n"); in cs_dsp_power_down()
2797 static int cs_dsp_adsp2_start_core(struct cs_dsp *dsp) in cs_dsp_adsp2_start_core() argument
2799 return regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_start_core()
2804 static void cs_dsp_adsp2_stop_core(struct cs_dsp *dsp) in cs_dsp_adsp2_stop_core() argument
2806 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_stop_core()
2812 * @dsp: pointer to DSP structure
2818 int cs_dsp_run(struct cs_dsp *dsp) in cs_dsp_run() argument
2822 mutex_lock(&dsp->pwr_lock); in cs_dsp_run()
2824 if (!dsp->booted) { in cs_dsp_run()
2829 if (dsp->ops->enable_core) { in cs_dsp_run()
2830 ret = dsp->ops->enable_core(dsp); in cs_dsp_run()
2835 if (dsp->client_ops->pre_run) { in cs_dsp_run()
2836 ret = dsp->client_ops->pre_run(dsp); in cs_dsp_run()
2842 ret = cs_dsp_coeff_sync_controls(dsp); in cs_dsp_run()
2846 if (dsp->ops->lock_memory) { in cs_dsp_run()
2847 ret = dsp->ops->lock_memory(dsp, dsp->lock_regions); in cs_dsp_run()
2849 cs_dsp_err(dsp, "Error configuring MPU: %d\n", ret); in cs_dsp_run()
2854 if (dsp->ops->start_core) { in cs_dsp_run()
2855 ret = dsp->ops->start_core(dsp); in cs_dsp_run()
2860 dsp->running = true; in cs_dsp_run()
2862 if (dsp->client_ops->post_run) { in cs_dsp_run()
2863 ret = dsp->client_ops->post_run(dsp); in cs_dsp_run()
2868 mutex_unlock(&dsp->pwr_lock); in cs_dsp_run()
2873 if (dsp->ops->stop_core) in cs_dsp_run()
2874 dsp->ops->stop_core(dsp); in cs_dsp_run()
2875 if (dsp->ops->disable_core) in cs_dsp_run()
2876 dsp->ops->disable_core(dsp); in cs_dsp_run()
2877 mutex_unlock(&dsp->pwr_lock); in cs_dsp_run()
2885 * @dsp: pointer to DSP structure
2889 void cs_dsp_stop(struct cs_dsp *dsp) in cs_dsp_stop() argument
2892 cs_dsp_signal_event_controls(dsp, CS_DSP_FW_EVENT_SHUTDOWN); in cs_dsp_stop()
2894 if (dsp->ops->stop_watchdog) in cs_dsp_stop()
2895 dsp->ops->stop_watchdog(dsp); in cs_dsp_stop()
2898 if (dsp->ops->show_fw_status) in cs_dsp_stop()
2899 dsp->ops->show_fw_status(dsp); in cs_dsp_stop()
2901 mutex_lock(&dsp->pwr_lock); in cs_dsp_stop()
2903 if (dsp->client_ops->pre_stop) in cs_dsp_stop()
2904 dsp->client_ops->pre_stop(dsp); in cs_dsp_stop()
2906 dsp->running = false; in cs_dsp_stop()
2908 if (dsp->ops->stop_core) in cs_dsp_stop()
2909 dsp->ops->stop_core(dsp); in cs_dsp_stop()
2910 if (dsp->ops->disable_core) in cs_dsp_stop()
2911 dsp->ops->disable_core(dsp); in cs_dsp_stop()
2913 if (dsp->client_ops->post_stop) in cs_dsp_stop()
2914 dsp->client_ops->post_stop(dsp); in cs_dsp_stop()
2916 mutex_unlock(&dsp->pwr_lock); in cs_dsp_stop()
2918 cs_dsp_dbg(dsp, "Execution stopped\n"); in cs_dsp_stop()
2922 static int cs_dsp_halo_start_core(struct cs_dsp *dsp) in cs_dsp_halo_start_core() argument
2926 ret = regmap_update_bits(dsp->regmap, dsp->base + HALO_CCM_CORE_CONTROL, in cs_dsp_halo_start_core()
2932 return regmap_update_bits(dsp->regmap, dsp->base + HALO_CCM_CORE_CONTROL, in cs_dsp_halo_start_core()
2936 static void cs_dsp_halo_stop_core(struct cs_dsp *dsp) in cs_dsp_halo_stop_core() argument
2938 regmap_update_bits(dsp->regmap, dsp->base + HALO_CCM_CORE_CONTROL, in cs_dsp_halo_stop_core()
2942 regmap_update_bits(dsp->regmap, dsp->base + HALO_CORE_SOFT_RESET, in cs_dsp_halo_stop_core()
2948 * @dsp: pointer to DSP structure
2952 int cs_dsp_adsp2_init(struct cs_dsp *dsp) in cs_dsp_adsp2_init() argument
2956 switch (dsp->rev) { in cs_dsp_adsp2_init()
2959 * Disable the DSP memory by default when in reset for a small in cs_dsp_adsp2_init()
2962 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, in cs_dsp_adsp2_init()
2965 cs_dsp_err(dsp, in cs_dsp_adsp2_init()
2970 dsp->ops = &cs_dsp_adsp2_ops[0]; in cs_dsp_adsp2_init()
2973 dsp->ops = &cs_dsp_adsp2_ops[1]; in cs_dsp_adsp2_init()
2976 dsp->ops = &cs_dsp_adsp2_ops[2]; in cs_dsp_adsp2_init()
2980 return cs_dsp_common_init(dsp); in cs_dsp_adsp2_init()
2985 * cs_dsp_halo_init() - Initialise a cs_dsp structure representing a HALO Core DSP
2986 * @dsp: pointer to DSP structure
2990 int cs_dsp_halo_init(struct cs_dsp *dsp) in cs_dsp_halo_init() argument
2992 if (dsp->no_core_startstop) in cs_dsp_halo_init()
2993 dsp->ops = &cs_dsp_halo_ao_ops; in cs_dsp_halo_init()
2995 dsp->ops = &cs_dsp_halo_ops; in cs_dsp_halo_init()
2997 return cs_dsp_common_init(dsp); in cs_dsp_halo_init()
3003 * @dsp: pointer to DSP structure
3005 void cs_dsp_remove(struct cs_dsp *dsp) in cs_dsp_remove() argument
3009 while (!list_empty(&dsp->ctl_list)) { in cs_dsp_remove()
3010 ctl = list_first_entry(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list); in cs_dsp_remove()
3012 if (dsp->client_ops->control_remove) in cs_dsp_remove()
3013 dsp->client_ops->control_remove(ctl); in cs_dsp_remove()
3022 * cs_dsp_read_raw_data_block() - Reads a block of data from DSP memory
3023 * @dsp: pointer to DSP structure
3024 * @mem_type: the type of DSP memory containing the data to be read
3029 * If this is used to read unpacked 24-bit memory, each 24-bit DSP word will
3035 int cs_dsp_read_raw_data_block(struct cs_dsp *dsp, int mem_type, unsigned int mem_addr, in cs_dsp_read_raw_data_block() argument
3038 struct cs_dsp_region const *mem = cs_dsp_find_region(dsp, mem_type); in cs_dsp_read_raw_data_block()
3042 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_read_raw_data_block()
3047 reg = dsp->ops->region_to_reg(mem, mem_addr); in cs_dsp_read_raw_data_block()
3049 ret = regmap_raw_read(dsp->regmap, reg, data, in cs_dsp_read_raw_data_block()
3059 * cs_dsp_read_data_word() - Reads a word from DSP memory
3060 * @dsp: pointer to DSP structure
3061 * @mem_type: the type of DSP memory containing the data to be read
3067 int cs_dsp_read_data_word(struct cs_dsp *dsp, int mem_type, unsigned int mem_addr, u32 *data) in cs_dsp_read_data_word() argument
3072 ret = cs_dsp_read_raw_data_block(dsp, mem_type, mem_addr, 1, &raw); in cs_dsp_read_data_word()
3083 * cs_dsp_write_data_word() - Writes a word to DSP memory
3084 * @dsp: pointer to DSP structure
3085 * @mem_type: the type of DSP memory containing the data to be written
3091 int cs_dsp_write_data_word(struct cs_dsp *dsp, int mem_type, unsigned int mem_addr, u32 data) in cs_dsp_write_data_word() argument
3093 struct cs_dsp_region const *mem = cs_dsp_find_region(dsp, mem_type); in cs_dsp_write_data_word()
3097 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_write_data_word()
3102 reg = dsp->ops->region_to_reg(mem, mem_addr); in cs_dsp_write_data_word()
3104 return regmap_raw_write(dsp->regmap, reg, &val, sizeof(val)); in cs_dsp_write_data_word()
3110 * @buf: buffer containing DSP words read from DSP memory
3113 * DSP words from the register map have pad bytes and the data bytes
3133 * cs_dsp_adsp2_bus_error() - Handle a DSP bus error interrupt
3134 * @dsp: pointer to DSP structure
3136 * The firmware and DSP state will be logged for future analysis.
3138 void cs_dsp_adsp2_bus_error(struct cs_dsp *dsp) in cs_dsp_adsp2_bus_error() argument
3141 struct regmap *regmap = dsp->regmap; in cs_dsp_adsp2_bus_error()
3144 mutex_lock(&dsp->pwr_lock); in cs_dsp_adsp2_bus_error()
3146 ret = regmap_read(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, &val); in cs_dsp_adsp2_bus_error()
3148 cs_dsp_err(dsp, in cs_dsp_adsp2_bus_error()
3154 cs_dsp_err(dsp, "watchdog timeout error\n"); in cs_dsp_adsp2_bus_error()
3155 dsp->ops->stop_watchdog(dsp); in cs_dsp_adsp2_bus_error()
3156 if (dsp->client_ops->watchdog_expired) in cs_dsp_adsp2_bus_error()
3157 dsp->client_ops->watchdog_expired(dsp); in cs_dsp_adsp2_bus_error()
3162 cs_dsp_err(dsp, "bus error: address error\n"); in cs_dsp_adsp2_bus_error()
3164 cs_dsp_err(dsp, "bus error: region lock error\n"); in cs_dsp_adsp2_bus_error()
3166 ret = regmap_read(regmap, dsp->base + ADSP2_BUS_ERR_ADDR, &val); in cs_dsp_adsp2_bus_error()
3168 cs_dsp_err(dsp, in cs_dsp_adsp2_bus_error()
3174 cs_dsp_err(dsp, "bus error address = 0x%x\n", in cs_dsp_adsp2_bus_error()
3178 dsp->base + ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR, in cs_dsp_adsp2_bus_error()
3181 cs_dsp_err(dsp, in cs_dsp_adsp2_bus_error()
3187 cs_dsp_err(dsp, "xmem error address = 0x%x\n", in cs_dsp_adsp2_bus_error()
3189 cs_dsp_err(dsp, "pmem error address = 0x%x\n", in cs_dsp_adsp2_bus_error()
3194 regmap_update_bits(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, in cs_dsp_adsp2_bus_error()
3198 mutex_unlock(&dsp->pwr_lock); in cs_dsp_adsp2_bus_error()
3203 * cs_dsp_halo_bus_error() - Handle a DSP bus error interrupt
3204 * @dsp: pointer to DSP structure
3206 * The firmware and DSP state will be logged for future analysis.
3208 void cs_dsp_halo_bus_error(struct cs_dsp *dsp) in cs_dsp_halo_bus_error() argument
3210 struct regmap *regmap = dsp->regmap; in cs_dsp_halo_bus_error()
3213 { dsp->base + HALO_MPU_XM_VIO_STATUS, 0x0 }, in cs_dsp_halo_bus_error()
3214 { dsp->base + HALO_MPU_YM_VIO_STATUS, 0x0 }, in cs_dsp_halo_bus_error()
3215 { dsp->base + HALO_MPU_PM_VIO_STATUS, 0x0 }, in cs_dsp_halo_bus_error()
3219 mutex_lock(&dsp->pwr_lock); in cs_dsp_halo_bus_error()
3221 ret = regmap_read(regmap, dsp->base_sysinfo + HALO_AHBM_WINDOW_DEBUG_1, in cs_dsp_halo_bus_error()
3224 cs_dsp_warn(dsp, "Failed to read AHB DEBUG_1: %d\n", ret); in cs_dsp_halo_bus_error()
3228 cs_dsp_warn(dsp, "AHB: STATUS: 0x%x ADDR: 0x%x\n", in cs_dsp_halo_bus_error()
3233 ret = regmap_read(regmap, dsp->base_sysinfo + HALO_AHBM_WINDOW_DEBUG_0, in cs_dsp_halo_bus_error()
3236 cs_dsp_warn(dsp, "Failed to read AHB DEBUG_0: %d\n", ret); in cs_dsp_halo_bus_error()
3240 cs_dsp_warn(dsp, "AHB: SYS_ADDR: 0x%x\n", *fault); in cs_dsp_halo_bus_error()
3242 ret = regmap_bulk_read(regmap, dsp->base + HALO_MPU_XM_VIO_ADDR, in cs_dsp_halo_bus_error()
3245 cs_dsp_warn(dsp, "Failed to read MPU fault info: %d\n", ret); in cs_dsp_halo_bus_error()
3249 cs_dsp_warn(dsp, "XM: STATUS:0x%x ADDR:0x%x\n", fault[1], fault[0]); in cs_dsp_halo_bus_error()
3250 cs_dsp_warn(dsp, "YM: STATUS:0x%x ADDR:0x%x\n", fault[3], fault[2]); in cs_dsp_halo_bus_error()
3251 cs_dsp_warn(dsp, "PM: STATUS:0x%x ADDR:0x%x\n", fault[5], fault[4]); in cs_dsp_halo_bus_error()
3253 ret = regmap_multi_reg_write(dsp->regmap, clear, ARRAY_SIZE(clear)); in cs_dsp_halo_bus_error()
3255 cs_dsp_warn(dsp, "Failed to clear MPU status: %d\n", ret); in cs_dsp_halo_bus_error()
3258 mutex_unlock(&dsp->pwr_lock); in cs_dsp_halo_bus_error()
3263 * cs_dsp_halo_wdt_expire() - Handle DSP watchdog expiry
3264 * @dsp: pointer to DSP structure
3268 void cs_dsp_halo_wdt_expire(struct cs_dsp *dsp) in cs_dsp_halo_wdt_expire() argument
3270 mutex_lock(&dsp->pwr_lock); in cs_dsp_halo_wdt_expire()
3272 cs_dsp_warn(dsp, "WDT Expiry Fault\n"); in cs_dsp_halo_wdt_expire()
3274 dsp->ops->stop_watchdog(dsp); in cs_dsp_halo_wdt_expire()
3275 if (dsp->client_ops->watchdog_expired) in cs_dsp_halo_wdt_expire()
3276 dsp->client_ops->watchdog_expired(dsp); in cs_dsp_halo_wdt_expire()
3278 mutex_unlock(&dsp->pwr_lock); in cs_dsp_halo_wdt_expire()
3370 * cs_dsp_chunk_write() - Format data to a DSP memory chunk
3375 * This function sequentially writes values into the format required for DSP
3377 * big endian. Note that data is only committed to the chunk when a whole DSP
3416 * As cs_dsp_chunk_write only writes data when a whole DSP word is ready to
3418 * function will pad that data with zeros upto a whole DSP word and write out.
3432 * cs_dsp_chunk_read() - Parse data from a DSP memory chunk
3436 * This function sequentially reads values from a DSP memory formatted buffer,
3482 static void cs_dsp_wseq_clear(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq) in cs_dsp_wseq_clear() argument
3488 devm_kfree(dsp->dev, op); in cs_dsp_wseq_clear()
3492 static int cs_dsp_populate_wseq(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq) in cs_dsp_populate_wseq() argument
3500 cs_dsp_err(dsp, "No control for write sequence\n"); in cs_dsp_populate_wseq()
3510 cs_dsp_err(dsp, "Failed to read %s: %d\n", wseq->ctl->subname, ret); in cs_dsp_populate_wseq()
3519 op = devm_kzalloc(dsp->dev, sizeof(*op), GFP_KERNEL); in cs_dsp_populate_wseq()
3550 cs_dsp_err(dsp, "Unsupported op: %X\n", op->operation); in cs_dsp_populate_wseq()
3551 devm_kfree(dsp->dev, op); in cs_dsp_populate_wseq()
3562 cs_dsp_err(dsp, "%s missing end terminator\n", wseq->ctl->subname); in cs_dsp_populate_wseq()
3573 * cs_dsp_wseq_init() - Initialize write sequences contained within the loaded DSP firmware
3574 * @dsp: Pointer to DSP structure
3580 int cs_dsp_wseq_init(struct cs_dsp *dsp, struct cs_dsp_wseq *wseqs, unsigned int num_wseqs) in cs_dsp_wseq_init() argument
3584 lockdep_assert_held(&dsp->pwr_lock); in cs_dsp_wseq_init()
3587 ret = cs_dsp_populate_wseq(dsp, &wseqs[i]); in cs_dsp_wseq_init()
3589 cs_dsp_wseq_clear(dsp, &wseqs[i]); in cs_dsp_wseq_init()
3613 * @dsp: Pointer to a DSP structure
3630 int cs_dsp_wseq_write(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq, in cs_dsp_wseq_write() argument
3645 cs_dsp_err(dsp, "Missing terminator for %s\n", wseq->ctl->subname); in cs_dsp_wseq_write()
3649 op_new = devm_kzalloc(dsp->dev, sizeof(*op_new), GFP_KERNEL); in cs_dsp_wseq_write()
3676 cs_dsp_err(dsp, "Operation %X not supported\n", op_code); in cs_dsp_wseq_write()
3684 cs_dsp_err(dsp, "Not enough memory in %s for entry\n", wseq->ctl->subname); in cs_dsp_wseq_write()
3707 devm_kfree(dsp->dev, op_new); in cs_dsp_wseq_write()
3715 * @dsp: Pointer to a DSP structure
3728 int cs_dsp_wseq_multi_write(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq, in cs_dsp_wseq_multi_write() argument
3735 ret = cs_dsp_wseq_write(dsp, wseq, reg_seq[i].reg, in cs_dsp_wseq_multi_write()
3745 MODULE_DESCRIPTION("Cirrus Logic DSP Support");