1*9b33a4fcSRichard Fitzgerald // SPDX-License-Identifier: GPL-2.0-only
2*9b33a4fcSRichard Fitzgerald //
3*9b33a4fcSRichard Fitzgerald // KUnit tests for cs_dsp.
4*9b33a4fcSRichard Fitzgerald //
5*9b33a4fcSRichard Fitzgerald // Copyright (C) 2024 Cirrus Logic, Inc. and
6*9b33a4fcSRichard Fitzgerald // Cirrus Logic International Semiconductor Ltd.
7*9b33a4fcSRichard Fitzgerald
8*9b33a4fcSRichard Fitzgerald #include <kunit/device.h>
9*9b33a4fcSRichard Fitzgerald #include <kunit/resource.h>
10*9b33a4fcSRichard Fitzgerald #include <kunit/test.h>
11*9b33a4fcSRichard Fitzgerald #include <linux/build_bug.h>
12*9b33a4fcSRichard Fitzgerald #include <linux/firmware/cirrus/cs_dsp.h>
13*9b33a4fcSRichard Fitzgerald #include <linux/firmware/cirrus/cs_dsp_test_utils.h>
14*9b33a4fcSRichard Fitzgerald #include <linux/firmware/cirrus/wmfw.h>
15*9b33a4fcSRichard Fitzgerald #include <linux/list.h>
16*9b33a4fcSRichard Fitzgerald #include <linux/random.h>
17*9b33a4fcSRichard Fitzgerald #include <linux/regmap.h>
18*9b33a4fcSRichard Fitzgerald
19*9b33a4fcSRichard Fitzgerald KUNIT_DEFINE_ACTION_WRAPPER(_put_device_wrapper, put_device, struct device *);
20*9b33a4fcSRichard Fitzgerald KUNIT_DEFINE_ACTION_WRAPPER(_cs_dsp_stop_wrapper, cs_dsp_stop, struct cs_dsp *);
21*9b33a4fcSRichard Fitzgerald KUNIT_DEFINE_ACTION_WRAPPER(_cs_dsp_remove_wrapper, cs_dsp_remove, struct cs_dsp *);
22*9b33a4fcSRichard Fitzgerald
23*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local {
24*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_xm_header *xm_header;
25*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_wmfw_builder *wmfw_builder;
26*9b33a4fcSRichard Fitzgerald int wmfw_version;
27*9b33a4fcSRichard Fitzgerald };
28*9b33a4fcSRichard Fitzgerald
29*9b33a4fcSRichard Fitzgerald struct cs_dsp_ctl_cache_test_param {
30*9b33a4fcSRichard Fitzgerald int mem_type;
31*9b33a4fcSRichard Fitzgerald int alg_id;
32*9b33a4fcSRichard Fitzgerald unsigned int offs_words;
33*9b33a4fcSRichard Fitzgerald unsigned int len_bytes;
34*9b33a4fcSRichard Fitzgerald u16 ctl_type;
35*9b33a4fcSRichard Fitzgerald u16 flags;
36*9b33a4fcSRichard Fitzgerald };
37*9b33a4fcSRichard Fitzgerald
38*9b33a4fcSRichard Fitzgerald static const struct cs_dsp_mock_alg_def cs_dsp_ctl_cache_test_algs[] = {
39*9b33a4fcSRichard Fitzgerald {
40*9b33a4fcSRichard Fitzgerald .id = 0xfafa,
41*9b33a4fcSRichard Fitzgerald .ver = 0x100000,
42*9b33a4fcSRichard Fitzgerald .xm_base_words = 60,
43*9b33a4fcSRichard Fitzgerald .xm_size_words = 1000,
44*9b33a4fcSRichard Fitzgerald .ym_base_words = 0,
45*9b33a4fcSRichard Fitzgerald .ym_size_words = 1000,
46*9b33a4fcSRichard Fitzgerald .zm_base_words = 0,
47*9b33a4fcSRichard Fitzgerald .zm_size_words = 1000,
48*9b33a4fcSRichard Fitzgerald },
49*9b33a4fcSRichard Fitzgerald {
50*9b33a4fcSRichard Fitzgerald .id = 0xb,
51*9b33a4fcSRichard Fitzgerald .ver = 0x100001,
52*9b33a4fcSRichard Fitzgerald .xm_base_words = 1060,
53*9b33a4fcSRichard Fitzgerald .xm_size_words = 1000,
54*9b33a4fcSRichard Fitzgerald .ym_base_words = 1000,
55*9b33a4fcSRichard Fitzgerald .ym_size_words = 1000,
56*9b33a4fcSRichard Fitzgerald .zm_base_words = 1000,
57*9b33a4fcSRichard Fitzgerald .zm_size_words = 1000,
58*9b33a4fcSRichard Fitzgerald },
59*9b33a4fcSRichard Fitzgerald {
60*9b33a4fcSRichard Fitzgerald .id = 0x9f1234,
61*9b33a4fcSRichard Fitzgerald .ver = 0x100500,
62*9b33a4fcSRichard Fitzgerald .xm_base_words = 2060,
63*9b33a4fcSRichard Fitzgerald .xm_size_words = 32,
64*9b33a4fcSRichard Fitzgerald .ym_base_words = 2000,
65*9b33a4fcSRichard Fitzgerald .ym_size_words = 32,
66*9b33a4fcSRichard Fitzgerald .zm_base_words = 2000,
67*9b33a4fcSRichard Fitzgerald .zm_size_words = 32,
68*9b33a4fcSRichard Fitzgerald },
69*9b33a4fcSRichard Fitzgerald {
70*9b33a4fcSRichard Fitzgerald .id = 0xff00ff,
71*9b33a4fcSRichard Fitzgerald .ver = 0x300113,
72*9b33a4fcSRichard Fitzgerald .xm_base_words = 2100,
73*9b33a4fcSRichard Fitzgerald .xm_size_words = 32,
74*9b33a4fcSRichard Fitzgerald .ym_base_words = 2032,
75*9b33a4fcSRichard Fitzgerald .ym_size_words = 32,
76*9b33a4fcSRichard Fitzgerald .zm_base_words = 2032,
77*9b33a4fcSRichard Fitzgerald .zm_size_words = 32,
78*9b33a4fcSRichard Fitzgerald },
79*9b33a4fcSRichard Fitzgerald };
80*9b33a4fcSRichard Fitzgerald
81*9b33a4fcSRichard Fitzgerald static const struct cs_dsp_mock_coeff_def mock_coeff_template = {
82*9b33a4fcSRichard Fitzgerald .shortname = "Dummy Coeff",
83*9b33a4fcSRichard Fitzgerald .type = WMFW_CTL_TYPE_BYTES,
84*9b33a4fcSRichard Fitzgerald .mem_type = WMFW_ADSP2_YM,
85*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_READABLE | WMFW_CTL_FLAG_WRITEABLE,
86*9b33a4fcSRichard Fitzgerald .length_bytes = 4,
87*9b33a4fcSRichard Fitzgerald };
88*9b33a4fcSRichard Fitzgerald
89*9b33a4fcSRichard Fitzgerald static const char * const cs_dsp_ctl_cache_test_fw_names[] = {
90*9b33a4fcSRichard Fitzgerald "misc", "mbc/vss", "haps",
91*9b33a4fcSRichard Fitzgerald };
92*9b33a4fcSRichard Fitzgerald
_find_alg_entry(struct kunit * test,unsigned int alg_id)93*9b33a4fcSRichard Fitzgerald static int _find_alg_entry(struct kunit *test, unsigned int alg_id)
94*9b33a4fcSRichard Fitzgerald {
95*9b33a4fcSRichard Fitzgerald int i;
96*9b33a4fcSRichard Fitzgerald
97*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(cs_dsp_ctl_cache_test_algs); ++i) {
98*9b33a4fcSRichard Fitzgerald if (cs_dsp_ctl_cache_test_algs[i].id == alg_id)
99*9b33a4fcSRichard Fitzgerald break;
100*9b33a4fcSRichard Fitzgerald }
101*9b33a4fcSRichard Fitzgerald
102*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_LT(test, i, ARRAY_SIZE(cs_dsp_ctl_cache_test_algs));
103*9b33a4fcSRichard Fitzgerald
104*9b33a4fcSRichard Fitzgerald return i;
105*9b33a4fcSRichard Fitzgerald }
106*9b33a4fcSRichard Fitzgerald
_get_alg_mem_base_words(struct kunit * test,int alg_index,int mem_type)107*9b33a4fcSRichard Fitzgerald static int _get_alg_mem_base_words(struct kunit *test, int alg_index, int mem_type)
108*9b33a4fcSRichard Fitzgerald {
109*9b33a4fcSRichard Fitzgerald switch (mem_type) {
110*9b33a4fcSRichard Fitzgerald case WMFW_ADSP2_XM:
111*9b33a4fcSRichard Fitzgerald return cs_dsp_ctl_cache_test_algs[alg_index].xm_base_words;
112*9b33a4fcSRichard Fitzgerald case WMFW_ADSP2_YM:
113*9b33a4fcSRichard Fitzgerald return cs_dsp_ctl_cache_test_algs[alg_index].ym_base_words;
114*9b33a4fcSRichard Fitzgerald case WMFW_ADSP2_ZM:
115*9b33a4fcSRichard Fitzgerald return cs_dsp_ctl_cache_test_algs[alg_index].zm_base_words;
116*9b33a4fcSRichard Fitzgerald default:
117*9b33a4fcSRichard Fitzgerald KUNIT_FAIL(test, "Bug in test: illegal memory type %d\n", mem_type);
118*9b33a4fcSRichard Fitzgerald return 0;
119*9b33a4fcSRichard Fitzgerald }
120*9b33a4fcSRichard Fitzgerald }
121*9b33a4fcSRichard Fitzgerald
_create_dummy_wmfw(struct kunit * test)122*9b33a4fcSRichard Fitzgerald static struct cs_dsp_mock_wmfw_builder *_create_dummy_wmfw(struct kunit *test)
123*9b33a4fcSRichard Fitzgerald {
124*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
125*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
126*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_wmfw_builder *builder;
127*9b33a4fcSRichard Fitzgerald
128*9b33a4fcSRichard Fitzgerald builder = cs_dsp_mock_wmfw_init(priv, local->wmfw_version);
129*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, builder);
130*9b33a4fcSRichard Fitzgerald
131*9b33a4fcSRichard Fitzgerald /* Init an XM header */
132*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_data_block(builder,
133*9b33a4fcSRichard Fitzgerald WMFW_ADSP2_XM, 0,
134*9b33a4fcSRichard Fitzgerald local->xm_header->blob_data,
135*9b33a4fcSRichard Fitzgerald local->xm_header->blob_size_bytes);
136*9b33a4fcSRichard Fitzgerald
137*9b33a4fcSRichard Fitzgerald return builder;
138*9b33a4fcSRichard Fitzgerald }
139*9b33a4fcSRichard Fitzgerald
140*9b33a4fcSRichard Fitzgerald /*
141*9b33a4fcSRichard Fitzgerald * Memory allocated for control cache must be large enough.
142*9b33a4fcSRichard Fitzgerald * This creates multiple controls of different sizes so only works on
143*9b33a4fcSRichard Fitzgerald * wmfw V2 and later.
144*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_v2_cache_alloc(struct kunit * test)145*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_v2_cache_alloc(struct kunit *test)
146*9b33a4fcSRichard Fitzgerald {
147*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
148*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
149*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
150*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
151*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words, alg_size_bytes;
152*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
153*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
154*9b33a4fcSRichard Fitzgerald char ctl_name[4];
155*9b33a4fcSRichard Fitzgerald u32 *reg_vals;
156*9b33a4fcSRichard Fitzgerald int num_ctls;
157*9b33a4fcSRichard Fitzgerald
158*9b33a4fcSRichard Fitzgerald /* Create some DSP data to initialize the control cache */
159*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, 0, WMFW_ADSP2_YM);
160*9b33a4fcSRichard Fitzgerald alg_size_bytes = cs_dsp_ctl_cache_test_algs[0].ym_size_words *
161*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
162*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kzalloc(test, alg_size_bytes, GFP_KERNEL);
163*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
164*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, WMFW_ADSP2_YM);
165*9b33a4fcSRichard Fitzgerald reg += alg_base_words * cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
166*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, alg_size_bytes);
167*9b33a4fcSRichard Fitzgerald
168*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
169*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[0].id,
170*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
171*9b33a4fcSRichard Fitzgerald
172*9b33a4fcSRichard Fitzgerald /* Create controls of different sizes */
173*9b33a4fcSRichard Fitzgerald def.mem_type = WMFW_ADSP2_YM;
174*9b33a4fcSRichard Fitzgerald def.shortname = ctl_name;
175*9b33a4fcSRichard Fitzgerald num_ctls = 0;
176*9b33a4fcSRichard Fitzgerald for (def.length_bytes = 4; def.length_bytes <= 64; def.length_bytes += 4) {
177*9b33a4fcSRichard Fitzgerald snprintf(ctl_name, ARRAY_SIZE(ctl_name), "%x", def.length_bytes);
178*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
179*9b33a4fcSRichard Fitzgerald num_ctls++;
180*9b33a4fcSRichard Fitzgerald def.offset_dsp_words += def.length_bytes / sizeof(u32);
181*9b33a4fcSRichard Fitzgerald }
182*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
183*9b33a4fcSRichard Fitzgerald
184*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
185*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
186*9b33a4fcSRichard Fitzgerald
187*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, list_count_nodes(&dsp->ctl_list), num_ctls);
188*9b33a4fcSRichard Fitzgerald
189*9b33a4fcSRichard Fitzgerald /* Check that the block allocated for the cache is large enough */
190*9b33a4fcSRichard Fitzgerald list_for_each_entry(ctl, &dsp->ctl_list, list)
191*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_GE(test, ksize(ctl->cache), ctl->len);
192*9b33a4fcSRichard Fitzgerald }
193*9b33a4fcSRichard Fitzgerald
194*9b33a4fcSRichard Fitzgerald /*
195*9b33a4fcSRichard Fitzgerald * Content of registers backing a control should be read into the
196*9b33a4fcSRichard Fitzgerald * control cache when the firmware is downloaded.
197*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_init(struct kunit * test)198*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_init(struct kunit *test)
199*9b33a4fcSRichard Fitzgerald {
200*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
201*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
202*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
203*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
204*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
205*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
206*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
207*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
208*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
209*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
210*9b33a4fcSRichard Fitzgerald
211*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
212*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
213*9b33a4fcSRichard Fitzgerald
214*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
215*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
216*9b33a4fcSRichard Fitzgerald
217*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
218*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
219*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
220*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
221*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
222*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
223*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
224*9b33a4fcSRichard Fitzgerald
225*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
226*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
227*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
228*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
229*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
230*9b33a4fcSRichard Fitzgerald
231*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
232*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
233*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
234*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
235*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
236*9b33a4fcSRichard Fitzgerald
237*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
238*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
239*9b33a4fcSRichard Fitzgerald
240*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
241*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
242*9b33a4fcSRichard Fitzgerald
243*9b33a4fcSRichard Fitzgerald /*
244*9b33a4fcSRichard Fitzgerald * The data should have been populated into the control cache
245*9b33a4fcSRichard Fitzgerald * so should be readable through the control.
246*9b33a4fcSRichard Fitzgerald */
247*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
248*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
249*9b33a4fcSRichard Fitzgerald 0);
250*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
251*9b33a4fcSRichard Fitzgerald }
252*9b33a4fcSRichard Fitzgerald
253*9b33a4fcSRichard Fitzgerald /*
254*9b33a4fcSRichard Fitzgerald * For a non-volatile write-only control the cache should be zero-filled
255*9b33a4fcSRichard Fitzgerald * when the firmware is downloaded.
256*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_init_write_only(struct kunit * test)257*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_init_write_only(struct kunit *test)
258*9b33a4fcSRichard Fitzgerald {
259*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
260*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
261*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
262*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
263*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
264*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
265*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
266*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
267*9b33a4fcSRichard Fitzgerald u32 *readback, *zeros;
268*9b33a4fcSRichard Fitzgerald
269*9b33a4fcSRichard Fitzgerald zeros = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
270*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, zeros);
271*9b33a4fcSRichard Fitzgerald
272*9b33a4fcSRichard Fitzgerald readback = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
273*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
274*9b33a4fcSRichard Fitzgerald
275*9b33a4fcSRichard Fitzgerald /* Create a non-volatile write-only control */
276*9b33a4fcSRichard Fitzgerald def.flags = param->flags & ~WMFW_CTL_FLAG_VOLATILE;
277*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
278*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
279*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
280*9b33a4fcSRichard Fitzgerald
281*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
282*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
283*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
284*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
285*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
286*9b33a4fcSRichard Fitzgerald
287*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
288*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
289*9b33a4fcSRichard Fitzgerald
290*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
291*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
292*9b33a4fcSRichard Fitzgerald
293*9b33a4fcSRichard Fitzgerald /*
294*9b33a4fcSRichard Fitzgerald * The control cache should have been zero-filled so should be
295*9b33a4fcSRichard Fitzgerald * readable through the control.
296*9b33a4fcSRichard Fitzgerald */
297*9b33a4fcSRichard Fitzgerald get_random_bytes(readback, param->len_bytes);
298*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
299*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
300*9b33a4fcSRichard Fitzgerald 0);
301*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, zeros, param->len_bytes);
302*9b33a4fcSRichard Fitzgerald }
303*9b33a4fcSRichard Fitzgerald
304*9b33a4fcSRichard Fitzgerald /*
305*9b33a4fcSRichard Fitzgerald * Multiple different firmware with identical controls.
306*9b33a4fcSRichard Fitzgerald * This is legal because different firmwares could contain the same
307*9b33a4fcSRichard Fitzgerald * algorithm.
308*9b33a4fcSRichard Fitzgerald * The control cache should be initialized only with the data from
309*9b33a4fcSRichard Fitzgerald * the firmware containing it.
310*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_init_multiple_fw_same_controls(struct kunit * test)311*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_init_multiple_fw_same_controls(struct kunit *test)
312*9b33a4fcSRichard Fitzgerald {
313*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
314*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
315*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
316*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_wmfw_builder *builder[3];
317*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
318*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *walkctl, *ctl[3];
319*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
320*9b33a4fcSRichard Fitzgerald u32 *reg_vals[3], *readback;
321*9b33a4fcSRichard Fitzgerald int i;
322*9b33a4fcSRichard Fitzgerald
323*9b33a4fcSRichard Fitzgerald static_assert(ARRAY_SIZE(ctl) == ARRAY_SIZE(builder));
324*9b33a4fcSRichard Fitzgerald static_assert(ARRAY_SIZE(reg_vals) == ARRAY_SIZE(builder));
325*9b33a4fcSRichard Fitzgerald static_assert(ARRAY_SIZE(cs_dsp_ctl_cache_test_fw_names) >= ARRAY_SIZE(builder));
326*9b33a4fcSRichard Fitzgerald
327*9b33a4fcSRichard Fitzgerald /* Create an identical control in each firmware but with different alg id */
328*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(builder); i++) {
329*9b33a4fcSRichard Fitzgerald builder[i] = _create_dummy_wmfw(test);
330*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, builder[i]);
331*9b33a4fcSRichard Fitzgerald
332*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(builder[i],
333*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[0].id,
334*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
335*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(builder[i], &def);
336*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(builder[i]);
337*9b33a4fcSRichard Fitzgerald }
338*9b33a4fcSRichard Fitzgerald
339*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
340*9b33a4fcSRichard Fitzgerald reg_vals[i] = kunit_kmalloc(test, def.length_bytes, GFP_KERNEL);
341*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals[i]);
342*9b33a4fcSRichard Fitzgerald }
343*9b33a4fcSRichard Fitzgerald
344*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, def.length_bytes, GFP_KERNEL);
345*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
346*9b33a4fcSRichard Fitzgerald
347*9b33a4fcSRichard Fitzgerald /*
348*9b33a4fcSRichard Fitzgerald * For each firmware create random content in the register backing
349*9b33a4fcSRichard Fitzgerald * the control. Then download, start, stop and power-down.
350*9b33a4fcSRichard Fitzgerald */
351*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(builder); i++) {
352*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, 0, def.mem_type);
353*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, def.mem_type);
354*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + def.offset_dsp_words) *
355*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
356*9b33a4fcSRichard Fitzgerald
357*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals[i], def.length_bytes);
358*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals[i], def.length_bytes);
359*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(builder[i]);
360*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test,
361*9b33a4fcSRichard Fitzgerald cs_dsp_power_up(dsp, wmfw,
362*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_fw_names[i],
363*9b33a4fcSRichard Fitzgerald NULL, NULL,
364*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_fw_names[i]),
365*9b33a4fcSRichard Fitzgerald 0);
366*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
367*9b33a4fcSRichard Fitzgerald cs_dsp_stop(dsp);
368*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
369*9b33a4fcSRichard Fitzgerald }
370*9b33a4fcSRichard Fitzgerald
371*9b33a4fcSRichard Fitzgerald /* There should now be 3 controls */
372*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, list_count_nodes(&dsp->ctl_list), 3);
373*9b33a4fcSRichard Fitzgerald
374*9b33a4fcSRichard Fitzgerald /*
375*9b33a4fcSRichard Fitzgerald * There's no requirement for the control list to be in any
376*9b33a4fcSRichard Fitzgerald * particular order, so don't assume the order.
377*9b33a4fcSRichard Fitzgerald */
378*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(ctl); i++)
379*9b33a4fcSRichard Fitzgerald ctl[i] = NULL;
380*9b33a4fcSRichard Fitzgerald
381*9b33a4fcSRichard Fitzgerald list_for_each_entry(walkctl, &dsp->ctl_list, list) {
382*9b33a4fcSRichard Fitzgerald if (strcmp(walkctl->fw_name, cs_dsp_ctl_cache_test_fw_names[0]) == 0)
383*9b33a4fcSRichard Fitzgerald ctl[0] = walkctl;
384*9b33a4fcSRichard Fitzgerald else if (strcmp(walkctl->fw_name, cs_dsp_ctl_cache_test_fw_names[1]) == 0)
385*9b33a4fcSRichard Fitzgerald ctl[1] = walkctl;
386*9b33a4fcSRichard Fitzgerald else if (strcmp(walkctl->fw_name, cs_dsp_ctl_cache_test_fw_names[2]) == 0)
387*9b33a4fcSRichard Fitzgerald ctl[2] = walkctl;
388*9b33a4fcSRichard Fitzgerald }
389*9b33a4fcSRichard Fitzgerald
390*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[0]);
391*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[1]);
392*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[2]);
393*9b33a4fcSRichard Fitzgerald
394*9b33a4fcSRichard Fitzgerald /*
395*9b33a4fcSRichard Fitzgerald * The data should have been populated into the control cache
396*9b33a4fcSRichard Fitzgerald * so should be readable through the control.
397*9b33a4fcSRichard Fitzgerald */
398*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
399*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[0], 0, readback, def.length_bytes),
400*9b33a4fcSRichard Fitzgerald 0);
401*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[0], def.length_bytes);
402*9b33a4fcSRichard Fitzgerald
403*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
404*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[1], 0, readback, def.length_bytes),
405*9b33a4fcSRichard Fitzgerald 0);
406*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[1], def.length_bytes);
407*9b33a4fcSRichard Fitzgerald
408*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
409*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[2], 0, readback, def.length_bytes),
410*9b33a4fcSRichard Fitzgerald 0);
411*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[2], def.length_bytes);
412*9b33a4fcSRichard Fitzgerald }
413*9b33a4fcSRichard Fitzgerald
414*9b33a4fcSRichard Fitzgerald /*
415*9b33a4fcSRichard Fitzgerald * Multiple different firmware with controls identical except for alg id.
416*9b33a4fcSRichard Fitzgerald * This is legal because the controls are qualified by algorithm id.
417*9b33a4fcSRichard Fitzgerald * The control cache should be initialized only with the data from
418*9b33a4fcSRichard Fitzgerald * the firmware containing it.
419*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_init_multiple_fwalgid_same_controls(struct kunit * test)420*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_init_multiple_fwalgid_same_controls(struct kunit *test)
421*9b33a4fcSRichard Fitzgerald {
422*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
423*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
424*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
425*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_wmfw_builder *builder[3];
426*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
427*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *walkctl, *ctl[3];
428*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
429*9b33a4fcSRichard Fitzgerald u32 *reg_vals[3], *readback;
430*9b33a4fcSRichard Fitzgerald int i;
431*9b33a4fcSRichard Fitzgerald
432*9b33a4fcSRichard Fitzgerald static_assert(ARRAY_SIZE(ctl) == ARRAY_SIZE(builder));
433*9b33a4fcSRichard Fitzgerald static_assert(ARRAY_SIZE(reg_vals) == ARRAY_SIZE(builder));
434*9b33a4fcSRichard Fitzgerald static_assert(ARRAY_SIZE(cs_dsp_ctl_cache_test_fw_names) >= ARRAY_SIZE(builder));
435*9b33a4fcSRichard Fitzgerald
436*9b33a4fcSRichard Fitzgerald /* Create an identical control in each firmware but with different alg id */
437*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(builder); i++) {
438*9b33a4fcSRichard Fitzgerald builder[i] = _create_dummy_wmfw(test);
439*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, builder[i]);
440*9b33a4fcSRichard Fitzgerald
441*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(builder[i],
442*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[i].id,
443*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
444*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(builder[i], &def);
445*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(builder[i]);
446*9b33a4fcSRichard Fitzgerald }
447*9b33a4fcSRichard Fitzgerald
448*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
449*9b33a4fcSRichard Fitzgerald reg_vals[i] = kunit_kmalloc(test, def.length_bytes, GFP_KERNEL);
450*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals[i]);
451*9b33a4fcSRichard Fitzgerald }
452*9b33a4fcSRichard Fitzgerald
453*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, def.length_bytes, GFP_KERNEL);
454*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
455*9b33a4fcSRichard Fitzgerald
456*9b33a4fcSRichard Fitzgerald /*
457*9b33a4fcSRichard Fitzgerald * For each firmware create random content in the register backing
458*9b33a4fcSRichard Fitzgerald * the control. Then download, start, stop and power-down.
459*9b33a4fcSRichard Fitzgerald */
460*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(builder); i++) {
461*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, i, def.mem_type);
462*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, def.mem_type);
463*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + def.offset_dsp_words) *
464*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
465*9b33a4fcSRichard Fitzgerald
466*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals[i], def.length_bytes);
467*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals[i], def.length_bytes);
468*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(builder[i]);
469*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test,
470*9b33a4fcSRichard Fitzgerald cs_dsp_power_up(dsp, wmfw,
471*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_fw_names[i],
472*9b33a4fcSRichard Fitzgerald NULL, NULL,
473*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_fw_names[i]),
474*9b33a4fcSRichard Fitzgerald 0);
475*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
476*9b33a4fcSRichard Fitzgerald cs_dsp_stop(dsp);
477*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
478*9b33a4fcSRichard Fitzgerald }
479*9b33a4fcSRichard Fitzgerald
480*9b33a4fcSRichard Fitzgerald /* There should now be 3 controls */
481*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, list_count_nodes(&dsp->ctl_list), 3);
482*9b33a4fcSRichard Fitzgerald
483*9b33a4fcSRichard Fitzgerald /*
484*9b33a4fcSRichard Fitzgerald * There's no requirement for the control list to be in any
485*9b33a4fcSRichard Fitzgerald * particular order, so don't assume the order.
486*9b33a4fcSRichard Fitzgerald */
487*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(ctl); i++)
488*9b33a4fcSRichard Fitzgerald ctl[i] = NULL;
489*9b33a4fcSRichard Fitzgerald
490*9b33a4fcSRichard Fitzgerald list_for_each_entry(walkctl, &dsp->ctl_list, list) {
491*9b33a4fcSRichard Fitzgerald if (cs_dsp_ctl_cache_test_algs[0].id == walkctl->alg_region.alg)
492*9b33a4fcSRichard Fitzgerald ctl[0] = walkctl;
493*9b33a4fcSRichard Fitzgerald else if (cs_dsp_ctl_cache_test_algs[1].id == walkctl->alg_region.alg)
494*9b33a4fcSRichard Fitzgerald ctl[1] = walkctl;
495*9b33a4fcSRichard Fitzgerald else if (cs_dsp_ctl_cache_test_algs[2].id == walkctl->alg_region.alg)
496*9b33a4fcSRichard Fitzgerald ctl[2] = walkctl;
497*9b33a4fcSRichard Fitzgerald }
498*9b33a4fcSRichard Fitzgerald
499*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[0]);
500*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[1]);
501*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[2]);
502*9b33a4fcSRichard Fitzgerald
503*9b33a4fcSRichard Fitzgerald /*
504*9b33a4fcSRichard Fitzgerald * The data should have been populated into the control cache
505*9b33a4fcSRichard Fitzgerald * so should be readable through the control.
506*9b33a4fcSRichard Fitzgerald */
507*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
508*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[0], 0, readback, def.length_bytes),
509*9b33a4fcSRichard Fitzgerald 0);
510*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[0], def.length_bytes);
511*9b33a4fcSRichard Fitzgerald
512*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
513*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[1], 0, readback, def.length_bytes),
514*9b33a4fcSRichard Fitzgerald 0);
515*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[1], def.length_bytes);
516*9b33a4fcSRichard Fitzgerald
517*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
518*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[2], 0, readback, def.length_bytes),
519*9b33a4fcSRichard Fitzgerald 0);
520*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[2], def.length_bytes);
521*9b33a4fcSRichard Fitzgerald }
522*9b33a4fcSRichard Fitzgerald
523*9b33a4fcSRichard Fitzgerald /*
524*9b33a4fcSRichard Fitzgerald * Firmware with controls at the same position in different memories.
525*9b33a4fcSRichard Fitzgerald * The control cache should be initialized with content from the
526*9b33a4fcSRichard Fitzgerald * correct memory region.
527*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_init_multiple_mems(struct kunit * test)528*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_init_multiple_mems(struct kunit *test)
529*9b33a4fcSRichard Fitzgerald {
530*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
531*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
532*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
533*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
534*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
535*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *walkctl, *ctl[3];
536*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
537*9b33a4fcSRichard Fitzgerald u32 *reg_vals[3], *readback;
538*9b33a4fcSRichard Fitzgerald int i;
539*9b33a4fcSRichard Fitzgerald
540*9b33a4fcSRichard Fitzgerald static_assert(ARRAY_SIZE(ctl) == ARRAY_SIZE(reg_vals));
541*9b33a4fcSRichard Fitzgerald
542*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
543*9b33a4fcSRichard Fitzgerald reg_vals[i] = kunit_kmalloc(test, def.length_bytes, GFP_KERNEL);
544*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals[i]);
545*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals[i], def.length_bytes);
546*9b33a4fcSRichard Fitzgerald }
547*9b33a4fcSRichard Fitzgerald
548*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, def.length_bytes, GFP_KERNEL);
549*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
550*9b33a4fcSRichard Fitzgerald
551*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
552*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[0].id,
553*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
554*9b33a4fcSRichard Fitzgerald
555*9b33a4fcSRichard Fitzgerald /* Create controls identical except for memory region */
556*9b33a4fcSRichard Fitzgerald def.mem_type = WMFW_ADSP2_YM;
557*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
558*9b33a4fcSRichard Fitzgerald
559*9b33a4fcSRichard Fitzgerald def.mem_type = WMFW_ADSP2_XM;
560*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
561*9b33a4fcSRichard Fitzgerald
562*9b33a4fcSRichard Fitzgerald if (cs_dsp_mock_has_zm(priv)) {
563*9b33a4fcSRichard Fitzgerald def.mem_type = WMFW_ADSP2_ZM;
564*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
565*9b33a4fcSRichard Fitzgerald }
566*9b33a4fcSRichard Fitzgerald
567*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
568*9b33a4fcSRichard Fitzgerald
569*9b33a4fcSRichard Fitzgerald /* Create random content in the registers backing each control */
570*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, 0, WMFW_ADSP2_YM);
571*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, WMFW_ADSP2_YM);
572*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + def.offset_dsp_words) *
573*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
574*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals[0], def.length_bytes);
575*9b33a4fcSRichard Fitzgerald
576*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, 0, WMFW_ADSP2_XM);
577*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, WMFW_ADSP2_XM);
578*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + def.offset_dsp_words) *
579*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
580*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals[1], def.length_bytes);
581*9b33a4fcSRichard Fitzgerald
582*9b33a4fcSRichard Fitzgerald if (cs_dsp_mock_has_zm(priv)) {
583*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, 0, WMFW_ADSP2_ZM);
584*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, WMFW_ADSP2_ZM);
585*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + def.offset_dsp_words) *
586*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
587*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals[2], def.length_bytes);
588*9b33a4fcSRichard Fitzgerald }
589*9b33a4fcSRichard Fitzgerald
590*9b33a4fcSRichard Fitzgerald /* Download, run, stop and power-down the firmware */
591*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(local->wmfw_builder);
592*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
593*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
594*9b33a4fcSRichard Fitzgerald cs_dsp_stop(dsp);
595*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
596*9b33a4fcSRichard Fitzgerald
597*9b33a4fcSRichard Fitzgerald /* There should now be 2 or 3 controls */
598*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, list_count_nodes(&dsp->ctl_list),
599*9b33a4fcSRichard Fitzgerald cs_dsp_mock_has_zm(priv) ? 3 : 2);
600*9b33a4fcSRichard Fitzgerald
601*9b33a4fcSRichard Fitzgerald /*
602*9b33a4fcSRichard Fitzgerald * There's no requirement for the control list to be in any
603*9b33a4fcSRichard Fitzgerald * particular order, so don't assume the order.
604*9b33a4fcSRichard Fitzgerald */
605*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(ctl); i++)
606*9b33a4fcSRichard Fitzgerald ctl[i] = NULL;
607*9b33a4fcSRichard Fitzgerald
608*9b33a4fcSRichard Fitzgerald list_for_each_entry(walkctl, &dsp->ctl_list, list) {
609*9b33a4fcSRichard Fitzgerald if (walkctl->alg_region.type == WMFW_ADSP2_YM)
610*9b33a4fcSRichard Fitzgerald ctl[0] = walkctl;
611*9b33a4fcSRichard Fitzgerald if (walkctl->alg_region.type == WMFW_ADSP2_XM)
612*9b33a4fcSRichard Fitzgerald ctl[1] = walkctl;
613*9b33a4fcSRichard Fitzgerald if (walkctl->alg_region.type == WMFW_ADSP2_ZM)
614*9b33a4fcSRichard Fitzgerald ctl[2] = walkctl;
615*9b33a4fcSRichard Fitzgerald }
616*9b33a4fcSRichard Fitzgerald
617*9b33a4fcSRichard Fitzgerald
618*9b33a4fcSRichard Fitzgerald /*
619*9b33a4fcSRichard Fitzgerald * The data should have been populated into the control cache
620*9b33a4fcSRichard Fitzgerald * so should be readable through the control.
621*9b33a4fcSRichard Fitzgerald */
622*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[0]);
623*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
624*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[0], 0, readback, def.length_bytes),
625*9b33a4fcSRichard Fitzgerald 0);
626*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[0], def.length_bytes);
627*9b33a4fcSRichard Fitzgerald
628*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[1]);
629*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
630*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[1], 0, readback, def.length_bytes),
631*9b33a4fcSRichard Fitzgerald 0);
632*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[1], def.length_bytes);
633*9b33a4fcSRichard Fitzgerald
634*9b33a4fcSRichard Fitzgerald if (cs_dsp_mock_has_zm(priv)) {
635*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[2]);
636*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
637*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[2], 0, readback,
638*9b33a4fcSRichard Fitzgerald def.length_bytes),
639*9b33a4fcSRichard Fitzgerald 0);
640*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[2], def.length_bytes);
641*9b33a4fcSRichard Fitzgerald }
642*9b33a4fcSRichard Fitzgerald }
643*9b33a4fcSRichard Fitzgerald
644*9b33a4fcSRichard Fitzgerald /*
645*9b33a4fcSRichard Fitzgerald * Firmware with controls at the same position in different algorithms
646*9b33a4fcSRichard Fitzgerald * The control cache should be initialized with content from the
647*9b33a4fcSRichard Fitzgerald * memory of the algorithm it points to.
648*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_init_multiple_algs(struct kunit * test)649*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_init_multiple_algs(struct kunit *test)
650*9b33a4fcSRichard Fitzgerald {
651*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
652*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
653*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
654*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
655*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
656*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *walkctl, *ctl[3];
657*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
658*9b33a4fcSRichard Fitzgerald u32 *reg_vals[3], *readback;
659*9b33a4fcSRichard Fitzgerald int i;
660*9b33a4fcSRichard Fitzgerald
661*9b33a4fcSRichard Fitzgerald static_assert(ARRAY_SIZE(ctl) == ARRAY_SIZE(reg_vals));
662*9b33a4fcSRichard Fitzgerald static_assert(ARRAY_SIZE(reg_vals) <= ARRAY_SIZE(cs_dsp_ctl_cache_test_algs));
663*9b33a4fcSRichard Fitzgerald
664*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
665*9b33a4fcSRichard Fitzgerald reg_vals[i] = kunit_kmalloc(test, def.length_bytes, GFP_KERNEL);
666*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals[i]);
667*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals[i], def.length_bytes);
668*9b33a4fcSRichard Fitzgerald }
669*9b33a4fcSRichard Fitzgerald
670*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, def.length_bytes, GFP_KERNEL);
671*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
672*9b33a4fcSRichard Fitzgerald
673*9b33a4fcSRichard Fitzgerald /* Create controls identical except for algorithm */
674*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
675*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
676*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[i].id,
677*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
678*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
679*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
680*9b33a4fcSRichard Fitzgerald }
681*9b33a4fcSRichard Fitzgerald
682*9b33a4fcSRichard Fitzgerald /* Create random content in the registers backing each control */
683*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
684*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, i, def.mem_type);
685*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, def.mem_type);
686*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + def.offset_dsp_words) *
687*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
688*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals[i], def.length_bytes);
689*9b33a4fcSRichard Fitzgerald }
690*9b33a4fcSRichard Fitzgerald
691*9b33a4fcSRichard Fitzgerald /* Download, run, stop and power-down the firmware */
692*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(local->wmfw_builder);
693*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
694*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
695*9b33a4fcSRichard Fitzgerald cs_dsp_stop(dsp);
696*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
697*9b33a4fcSRichard Fitzgerald
698*9b33a4fcSRichard Fitzgerald /* There should now be 3 controls */
699*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, list_count_nodes(&dsp->ctl_list), 3);
700*9b33a4fcSRichard Fitzgerald
701*9b33a4fcSRichard Fitzgerald /*
702*9b33a4fcSRichard Fitzgerald * There's no requirement for the control list to be in any
703*9b33a4fcSRichard Fitzgerald * particular order, so don't assume the order.
704*9b33a4fcSRichard Fitzgerald */
705*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(ctl); i++)
706*9b33a4fcSRichard Fitzgerald ctl[i] = NULL;
707*9b33a4fcSRichard Fitzgerald
708*9b33a4fcSRichard Fitzgerald list_for_each_entry(walkctl, &dsp->ctl_list, list) {
709*9b33a4fcSRichard Fitzgerald if (walkctl->alg_region.alg == cs_dsp_ctl_cache_test_algs[0].id)
710*9b33a4fcSRichard Fitzgerald ctl[0] = walkctl;
711*9b33a4fcSRichard Fitzgerald if (walkctl->alg_region.alg == cs_dsp_ctl_cache_test_algs[1].id)
712*9b33a4fcSRichard Fitzgerald ctl[1] = walkctl;
713*9b33a4fcSRichard Fitzgerald if (walkctl->alg_region.alg == cs_dsp_ctl_cache_test_algs[2].id)
714*9b33a4fcSRichard Fitzgerald ctl[2] = walkctl;
715*9b33a4fcSRichard Fitzgerald }
716*9b33a4fcSRichard Fitzgerald
717*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[0]);
718*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[1]);
719*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[2]);
720*9b33a4fcSRichard Fitzgerald
721*9b33a4fcSRichard Fitzgerald /*
722*9b33a4fcSRichard Fitzgerald * The data should have been populated into the control cache
723*9b33a4fcSRichard Fitzgerald * so should be readable through the control.
724*9b33a4fcSRichard Fitzgerald */
725*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
726*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[0], 0, readback, def.length_bytes),
727*9b33a4fcSRichard Fitzgerald 0);
728*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[0], def.length_bytes);
729*9b33a4fcSRichard Fitzgerald
730*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
731*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[1], 0, readback, def.length_bytes),
732*9b33a4fcSRichard Fitzgerald 0);
733*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[1], def.length_bytes);
734*9b33a4fcSRichard Fitzgerald
735*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
736*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[2], 0, readback,
737*9b33a4fcSRichard Fitzgerald def.length_bytes),
738*9b33a4fcSRichard Fitzgerald 0);
739*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[2], def.length_bytes);
740*9b33a4fcSRichard Fitzgerald }
741*9b33a4fcSRichard Fitzgerald
742*9b33a4fcSRichard Fitzgerald /*
743*9b33a4fcSRichard Fitzgerald * Firmware with controls in the same algorithm and memory but at
744*9b33a4fcSRichard Fitzgerald * different offsets.
745*9b33a4fcSRichard Fitzgerald * The control cache should be initialized with content from the
746*9b33a4fcSRichard Fitzgerald * correct offset.
747*9b33a4fcSRichard Fitzgerald * Only for wmfw format V2 and later. V1 only supports one control per
748*9b33a4fcSRichard Fitzgerald * memory per algorithm.
749*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_init_multiple_offsets(struct kunit * test)750*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_init_multiple_offsets(struct kunit *test)
751*9b33a4fcSRichard Fitzgerald {
752*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
753*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
754*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
755*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
756*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words, alg_base_reg;
757*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *walkctl, *ctl[3];
758*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
759*9b33a4fcSRichard Fitzgerald u32 *reg_vals[3], *readback;
760*9b33a4fcSRichard Fitzgerald int i;
761*9b33a4fcSRichard Fitzgerald
762*9b33a4fcSRichard Fitzgerald static_assert(ARRAY_SIZE(ctl) == ARRAY_SIZE(reg_vals));
763*9b33a4fcSRichard Fitzgerald static_assert(ARRAY_SIZE(reg_vals) <= ARRAY_SIZE(cs_dsp_ctl_cache_test_algs));
764*9b33a4fcSRichard Fitzgerald
765*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
766*9b33a4fcSRichard Fitzgerald reg_vals[i] = kunit_kmalloc(test, def.length_bytes, GFP_KERNEL);
767*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals[i]);
768*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals[i], def.length_bytes);
769*9b33a4fcSRichard Fitzgerald }
770*9b33a4fcSRichard Fitzgerald
771*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, def.length_bytes, GFP_KERNEL);
772*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
773*9b33a4fcSRichard Fitzgerald
774*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
775*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[0].id,
776*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
777*9b33a4fcSRichard Fitzgerald
778*9b33a4fcSRichard Fitzgerald /* Create controls identical except for offset */
779*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = 0;
780*9b33a4fcSRichard Fitzgerald def.shortname = "CtlA";
781*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
782*9b33a4fcSRichard Fitzgerald
783*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = 5;
784*9b33a4fcSRichard Fitzgerald def.shortname = "CtlB";
785*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
786*9b33a4fcSRichard Fitzgerald
787*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = 8;
788*9b33a4fcSRichard Fitzgerald def.shortname = "CtlC";
789*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
790*9b33a4fcSRichard Fitzgerald
791*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
792*9b33a4fcSRichard Fitzgerald
793*9b33a4fcSRichard Fitzgerald /* Create random content in the registers backing each control */
794*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, 0, def.mem_type);
795*9b33a4fcSRichard Fitzgerald alg_base_reg = cs_dsp_mock_base_addr_for_mem(priv, def.mem_type);
796*9b33a4fcSRichard Fitzgerald alg_base_reg += alg_base_words * cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
797*9b33a4fcSRichard Fitzgerald
798*9b33a4fcSRichard Fitzgerald reg = alg_base_reg;
799*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals[0], def.length_bytes);
800*9b33a4fcSRichard Fitzgerald reg = alg_base_reg + (5 * cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv));
801*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals[1], def.length_bytes);
802*9b33a4fcSRichard Fitzgerald reg = alg_base_reg + (8 * cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv));
803*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals[2], def.length_bytes);
804*9b33a4fcSRichard Fitzgerald
805*9b33a4fcSRichard Fitzgerald /* Download, run, stop and power-down the firmware */
806*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(local->wmfw_builder);
807*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
808*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
809*9b33a4fcSRichard Fitzgerald cs_dsp_stop(dsp);
810*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
811*9b33a4fcSRichard Fitzgerald
812*9b33a4fcSRichard Fitzgerald /* There should now be 3 controls */
813*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, list_count_nodes(&dsp->ctl_list), 3);
814*9b33a4fcSRichard Fitzgerald
815*9b33a4fcSRichard Fitzgerald /*
816*9b33a4fcSRichard Fitzgerald * There's no requirement for the control list to be in any
817*9b33a4fcSRichard Fitzgerald * particular order, so don't assume the order.
818*9b33a4fcSRichard Fitzgerald */
819*9b33a4fcSRichard Fitzgerald for (i = 0; i < ARRAY_SIZE(ctl); i++)
820*9b33a4fcSRichard Fitzgerald ctl[i] = NULL;
821*9b33a4fcSRichard Fitzgerald
822*9b33a4fcSRichard Fitzgerald list_for_each_entry(walkctl, &dsp->ctl_list, list) {
823*9b33a4fcSRichard Fitzgerald if (walkctl->offset == 0)
824*9b33a4fcSRichard Fitzgerald ctl[0] = walkctl;
825*9b33a4fcSRichard Fitzgerald if (walkctl->offset == 5)
826*9b33a4fcSRichard Fitzgerald ctl[1] = walkctl;
827*9b33a4fcSRichard Fitzgerald if (walkctl->offset == 8)
828*9b33a4fcSRichard Fitzgerald ctl[2] = walkctl;
829*9b33a4fcSRichard Fitzgerald }
830*9b33a4fcSRichard Fitzgerald
831*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[0]);
832*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[1]);
833*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl[2]);
834*9b33a4fcSRichard Fitzgerald
835*9b33a4fcSRichard Fitzgerald /*
836*9b33a4fcSRichard Fitzgerald * The data should have been populated into the control cache
837*9b33a4fcSRichard Fitzgerald * so should be readable through the control.
838*9b33a4fcSRichard Fitzgerald */
839*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
840*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[0], 0, readback, def.length_bytes),
841*9b33a4fcSRichard Fitzgerald 0);
842*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[0], def.length_bytes);
843*9b33a4fcSRichard Fitzgerald
844*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
845*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[1], 0, readback, def.length_bytes),
846*9b33a4fcSRichard Fitzgerald 0);
847*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[1], def.length_bytes);
848*9b33a4fcSRichard Fitzgerald
849*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
850*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl[2], 0, readback,
851*9b33a4fcSRichard Fitzgerald def.length_bytes),
852*9b33a4fcSRichard Fitzgerald 0);
853*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals[2], def.length_bytes);
854*9b33a4fcSRichard Fitzgerald }
855*9b33a4fcSRichard Fitzgerald
856*9b33a4fcSRichard Fitzgerald /*
857*9b33a4fcSRichard Fitzgerald * Read from a cached control before the firmware is started.
858*9b33a4fcSRichard Fitzgerald * Should return the data in the cache.
859*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_read_not_started(struct kunit * test)860*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_read_not_started(struct kunit *test)
861*9b33a4fcSRichard Fitzgerald {
862*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
863*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
864*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
865*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
866*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
867*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
868*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
869*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
870*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
871*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
872*9b33a4fcSRichard Fitzgerald
873*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
874*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
875*9b33a4fcSRichard Fitzgerald
876*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
877*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
878*9b33a4fcSRichard Fitzgerald
879*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
880*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
881*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
882*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
883*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
884*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
885*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
886*9b33a4fcSRichard Fitzgerald
887*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
888*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
889*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
890*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
891*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
892*9b33a4fcSRichard Fitzgerald
893*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
894*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
895*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
896*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
897*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
898*9b33a4fcSRichard Fitzgerald
899*9b33a4fcSRichard Fitzgerald /* Power-up DSP but don't start firmware */
900*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
901*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
902*9b33a4fcSRichard Fitzgerald
903*9b33a4fcSRichard Fitzgerald /* Drop expected writes and the regmap cache should be clean */
904*9b33a4fcSRichard Fitzgerald cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
905*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
906*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
907*9b33a4fcSRichard Fitzgerald
908*9b33a4fcSRichard Fitzgerald /* Control should readback the data from the control cache */
909*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
910*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
911*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
912*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
913*9b33a4fcSRichard Fitzgerald 0);
914*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
915*9b33a4fcSRichard Fitzgerald }
916*9b33a4fcSRichard Fitzgerald
917*9b33a4fcSRichard Fitzgerald /*
918*9b33a4fcSRichard Fitzgerald * Read from a cached control after the firmware has been stopped.
919*9b33a4fcSRichard Fitzgerald * Should return the data in the cache.
920*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_read_stopped(struct kunit * test)921*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_read_stopped(struct kunit *test)
922*9b33a4fcSRichard Fitzgerald {
923*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
924*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
925*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
926*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
927*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
928*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
929*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
930*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
931*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
932*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
933*9b33a4fcSRichard Fitzgerald
934*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
935*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
936*9b33a4fcSRichard Fitzgerald
937*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
938*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
939*9b33a4fcSRichard Fitzgerald
940*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
941*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
942*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
943*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
944*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
945*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
946*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
947*9b33a4fcSRichard Fitzgerald
948*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
949*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
950*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
951*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
952*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
953*9b33a4fcSRichard Fitzgerald
954*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
955*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
956*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
957*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
958*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
959*9b33a4fcSRichard Fitzgerald
960*9b33a4fcSRichard Fitzgerald /* Power-up DSP */
961*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
962*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
963*9b33a4fcSRichard Fitzgerald
964*9b33a4fcSRichard Fitzgerald /* Start and stop the firmware */
965*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
966*9b33a4fcSRichard Fitzgerald cs_dsp_stop(dsp);
967*9b33a4fcSRichard Fitzgerald
968*9b33a4fcSRichard Fitzgerald /* Drop expected writes and the regmap cache should be clean */
969*9b33a4fcSRichard Fitzgerald cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
970*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
971*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
972*9b33a4fcSRichard Fitzgerald
973*9b33a4fcSRichard Fitzgerald /* Control should readback the data from the control cache */
974*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
975*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
976*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
977*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
978*9b33a4fcSRichard Fitzgerald 0);
979*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
980*9b33a4fcSRichard Fitzgerald }
981*9b33a4fcSRichard Fitzgerald
982*9b33a4fcSRichard Fitzgerald /*
983*9b33a4fcSRichard Fitzgerald * Read from a cached control after the DSP has been powered-up and
984*9b33a4fcSRichard Fitzgerald * then powered-down without running.
985*9b33a4fcSRichard Fitzgerald * Should return the data in the cache.
986*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_read_powered_down(struct kunit * test)987*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_read_powered_down(struct kunit *test)
988*9b33a4fcSRichard Fitzgerald {
989*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
990*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
991*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
992*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
993*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
994*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
995*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
996*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
997*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
998*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
999*9b33a4fcSRichard Fitzgerald
1000*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
1001*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
1002*9b33a4fcSRichard Fitzgerald
1003*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1004*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1005*9b33a4fcSRichard Fitzgerald
1006*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
1007*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1008*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1009*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1010*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1011*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
1012*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
1013*9b33a4fcSRichard Fitzgerald
1014*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1015*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1016*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1017*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1018*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1019*9b33a4fcSRichard Fitzgerald
1020*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1021*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1022*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1023*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1024*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1025*9b33a4fcSRichard Fitzgerald
1026*9b33a4fcSRichard Fitzgerald /* Power-up DSP then power-down */
1027*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1028*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1029*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
1030*9b33a4fcSRichard Fitzgerald
1031*9b33a4fcSRichard Fitzgerald /* Drop expected writes and the regmap cache should be clean */
1032*9b33a4fcSRichard Fitzgerald cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
1033*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
1034*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1035*9b33a4fcSRichard Fitzgerald
1036*9b33a4fcSRichard Fitzgerald /* Control should readback the data from the control cache */
1037*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1038*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1039*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1040*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
1041*9b33a4fcSRichard Fitzgerald 0);
1042*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
1043*9b33a4fcSRichard Fitzgerald }
1044*9b33a4fcSRichard Fitzgerald
1045*9b33a4fcSRichard Fitzgerald /*
1046*9b33a4fcSRichard Fitzgerald * Read from a cached control after the firmware has been run and
1047*9b33a4fcSRichard Fitzgerald * stopped, then the DSP has been powered-down.
1048*9b33a4fcSRichard Fitzgerald * Should return the data in the cache.
1049*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_read_stopped_powered_down(struct kunit * test)1050*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_read_stopped_powered_down(struct kunit *test)
1051*9b33a4fcSRichard Fitzgerald {
1052*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1053*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1054*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1055*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1056*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1057*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1058*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1059*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1060*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1061*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
1062*9b33a4fcSRichard Fitzgerald
1063*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
1064*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
1065*9b33a4fcSRichard Fitzgerald
1066*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1067*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1068*9b33a4fcSRichard Fitzgerald
1069*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
1070*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1071*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1072*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1073*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1074*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
1075*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
1076*9b33a4fcSRichard Fitzgerald
1077*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1078*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1079*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1080*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1081*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1082*9b33a4fcSRichard Fitzgerald
1083*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1084*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1085*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1086*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1087*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1088*9b33a4fcSRichard Fitzgerald
1089*9b33a4fcSRichard Fitzgerald /* Power-up DSP */
1090*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1091*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1092*9b33a4fcSRichard Fitzgerald
1093*9b33a4fcSRichard Fitzgerald /* Start and stop the firmware then power-down */
1094*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
1095*9b33a4fcSRichard Fitzgerald cs_dsp_stop(dsp);
1096*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
1097*9b33a4fcSRichard Fitzgerald
1098*9b33a4fcSRichard Fitzgerald /* Drop expected writes and the regmap cache should be clean */
1099*9b33a4fcSRichard Fitzgerald cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
1100*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
1101*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1102*9b33a4fcSRichard Fitzgerald
1103*9b33a4fcSRichard Fitzgerald /* Control should readback the data from the control cache */
1104*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1105*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1106*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1107*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
1108*9b33a4fcSRichard Fitzgerald 0);
1109*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
1110*9b33a4fcSRichard Fitzgerald }
1111*9b33a4fcSRichard Fitzgerald
1112*9b33a4fcSRichard Fitzgerald /*
1113*9b33a4fcSRichard Fitzgerald * Read from a cached control when a different firmware is currently
1114*9b33a4fcSRichard Fitzgerald * loaded into the DSP.
1115*9b33a4fcSRichard Fitzgerald * Should return the data in the cache.
1116*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_read_not_current_loaded_fw(struct kunit * test)1117*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_read_not_current_loaded_fw(struct kunit *test)
1118*9b33a4fcSRichard Fitzgerald {
1119*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1120*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1121*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1122*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1123*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1124*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_wmfw_builder *builder2 = _create_dummy_wmfw(test);
1125*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1126*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1127*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1128*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1129*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
1130*9b33a4fcSRichard Fitzgerald
1131*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
1132*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
1133*9b33a4fcSRichard Fitzgerald
1134*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1135*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1136*9b33a4fcSRichard Fitzgerald
1137*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
1138*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1139*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1140*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1141*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1142*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
1143*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
1144*9b33a4fcSRichard Fitzgerald
1145*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1146*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1147*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1148*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1149*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1150*9b33a4fcSRichard Fitzgerald
1151*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1152*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1153*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1154*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1155*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1156*9b33a4fcSRichard Fitzgerald
1157*9b33a4fcSRichard Fitzgerald /* Power-up DSP */
1158*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1159*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1160*9b33a4fcSRichard Fitzgerald
1161*9b33a4fcSRichard Fitzgerald /* Power-down DSP then power-up with a different firmware */
1162*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
1163*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(builder2);
1164*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw2", NULL, NULL, "mbc.vss"), 0);
1165*9b33a4fcSRichard Fitzgerald
1166*9b33a4fcSRichard Fitzgerald /* Drop expected writes and the regmap cache should be clean */
1167*9b33a4fcSRichard Fitzgerald cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
1168*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
1169*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1170*9b33a4fcSRichard Fitzgerald
1171*9b33a4fcSRichard Fitzgerald /* Control should readback the data from the control cache */
1172*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1173*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1174*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1175*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
1176*9b33a4fcSRichard Fitzgerald 0);
1177*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
1178*9b33a4fcSRichard Fitzgerald }
1179*9b33a4fcSRichard Fitzgerald
1180*9b33a4fcSRichard Fitzgerald /*
1181*9b33a4fcSRichard Fitzgerald * Read from a cached control when a different firmware is currently
1182*9b33a4fcSRichard Fitzgerald * running.
1183*9b33a4fcSRichard Fitzgerald * Should return the data in the cache.
1184*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_read_not_current_running_fw(struct kunit * test)1185*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_read_not_current_running_fw(struct kunit *test)
1186*9b33a4fcSRichard Fitzgerald {
1187*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1188*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1189*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1190*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1191*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1192*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_wmfw_builder *builder2 = _create_dummy_wmfw(test);
1193*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1194*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1195*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1196*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1197*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
1198*9b33a4fcSRichard Fitzgerald
1199*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
1200*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
1201*9b33a4fcSRichard Fitzgerald
1202*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1203*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1204*9b33a4fcSRichard Fitzgerald
1205*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
1206*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1207*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1208*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1209*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1210*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
1211*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
1212*9b33a4fcSRichard Fitzgerald
1213*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1214*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1215*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1216*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1217*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1218*9b33a4fcSRichard Fitzgerald
1219*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1220*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1221*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1222*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1223*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1224*9b33a4fcSRichard Fitzgerald
1225*9b33a4fcSRichard Fitzgerald /* Power-up DSP then power-down */
1226*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1227*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1228*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
1229*9b33a4fcSRichard Fitzgerald
1230*9b33a4fcSRichard Fitzgerald /* Power-up with a different firmware and run it */
1231*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(builder2);
1232*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw2", NULL, NULL, "mbc.vss"), 0);
1233*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
1234*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
1235*9b33a4fcSRichard Fitzgerald
1236*9b33a4fcSRichard Fitzgerald /* Drop expected writes and the regmap cache should be clean */
1237*9b33a4fcSRichard Fitzgerald cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
1238*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
1239*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1240*9b33a4fcSRichard Fitzgerald
1241*9b33a4fcSRichard Fitzgerald /* Control should readback the data from the control cache */
1242*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1243*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1244*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1245*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
1246*9b33a4fcSRichard Fitzgerald 0);
1247*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
1248*9b33a4fcSRichard Fitzgerald }
1249*9b33a4fcSRichard Fitzgerald
1250*9b33a4fcSRichard Fitzgerald /*
1251*9b33a4fcSRichard Fitzgerald * Read from a cached control with non-zero flags while the firmware is
1252*9b33a4fcSRichard Fitzgerald * running.
1253*9b33a4fcSRichard Fitzgerald * Should return the data in the cache, not from the registers.
1254*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_read_running(struct kunit * test)1255*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_read_running(struct kunit *test)
1256*9b33a4fcSRichard Fitzgerald {
1257*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1258*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1259*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1260*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1261*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1262*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1263*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1264*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1265*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1266*9b33a4fcSRichard Fitzgerald u32 *init_reg_vals, *new_reg_vals, *readback;
1267*9b33a4fcSRichard Fitzgerald
1268*9b33a4fcSRichard Fitzgerald init_reg_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
1269*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, init_reg_vals);
1270*9b33a4fcSRichard Fitzgerald
1271*9b33a4fcSRichard Fitzgerald new_reg_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1272*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, new_reg_vals);
1273*9b33a4fcSRichard Fitzgerald
1274*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1275*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1276*9b33a4fcSRichard Fitzgerald
1277*9b33a4fcSRichard Fitzgerald /* Create data in the registers backing the control */
1278*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1279*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1280*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1281*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1282*9b33a4fcSRichard Fitzgerald get_random_bytes(init_reg_vals, param->len_bytes);
1283*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, init_reg_vals, param->len_bytes);
1284*9b33a4fcSRichard Fitzgerald
1285*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1286*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1287*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1288*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1289*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1290*9b33a4fcSRichard Fitzgerald
1291*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1292*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1293*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1294*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1295*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1296*9b33a4fcSRichard Fitzgerald
1297*9b33a4fcSRichard Fitzgerald /* Power-up DSP */
1298*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1299*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1300*9b33a4fcSRichard Fitzgerald
1301*9b33a4fcSRichard Fitzgerald /* Start the firmware running */
1302*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
1303*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
1304*9b33a4fcSRichard Fitzgerald
1305*9b33a4fcSRichard Fitzgerald /*
1306*9b33a4fcSRichard Fitzgerald * Change the values in the registers backing the control then drop
1307*9b33a4fcSRichard Fitzgerald * them from the regmap cache. This allows checking that the control
1308*9b33a4fcSRichard Fitzgerald * read is returning values from the control cache and not accessing
1309*9b33a4fcSRichard Fitzgerald * the registers.
1310*9b33a4fcSRichard Fitzgerald */
1311*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test,
1312*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, new_reg_vals, param->len_bytes),
1313*9b33a4fcSRichard Fitzgerald 0);
1314*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
1315*9b33a4fcSRichard Fitzgerald
1316*9b33a4fcSRichard Fitzgerald /* Control should readback the origin data from its cache */
1317*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1318*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1319*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1320*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
1321*9b33a4fcSRichard Fitzgerald 0);
1322*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, init_reg_vals, param->len_bytes);
1323*9b33a4fcSRichard Fitzgerald
1324*9b33a4fcSRichard Fitzgerald /* Stop and power-down the DSP */
1325*9b33a4fcSRichard Fitzgerald kunit_release_action(test, _cs_dsp_stop_wrapper, dsp);
1326*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
1327*9b33a4fcSRichard Fitzgerald
1328*9b33a4fcSRichard Fitzgerald /* Control should readback from the cache */
1329*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1330*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
1331*9b33a4fcSRichard Fitzgerald 0);
1332*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, init_reg_vals, param->len_bytes);
1333*9b33a4fcSRichard Fitzgerald }
1334*9b33a4fcSRichard Fitzgerald
1335*9b33a4fcSRichard Fitzgerald /*
1336*9b33a4fcSRichard Fitzgerald * Read from a cached control with flags == 0 while the firmware is
1337*9b33a4fcSRichard Fitzgerald * running.
1338*9b33a4fcSRichard Fitzgerald * Should behave as volatile and read from the registers.
1339*9b33a4fcSRichard Fitzgerald * (This is for backwards compatibility with old firmware versions)
1340*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_read_running_zero_flags(struct kunit * test)1341*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_read_running_zero_flags(struct kunit *test)
1342*9b33a4fcSRichard Fitzgerald {
1343*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1344*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1345*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1346*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1347*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1348*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1349*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1350*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1351*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1352*9b33a4fcSRichard Fitzgerald u32 *init_reg_vals, *new_reg_vals, *readback;
1353*9b33a4fcSRichard Fitzgerald
1354*9b33a4fcSRichard Fitzgerald init_reg_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1355*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, init_reg_vals);
1356*9b33a4fcSRichard Fitzgerald
1357*9b33a4fcSRichard Fitzgerald new_reg_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
1358*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, new_reg_vals);
1359*9b33a4fcSRichard Fitzgerald
1360*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1361*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1362*9b33a4fcSRichard Fitzgerald
1363*9b33a4fcSRichard Fitzgerald /* Zero-fill the registers backing the control */
1364*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1365*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1366*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1367*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1368*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, init_reg_vals, param->len_bytes);
1369*9b33a4fcSRichard Fitzgerald
1370*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1371*9b33a4fcSRichard Fitzgerald def.flags = 0;
1372*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1373*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1374*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1375*9b33a4fcSRichard Fitzgerald
1376*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1377*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1378*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1379*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1380*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1381*9b33a4fcSRichard Fitzgerald
1382*9b33a4fcSRichard Fitzgerald /* Power-up DSP */
1383*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1384*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1385*9b33a4fcSRichard Fitzgerald
1386*9b33a4fcSRichard Fitzgerald /* Start the firmware running */
1387*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
1388*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
1389*9b33a4fcSRichard Fitzgerald
1390*9b33a4fcSRichard Fitzgerald /* Change the values in the registers backing the control */
1391*9b33a4fcSRichard Fitzgerald get_random_bytes(new_reg_vals, param->len_bytes);
1392*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, new_reg_vals, param->len_bytes);
1393*9b33a4fcSRichard Fitzgerald
1394*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the registers */
1395*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1396*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1397*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1398*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
1399*9b33a4fcSRichard Fitzgerald 0);
1400*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, new_reg_vals, param->len_bytes);
1401*9b33a4fcSRichard Fitzgerald
1402*9b33a4fcSRichard Fitzgerald /* Stop and power-down the DSP */
1403*9b33a4fcSRichard Fitzgerald kunit_release_action(test, _cs_dsp_stop_wrapper, dsp);
1404*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
1405*9b33a4fcSRichard Fitzgerald
1406*9b33a4fcSRichard Fitzgerald /* Change the values in the registers backing the control */
1407*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, init_reg_vals, param->len_bytes);
1408*9b33a4fcSRichard Fitzgerald
1409*9b33a4fcSRichard Fitzgerald /* Control should readback from the cache */
1410*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1411*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
1412*9b33a4fcSRichard Fitzgerald 0);
1413*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, new_reg_vals, param->len_bytes);
1414*9b33a4fcSRichard Fitzgerald }
1415*9b33a4fcSRichard Fitzgerald
1416*9b33a4fcSRichard Fitzgerald /*
1417*9b33a4fcSRichard Fitzgerald * Write to a cached control while the firmware is running.
1418*9b33a4fcSRichard Fitzgerald * This should be a writethrough operation, writing to the cache and
1419*9b33a4fcSRichard Fitzgerald * the registers.
1420*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_writethrough(struct kunit * test)1421*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_writethrough(struct kunit *test)
1422*9b33a4fcSRichard Fitzgerald {
1423*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1424*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1425*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1426*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1427*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1428*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1429*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1430*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1431*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1432*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
1433*9b33a4fcSRichard Fitzgerald
1434*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
1435*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
1436*9b33a4fcSRichard Fitzgerald
1437*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1438*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1439*9b33a4fcSRichard Fitzgerald
1440*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
1441*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1442*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1443*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1444*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1445*9b33a4fcSRichard Fitzgerald memset(reg_vals, 0, param->len_bytes);
1446*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
1447*9b33a4fcSRichard Fitzgerald
1448*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1449*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1450*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1451*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1452*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1453*9b33a4fcSRichard Fitzgerald
1454*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1455*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1456*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1457*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1458*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1459*9b33a4fcSRichard Fitzgerald
1460*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1461*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1462*9b33a4fcSRichard Fitzgerald
1463*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1464*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1465*9b33a4fcSRichard Fitzgerald
1466*9b33a4fcSRichard Fitzgerald /* Start the firmware and add an action to stop it during cleanup */
1467*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
1468*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
1469*9b33a4fcSRichard Fitzgerald
1470*9b33a4fcSRichard Fitzgerald /* Write new data to the control, it should be written to the registers */
1471*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
1472*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1473*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes),
1474*9b33a4fcSRichard Fitzgerald 1);
1475*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
1476*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
1477*9b33a4fcSRichard Fitzgerald }
1478*9b33a4fcSRichard Fitzgerald
1479*9b33a4fcSRichard Fitzgerald /*
1480*9b33a4fcSRichard Fitzgerald * Write unchanged data to a cached control while the firmware is running.
1481*9b33a4fcSRichard Fitzgerald * The control write should return 0 to indicate that the content
1482*9b33a4fcSRichard Fitzgerald * didn't change.
1483*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_writethrough_unchanged(struct kunit * test)1484*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_writethrough_unchanged(struct kunit *test)
1485*9b33a4fcSRichard Fitzgerald {
1486*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1487*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1488*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1489*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1490*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1491*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1492*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1493*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1494*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1495*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
1496*9b33a4fcSRichard Fitzgerald
1497*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
1498*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
1499*9b33a4fcSRichard Fitzgerald
1500*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1501*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1502*9b33a4fcSRichard Fitzgerald
1503*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
1504*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1505*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1506*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1507*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1508*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
1509*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
1510*9b33a4fcSRichard Fitzgerald
1511*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1512*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1513*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1514*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1515*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1516*9b33a4fcSRichard Fitzgerald
1517*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1518*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1519*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1520*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1521*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1522*9b33a4fcSRichard Fitzgerald
1523*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1524*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1525*9b33a4fcSRichard Fitzgerald
1526*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1527*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1528*9b33a4fcSRichard Fitzgerald
1529*9b33a4fcSRichard Fitzgerald /* Start the firmware and add an action to stop it during cleanup */
1530*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
1531*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
1532*9b33a4fcSRichard Fitzgerald
1533*9b33a4fcSRichard Fitzgerald /*
1534*9b33a4fcSRichard Fitzgerald * If the control is write-only the cache will have been zero-initialized
1535*9b33a4fcSRichard Fitzgerald * so the first write will always indicate a change.
1536*9b33a4fcSRichard Fitzgerald */
1537*9b33a4fcSRichard Fitzgerald if (def.flags && !(def.flags & WMFW_CTL_FLAG_READABLE)) {
1538*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1539*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals,
1540*9b33a4fcSRichard Fitzgerald param->len_bytes),
1541*9b33a4fcSRichard Fitzgerald 1);
1542*9b33a4fcSRichard Fitzgerald }
1543*9b33a4fcSRichard Fitzgerald
1544*9b33a4fcSRichard Fitzgerald /*
1545*9b33a4fcSRichard Fitzgerald * Write the same data to the control, cs_dsp_coeff_lock_and_write_ctrl()
1546*9b33a4fcSRichard Fitzgerald * should return 0 to indicate the content didn't change.
1547*9b33a4fcSRichard Fitzgerald */
1548*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1549*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes),
1550*9b33a4fcSRichard Fitzgerald 0);
1551*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
1552*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
1553*9b33a4fcSRichard Fitzgerald }
1554*9b33a4fcSRichard Fitzgerald
1555*9b33a4fcSRichard Fitzgerald /*
1556*9b33a4fcSRichard Fitzgerald * Write unchanged data to a cached control while the firmware is not started.
1557*9b33a4fcSRichard Fitzgerald * The control write should return 0 to indicate that the cache content
1558*9b33a4fcSRichard Fitzgerald * didn't change.
1559*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_write_unchanged_not_started(struct kunit * test)1560*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_write_unchanged_not_started(struct kunit *test)
1561*9b33a4fcSRichard Fitzgerald {
1562*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1563*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1564*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1565*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1566*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1567*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1568*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1569*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1570*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1571*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
1572*9b33a4fcSRichard Fitzgerald
1573*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
1574*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
1575*9b33a4fcSRichard Fitzgerald
1576*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1577*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1578*9b33a4fcSRichard Fitzgerald
1579*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
1580*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1581*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1582*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1583*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1584*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
1585*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
1586*9b33a4fcSRichard Fitzgerald
1587*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1588*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1589*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1590*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1591*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1592*9b33a4fcSRichard Fitzgerald
1593*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1594*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1595*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1596*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1597*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1598*9b33a4fcSRichard Fitzgerald
1599*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1600*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1601*9b33a4fcSRichard Fitzgerald
1602*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1603*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1604*9b33a4fcSRichard Fitzgerald
1605*9b33a4fcSRichard Fitzgerald /*
1606*9b33a4fcSRichard Fitzgerald * If the control is write-only the cache will have been zero-initialized
1607*9b33a4fcSRichard Fitzgerald * so the first write will always indicate a change.
1608*9b33a4fcSRichard Fitzgerald */
1609*9b33a4fcSRichard Fitzgerald if (def.flags && !(def.flags & WMFW_CTL_FLAG_READABLE)) {
1610*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1611*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals,
1612*9b33a4fcSRichard Fitzgerald param->len_bytes),
1613*9b33a4fcSRichard Fitzgerald 1);
1614*9b33a4fcSRichard Fitzgerald }
1615*9b33a4fcSRichard Fitzgerald
1616*9b33a4fcSRichard Fitzgerald /*
1617*9b33a4fcSRichard Fitzgerald * Write the same data to the control, cs_dsp_coeff_lock_and_write_ctrl()
1618*9b33a4fcSRichard Fitzgerald * should return 0 to indicate the content didn't change.
1619*9b33a4fcSRichard Fitzgerald */
1620*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1621*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes),
1622*9b33a4fcSRichard Fitzgerald 0);
1623*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
1624*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
1625*9b33a4fcSRichard Fitzgerald }
1626*9b33a4fcSRichard Fitzgerald
1627*9b33a4fcSRichard Fitzgerald /*
1628*9b33a4fcSRichard Fitzgerald * Write to a cached control while the firmware is loaded but not
1629*9b33a4fcSRichard Fitzgerald * started.
1630*9b33a4fcSRichard Fitzgerald * This should write to the cache only.
1631*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_write_not_started(struct kunit * test)1632*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_write_not_started(struct kunit *test)
1633*9b33a4fcSRichard Fitzgerald {
1634*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1635*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1636*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1637*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1638*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1639*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1640*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1641*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1642*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1643*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
1644*9b33a4fcSRichard Fitzgerald
1645*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1646*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
1647*9b33a4fcSRichard Fitzgerald
1648*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1649*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1650*9b33a4fcSRichard Fitzgerald
1651*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
1652*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1653*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1654*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1655*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1656*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
1657*9b33a4fcSRichard Fitzgerald
1658*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1659*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1660*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1661*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1662*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1663*9b33a4fcSRichard Fitzgerald
1664*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1665*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1666*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1667*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1668*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1669*9b33a4fcSRichard Fitzgerald
1670*9b33a4fcSRichard Fitzgerald /* Power-up DSP but don't start firmware */
1671*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1672*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1673*9b33a4fcSRichard Fitzgerald
1674*9b33a4fcSRichard Fitzgerald /* Drop expected writes and the regmap cache should be clean */
1675*9b33a4fcSRichard Fitzgerald cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
1676*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
1677*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1678*9b33a4fcSRichard Fitzgerald
1679*9b33a4fcSRichard Fitzgerald /* Write new data to the control, it should not be written to the registers */
1680*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1681*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1682*9b33a4fcSRichard Fitzgerald
1683*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
1684*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1685*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes),
1686*9b33a4fcSRichard Fitzgerald 1);
1687*9b33a4fcSRichard Fitzgerald
1688*9b33a4fcSRichard Fitzgerald /* Registers should not have been written so regmap cache should still be clean */
1689*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1690*9b33a4fcSRichard Fitzgerald
1691*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
1692*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1693*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
1694*9b33a4fcSRichard Fitzgerald 0);
1695*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
1696*9b33a4fcSRichard Fitzgerald }
1697*9b33a4fcSRichard Fitzgerald
1698*9b33a4fcSRichard Fitzgerald /*
1699*9b33a4fcSRichard Fitzgerald * Write to a cached control after the firmware has been loaded,
1700*9b33a4fcSRichard Fitzgerald * started and stopped.
1701*9b33a4fcSRichard Fitzgerald * This should write to the cache only.
1702*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_write_stopped(struct kunit * test)1703*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_write_stopped(struct kunit *test)
1704*9b33a4fcSRichard Fitzgerald {
1705*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1706*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1707*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1708*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1709*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1710*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1711*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1712*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1713*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1714*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
1715*9b33a4fcSRichard Fitzgerald
1716*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1717*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
1718*9b33a4fcSRichard Fitzgerald
1719*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1720*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1721*9b33a4fcSRichard Fitzgerald
1722*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
1723*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1724*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1725*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1726*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1727*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
1728*9b33a4fcSRichard Fitzgerald
1729*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1730*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1731*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1732*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1733*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1734*9b33a4fcSRichard Fitzgerald
1735*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1736*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1737*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1738*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1739*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1740*9b33a4fcSRichard Fitzgerald
1741*9b33a4fcSRichard Fitzgerald /* Power-up DSP */
1742*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1743*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1744*9b33a4fcSRichard Fitzgerald
1745*9b33a4fcSRichard Fitzgerald /* Start and stop the firmware */
1746*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
1747*9b33a4fcSRichard Fitzgerald cs_dsp_stop(dsp);
1748*9b33a4fcSRichard Fitzgerald
1749*9b33a4fcSRichard Fitzgerald /* Drop expected writes and the regmap cache should be clean */
1750*9b33a4fcSRichard Fitzgerald cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
1751*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
1752*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1753*9b33a4fcSRichard Fitzgerald
1754*9b33a4fcSRichard Fitzgerald /* Write new data to the control, it should not be written to the registers */
1755*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1756*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1757*9b33a4fcSRichard Fitzgerald
1758*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
1759*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1760*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes),
1761*9b33a4fcSRichard Fitzgerald 1);
1762*9b33a4fcSRichard Fitzgerald
1763*9b33a4fcSRichard Fitzgerald /* Registers should not have been written so regmap cache should still be clean */
1764*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1765*9b33a4fcSRichard Fitzgerald
1766*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
1767*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1768*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
1769*9b33a4fcSRichard Fitzgerald 0);
1770*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
1771*9b33a4fcSRichard Fitzgerald }
1772*9b33a4fcSRichard Fitzgerald
1773*9b33a4fcSRichard Fitzgerald /*
1774*9b33a4fcSRichard Fitzgerald * Write to a cached control after the firmware has been loaded,
1775*9b33a4fcSRichard Fitzgerald * then the DSP powered-down.
1776*9b33a4fcSRichard Fitzgerald * This should write to the cache only.
1777*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_write_powered_down(struct kunit * test)1778*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_write_powered_down(struct kunit *test)
1779*9b33a4fcSRichard Fitzgerald {
1780*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1781*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1782*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1783*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1784*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1785*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1786*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1787*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1788*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1789*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
1790*9b33a4fcSRichard Fitzgerald
1791*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1792*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
1793*9b33a4fcSRichard Fitzgerald
1794*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1795*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1796*9b33a4fcSRichard Fitzgerald
1797*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
1798*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1799*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1800*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1801*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1802*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
1803*9b33a4fcSRichard Fitzgerald
1804*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1805*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1806*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1807*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1808*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1809*9b33a4fcSRichard Fitzgerald
1810*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1811*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1812*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1813*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1814*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1815*9b33a4fcSRichard Fitzgerald
1816*9b33a4fcSRichard Fitzgerald /* Power-up DSP then power-down */
1817*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1818*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1819*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
1820*9b33a4fcSRichard Fitzgerald
1821*9b33a4fcSRichard Fitzgerald /* Drop expected writes and the regmap cache should be clean */
1822*9b33a4fcSRichard Fitzgerald cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
1823*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
1824*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1825*9b33a4fcSRichard Fitzgerald
1826*9b33a4fcSRichard Fitzgerald /* Write new data to the control, it should not be written to the registers */
1827*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1828*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1829*9b33a4fcSRichard Fitzgerald
1830*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
1831*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1832*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes),
1833*9b33a4fcSRichard Fitzgerald 1);
1834*9b33a4fcSRichard Fitzgerald
1835*9b33a4fcSRichard Fitzgerald /* Registers should not have been written so regmap cache should still be clean */
1836*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1837*9b33a4fcSRichard Fitzgerald
1838*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
1839*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1840*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
1841*9b33a4fcSRichard Fitzgerald 0);
1842*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
1843*9b33a4fcSRichard Fitzgerald }
1844*9b33a4fcSRichard Fitzgerald
1845*9b33a4fcSRichard Fitzgerald /*
1846*9b33a4fcSRichard Fitzgerald * Write to a cached control after the firmware has been loaded,
1847*9b33a4fcSRichard Fitzgerald * started, stopped, and then the DSP powered-down.
1848*9b33a4fcSRichard Fitzgerald * This should write to the cache only.
1849*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_write_stopped_powered_down(struct kunit * test)1850*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_write_stopped_powered_down(struct kunit *test)
1851*9b33a4fcSRichard Fitzgerald {
1852*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1853*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1854*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1855*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1856*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1857*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1858*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1859*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1860*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1861*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
1862*9b33a4fcSRichard Fitzgerald
1863*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1864*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
1865*9b33a4fcSRichard Fitzgerald
1866*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1867*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1868*9b33a4fcSRichard Fitzgerald
1869*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
1870*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1871*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1872*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1873*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1874*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
1875*9b33a4fcSRichard Fitzgerald
1876*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1877*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1878*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1879*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1880*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1881*9b33a4fcSRichard Fitzgerald
1882*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1883*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1884*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1885*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1886*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1887*9b33a4fcSRichard Fitzgerald
1888*9b33a4fcSRichard Fitzgerald /* Power-up DSP */
1889*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1890*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1891*9b33a4fcSRichard Fitzgerald
1892*9b33a4fcSRichard Fitzgerald /* Start and stop the firmware then power-down */
1893*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
1894*9b33a4fcSRichard Fitzgerald cs_dsp_stop(dsp);
1895*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
1896*9b33a4fcSRichard Fitzgerald
1897*9b33a4fcSRichard Fitzgerald /* Drop expected writes and the regmap cache should be clean */
1898*9b33a4fcSRichard Fitzgerald cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
1899*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
1900*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1901*9b33a4fcSRichard Fitzgerald
1902*9b33a4fcSRichard Fitzgerald /* Write new data to the control, it should not be written to the registers */
1903*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1904*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1905*9b33a4fcSRichard Fitzgerald
1906*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
1907*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1908*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes),
1909*9b33a4fcSRichard Fitzgerald 1);
1910*9b33a4fcSRichard Fitzgerald
1911*9b33a4fcSRichard Fitzgerald /* Registers should not have been written so regmap cache should still be clean */
1912*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1913*9b33a4fcSRichard Fitzgerald
1914*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
1915*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1916*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
1917*9b33a4fcSRichard Fitzgerald 0);
1918*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
1919*9b33a4fcSRichard Fitzgerald }
1920*9b33a4fcSRichard Fitzgerald
1921*9b33a4fcSRichard Fitzgerald /*
1922*9b33a4fcSRichard Fitzgerald * Write to a cached control that is not in the currently loaded firmware.
1923*9b33a4fcSRichard Fitzgerald * This should write to the cache only.
1924*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_write_not_current_loaded_fw(struct kunit * test)1925*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_write_not_current_loaded_fw(struct kunit *test)
1926*9b33a4fcSRichard Fitzgerald {
1927*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
1928*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
1929*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
1930*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
1931*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
1932*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_wmfw_builder *builder2 = _create_dummy_wmfw(test);
1933*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
1934*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
1935*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
1936*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
1937*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
1938*9b33a4fcSRichard Fitzgerald
1939*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1940*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
1941*9b33a4fcSRichard Fitzgerald
1942*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
1943*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
1944*9b33a4fcSRichard Fitzgerald
1945*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
1946*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
1947*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
1948*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
1949*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
1950*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
1951*9b33a4fcSRichard Fitzgerald
1952*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
1953*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
1954*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
1955*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
1956*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
1957*9b33a4fcSRichard Fitzgerald
1958*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
1959*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
1960*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
1961*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
1962*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
1963*9b33a4fcSRichard Fitzgerald
1964*9b33a4fcSRichard Fitzgerald /* Power-up DSP */
1965*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
1966*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
1967*9b33a4fcSRichard Fitzgerald
1968*9b33a4fcSRichard Fitzgerald /* Get the control */
1969*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
1970*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
1971*9b33a4fcSRichard Fitzgerald
1972*9b33a4fcSRichard Fitzgerald /* Power-down DSP then power-up with a different firmware */
1973*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
1974*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(builder2);
1975*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw2", NULL, NULL, "mbc.vss"), 0);
1976*9b33a4fcSRichard Fitzgerald
1977*9b33a4fcSRichard Fitzgerald /* Control from unloaded firmware should be disabled */
1978*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, ctl->enabled);
1979*9b33a4fcSRichard Fitzgerald
1980*9b33a4fcSRichard Fitzgerald /* Drop expected writes and the regmap cache should be clean */
1981*9b33a4fcSRichard Fitzgerald cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
1982*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
1983*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1984*9b33a4fcSRichard Fitzgerald
1985*9b33a4fcSRichard Fitzgerald /*
1986*9b33a4fcSRichard Fitzgerald * It should be possible to write new data to the control from
1987*9b33a4fcSRichard Fitzgerald * the first firmware. But this should not be written to the
1988*9b33a4fcSRichard Fitzgerald * registers.
1989*9b33a4fcSRichard Fitzgerald */
1990*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
1991*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
1992*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes),
1993*9b33a4fcSRichard Fitzgerald 1);
1994*9b33a4fcSRichard Fitzgerald
1995*9b33a4fcSRichard Fitzgerald /* Registers should not have been written so regmap cache should still be clean */
1996*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
1997*9b33a4fcSRichard Fitzgerald
1998*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
1999*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2000*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
2001*9b33a4fcSRichard Fitzgerald 0);
2002*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
2003*9b33a4fcSRichard Fitzgerald }
2004*9b33a4fcSRichard Fitzgerald
2005*9b33a4fcSRichard Fitzgerald /*
2006*9b33a4fcSRichard Fitzgerald * Write to a cached control that is not in the currently running firmware.
2007*9b33a4fcSRichard Fitzgerald * This should write to the cache only.
2008*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_write_not_current_running_fw(struct kunit * test)2009*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_write_not_current_running_fw(struct kunit *test)
2010*9b33a4fcSRichard Fitzgerald {
2011*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
2012*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
2013*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
2014*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
2015*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
2016*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_wmfw_builder *builder2 = _create_dummy_wmfw(test);
2017*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
2018*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
2019*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
2020*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
2021*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
2022*9b33a4fcSRichard Fitzgerald
2023*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2024*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
2025*9b33a4fcSRichard Fitzgerald
2026*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2027*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
2028*9b33a4fcSRichard Fitzgerald
2029*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
2030*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
2031*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
2032*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
2033*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
2034*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
2035*9b33a4fcSRichard Fitzgerald
2036*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
2037*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
2038*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
2039*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
2040*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
2041*9b33a4fcSRichard Fitzgerald
2042*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
2043*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
2044*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
2045*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
2046*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
2047*9b33a4fcSRichard Fitzgerald
2048*9b33a4fcSRichard Fitzgerald /* Power-up DSP then power-down */
2049*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
2050*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
2051*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
2052*9b33a4fcSRichard Fitzgerald
2053*9b33a4fcSRichard Fitzgerald /* Get the control */
2054*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
2055*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
2056*9b33a4fcSRichard Fitzgerald
2057*9b33a4fcSRichard Fitzgerald /* Power-up with a different firmware and run it */
2058*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(builder2);
2059*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw2", NULL, NULL, "mbc.vss"), 0);
2060*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2061*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
2062*9b33a4fcSRichard Fitzgerald
2063*9b33a4fcSRichard Fitzgerald /* Control from unloaded firmware should be disabled */
2064*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, ctl->enabled);
2065*9b33a4fcSRichard Fitzgerald
2066*9b33a4fcSRichard Fitzgerald /* Drop expected writes and the regmap cache should be clean */
2067*9b33a4fcSRichard Fitzgerald cs_dsp_mock_xm_header_drop_from_regmap_cache(priv);
2068*9b33a4fcSRichard Fitzgerald cs_dsp_mock_regmap_drop_bytes(priv, reg, param->len_bytes);
2069*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
2070*9b33a4fcSRichard Fitzgerald
2071*9b33a4fcSRichard Fitzgerald /*
2072*9b33a4fcSRichard Fitzgerald * It should be possible to write new data to the control from
2073*9b33a4fcSRichard Fitzgerald * the first firmware. But this should not be written to the
2074*9b33a4fcSRichard Fitzgerald * registers.
2075*9b33a4fcSRichard Fitzgerald */
2076*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
2077*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2078*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes),
2079*9b33a4fcSRichard Fitzgerald 1);
2080*9b33a4fcSRichard Fitzgerald
2081*9b33a4fcSRichard Fitzgerald /* Registers should not have been written so regmap cache should still be clean */
2082*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_FALSE(test, cs_dsp_mock_regmap_is_dirty(priv, true));
2083*9b33a4fcSRichard Fitzgerald
2084*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
2085*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2086*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
2087*9b33a4fcSRichard Fitzgerald 0);
2088*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
2089*9b33a4fcSRichard Fitzgerald }
2090*9b33a4fcSRichard Fitzgerald
2091*9b33a4fcSRichard Fitzgerald /*
2092*9b33a4fcSRichard Fitzgerald * Write to a cached control before running the firmware.
2093*9b33a4fcSRichard Fitzgerald * The value written to the cache should be synced out to the registers
2094*9b33a4fcSRichard Fitzgerald * backing the control when the firmware is run.
2095*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_sync_write_before_run(struct kunit * test)2096*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_sync_write_before_run(struct kunit *test)
2097*9b33a4fcSRichard Fitzgerald {
2098*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
2099*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
2100*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
2101*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
2102*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
2103*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
2104*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
2105*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
2106*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
2107*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
2108*9b33a4fcSRichard Fitzgerald
2109*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2110*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
2111*9b33a4fcSRichard Fitzgerald
2112*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2113*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
2114*9b33a4fcSRichard Fitzgerald
2115*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
2116*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
2117*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
2118*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
2119*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
2120*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
2121*9b33a4fcSRichard Fitzgerald
2122*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
2123*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
2124*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
2125*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
2126*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
2127*9b33a4fcSRichard Fitzgerald
2128*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
2129*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
2130*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
2131*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
2132*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
2133*9b33a4fcSRichard Fitzgerald
2134*9b33a4fcSRichard Fitzgerald /* Power-up DSP but don't start firmware */
2135*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
2136*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
2137*9b33a4fcSRichard Fitzgerald
2138*9b33a4fcSRichard Fitzgerald /* Write new data to the control, it should not be written to the registers */
2139*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
2140*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
2141*9b33a4fcSRichard Fitzgerald
2142*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
2143*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2144*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes),
2145*9b33a4fcSRichard Fitzgerald 1);
2146*9b33a4fcSRichard Fitzgerald
2147*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2148*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMNEQ(test, readback, reg_vals, param->len_bytes);
2149*9b33a4fcSRichard Fitzgerald
2150*9b33a4fcSRichard Fitzgerald /* Start the firmware and the cached data should be written to registers */
2151*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2152*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
2153*9b33a4fcSRichard Fitzgerald
2154*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2155*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
2156*9b33a4fcSRichard Fitzgerald
2157*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
2158*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2159*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
2160*9b33a4fcSRichard Fitzgerald 0);
2161*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
2162*9b33a4fcSRichard Fitzgerald }
2163*9b33a4fcSRichard Fitzgerald
2164*9b33a4fcSRichard Fitzgerald /*
2165*9b33a4fcSRichard Fitzgerald * Write to a cached control while the firmware is running.
2166*9b33a4fcSRichard Fitzgerald * The value written should be synced out to the registers
2167*9b33a4fcSRichard Fitzgerald * backing the control when the firmware is next run.
2168*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_sync_write_while_running(struct kunit * test)2169*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_sync_write_while_running(struct kunit *test)
2170*9b33a4fcSRichard Fitzgerald {
2171*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
2172*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
2173*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
2174*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
2175*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
2176*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
2177*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
2178*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
2179*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
2180*9b33a4fcSRichard Fitzgerald u32 *init_vals, *ctl_vals, *readback;
2181*9b33a4fcSRichard Fitzgerald
2182*9b33a4fcSRichard Fitzgerald init_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2183*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, init_vals);
2184*9b33a4fcSRichard Fitzgerald
2185*9b33a4fcSRichard Fitzgerald ctl_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2186*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctl_vals);
2187*9b33a4fcSRichard Fitzgerald
2188*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2189*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
2190*9b33a4fcSRichard Fitzgerald
2191*9b33a4fcSRichard Fitzgerald /* Zero-fill the registers backing the control */
2192*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
2193*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
2194*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
2195*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
2196*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
2197*9b33a4fcSRichard Fitzgerald
2198*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
2199*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
2200*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
2201*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
2202*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
2203*9b33a4fcSRichard Fitzgerald
2204*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
2205*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
2206*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
2207*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
2208*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
2209*9b33a4fcSRichard Fitzgerald
2210*9b33a4fcSRichard Fitzgerald /* Power-up DSP and start firmware */
2211*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
2212*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
2213*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2214*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
2215*9b33a4fcSRichard Fitzgerald
2216*9b33a4fcSRichard Fitzgerald /* Write new data to the control */
2217*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
2218*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
2219*9b33a4fcSRichard Fitzgerald
2220*9b33a4fcSRichard Fitzgerald get_random_bytes(ctl_vals, param->len_bytes);
2221*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2222*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, ctl_vals, param->len_bytes),
2223*9b33a4fcSRichard Fitzgerald 1);
2224*9b33a4fcSRichard Fitzgerald
2225*9b33a4fcSRichard Fitzgerald /* Stop firmware and zero the registers backing the control */
2226*9b33a4fcSRichard Fitzgerald kunit_release_action(test, _cs_dsp_stop_wrapper, dsp);
2227*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
2228*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2229*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, init_vals, param->len_bytes);
2230*9b33a4fcSRichard Fitzgerald
2231*9b33a4fcSRichard Fitzgerald /* Start the firmware and the cached data should be written to registers */
2232*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2233*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
2234*9b33a4fcSRichard Fitzgerald
2235*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2236*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
2237*9b33a4fcSRichard Fitzgerald
2238*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
2239*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2240*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
2241*9b33a4fcSRichard Fitzgerald 0);
2242*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
2243*9b33a4fcSRichard Fitzgerald }
2244*9b33a4fcSRichard Fitzgerald
2245*9b33a4fcSRichard Fitzgerald /*
2246*9b33a4fcSRichard Fitzgerald * Write to a cached control after stopping the firmware.
2247*9b33a4fcSRichard Fitzgerald * The value written to the cache should be synced out to the registers
2248*9b33a4fcSRichard Fitzgerald * backing the control when the firmware is next run.
2249*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_sync_write_after_stop(struct kunit * test)2250*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_sync_write_after_stop(struct kunit *test)
2251*9b33a4fcSRichard Fitzgerald {
2252*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
2253*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
2254*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
2255*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
2256*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
2257*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
2258*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
2259*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
2260*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
2261*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
2262*9b33a4fcSRichard Fitzgerald
2263*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2264*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
2265*9b33a4fcSRichard Fitzgerald
2266*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2267*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
2268*9b33a4fcSRichard Fitzgerald
2269*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
2270*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
2271*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
2272*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
2273*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
2274*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
2275*9b33a4fcSRichard Fitzgerald
2276*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
2277*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
2278*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
2279*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
2280*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
2281*9b33a4fcSRichard Fitzgerald
2282*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
2283*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
2284*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
2285*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
2286*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
2287*9b33a4fcSRichard Fitzgerald
2288*9b33a4fcSRichard Fitzgerald /* Power-up DSP but don't start firmware */
2289*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
2290*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
2291*9b33a4fcSRichard Fitzgerald
2292*9b33a4fcSRichard Fitzgerald /* Start and stop the firmware */
2293*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2294*9b33a4fcSRichard Fitzgerald cs_dsp_stop(dsp);
2295*9b33a4fcSRichard Fitzgerald
2296*9b33a4fcSRichard Fitzgerald /* Write new data to the control, it should not be written to the registers */
2297*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
2298*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
2299*9b33a4fcSRichard Fitzgerald
2300*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
2301*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2302*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes),
2303*9b33a4fcSRichard Fitzgerald 1);
2304*9b33a4fcSRichard Fitzgerald
2305*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2306*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMNEQ(test, readback, reg_vals, param->len_bytes);
2307*9b33a4fcSRichard Fitzgerald
2308*9b33a4fcSRichard Fitzgerald /* Start the firmware and the cached data should be written to registers */
2309*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2310*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
2311*9b33a4fcSRichard Fitzgerald
2312*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2313*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
2314*9b33a4fcSRichard Fitzgerald
2315*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
2316*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2317*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
2318*9b33a4fcSRichard Fitzgerald 0);
2319*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
2320*9b33a4fcSRichard Fitzgerald }
2321*9b33a4fcSRichard Fitzgerald
2322*9b33a4fcSRichard Fitzgerald /*
2323*9b33a4fcSRichard Fitzgerald * Write to a cached control that is not in the currently loaded firmware.
2324*9b33a4fcSRichard Fitzgerald * The value written to the cache should be synced out to the registers
2325*9b33a4fcSRichard Fitzgerald * backing the control the next time the firmware containing the
2326*9b33a4fcSRichard Fitzgerald * control is run.
2327*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_sync_write_not_current_fw(struct kunit * test)2328*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_sync_write_not_current_fw(struct kunit *test)
2329*9b33a4fcSRichard Fitzgerald {
2330*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
2331*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
2332*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
2333*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
2334*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
2335*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
2336*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_wmfw_builder *builder2 = _create_dummy_wmfw(test);
2337*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
2338*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
2339*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
2340*9b33a4fcSRichard Fitzgerald u32 *reg_vals, *readback;
2341*9b33a4fcSRichard Fitzgerald
2342*9b33a4fcSRichard Fitzgerald reg_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2343*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reg_vals);
2344*9b33a4fcSRichard Fitzgerald
2345*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2346*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
2347*9b33a4fcSRichard Fitzgerald
2348*9b33a4fcSRichard Fitzgerald /* Create some DSP data to be read into the control cache */
2349*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
2350*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
2351*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
2352*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
2353*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, reg_vals, param->len_bytes);
2354*9b33a4fcSRichard Fitzgerald
2355*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
2356*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
2357*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
2358*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
2359*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
2360*9b33a4fcSRichard Fitzgerald
2361*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
2362*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
2363*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
2364*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
2365*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
2366*9b33a4fcSRichard Fitzgerald
2367*9b33a4fcSRichard Fitzgerald /* Power-up DSP but don't start firmware */
2368*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
2369*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
2370*9b33a4fcSRichard Fitzgerald
2371*9b33a4fcSRichard Fitzgerald /* Get the control */
2372*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
2373*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
2374*9b33a4fcSRichard Fitzgerald
2375*9b33a4fcSRichard Fitzgerald /* Power-down DSP then power-up with a different firmware */
2376*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
2377*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(builder2);
2378*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw2", NULL, NULL, "mbc.vss"), 0);
2379*9b33a4fcSRichard Fitzgerald
2380*9b33a4fcSRichard Fitzgerald /* Write new data to the control, it should not be written to the registers */
2381*9b33a4fcSRichard Fitzgerald get_random_bytes(reg_vals, param->len_bytes);
2382*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2383*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, reg_vals, param->len_bytes),
2384*9b33a4fcSRichard Fitzgerald 1);
2385*9b33a4fcSRichard Fitzgerald
2386*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2387*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMNEQ(test, readback, reg_vals, param->len_bytes);
2388*9b33a4fcSRichard Fitzgerald
2389*9b33a4fcSRichard Fitzgerald /* Power-down DSP then power-up with the original firmware */
2390*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
2391*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
2392*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
2393*9b33a4fcSRichard Fitzgerald
2394*9b33a4fcSRichard Fitzgerald /* Start the firmware and the cached data should be written to registers */
2395*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2396*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
2397*9b33a4fcSRichard Fitzgerald
2398*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2399*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
2400*9b33a4fcSRichard Fitzgerald
2401*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
2402*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2403*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
2404*9b33a4fcSRichard Fitzgerald 0);
2405*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, reg_vals, param->len_bytes);
2406*9b33a4fcSRichard Fitzgerald }
2407*9b33a4fcSRichard Fitzgerald
2408*9b33a4fcSRichard Fitzgerald /*
2409*9b33a4fcSRichard Fitzgerald * The value in the control cache should be synced out to the registers
2410*9b33a4fcSRichard Fitzgerald * backing the control every time the firmware containing the control
2411*9b33a4fcSRichard Fitzgerald * is run.
2412*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_sync_reapply_every_run(struct kunit * test)2413*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_sync_reapply_every_run(struct kunit *test)
2414*9b33a4fcSRichard Fitzgerald {
2415*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
2416*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
2417*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
2418*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
2419*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
2420*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
2421*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
2422*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
2423*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
2424*9b33a4fcSRichard Fitzgerald u32 *init_vals, *readback, *ctl_vals;
2425*9b33a4fcSRichard Fitzgerald
2426*9b33a4fcSRichard Fitzgerald init_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2427*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, init_vals);
2428*9b33a4fcSRichard Fitzgerald
2429*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2430*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
2431*9b33a4fcSRichard Fitzgerald
2432*9b33a4fcSRichard Fitzgerald ctl_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
2433*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctl_vals);
2434*9b33a4fcSRichard Fitzgerald
2435*9b33a4fcSRichard Fitzgerald /* Zero-fill the registers backing the control */
2436*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
2437*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
2438*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
2439*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
2440*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
2441*9b33a4fcSRichard Fitzgerald
2442*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
2443*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
2444*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
2445*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
2446*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
2447*9b33a4fcSRichard Fitzgerald
2448*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
2449*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
2450*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
2451*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
2452*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
2453*9b33a4fcSRichard Fitzgerald
2454*9b33a4fcSRichard Fitzgerald /* Power-up DSP but don't start firmware */
2455*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
2456*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
2457*9b33a4fcSRichard Fitzgerald
2458*9b33a4fcSRichard Fitzgerald /* Write new data to the control */
2459*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
2460*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
2461*9b33a4fcSRichard Fitzgerald
2462*9b33a4fcSRichard Fitzgerald get_random_bytes(ctl_vals, param->len_bytes);
2463*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2464*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, ctl_vals, param->len_bytes),
2465*9b33a4fcSRichard Fitzgerald 1);
2466*9b33a4fcSRichard Fitzgerald
2467*9b33a4fcSRichard Fitzgerald /* Start the firmware and the cached data should be written to registers */
2468*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2469*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
2470*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2471*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
2472*9b33a4fcSRichard Fitzgerald
2473*9b33a4fcSRichard Fitzgerald /* Stop the firmware and reset the registers */
2474*9b33a4fcSRichard Fitzgerald kunit_release_action(test, _cs_dsp_stop_wrapper, dsp);
2475*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
2476*9b33a4fcSRichard Fitzgerald
2477*9b33a4fcSRichard Fitzgerald /* Start the firmware again and the cached data should be written to registers */
2478*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2479*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
2480*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2481*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
2482*9b33a4fcSRichard Fitzgerald
2483*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
2484*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2485*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
2486*9b33a4fcSRichard Fitzgerald 0);
2487*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
2488*9b33a4fcSRichard Fitzgerald }
2489*9b33a4fcSRichard Fitzgerald
2490*9b33a4fcSRichard Fitzgerald /*
2491*9b33a4fcSRichard Fitzgerald * The value in the control cache should be retained if the same
2492*9b33a4fcSRichard Fitzgerald * firmware is downloaded again. It should be synced out to the
2493*9b33a4fcSRichard Fitzgerald * registers backing the control after the firmware containing the
2494*9b33a4fcSRichard Fitzgerald * control is downloaded again and run.
2495*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_sync_reapply_after_fw_reload(struct kunit * test)2496*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_sync_reapply_after_fw_reload(struct kunit *test)
2497*9b33a4fcSRichard Fitzgerald {
2498*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
2499*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
2500*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
2501*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
2502*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
2503*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
2504*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
2505*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
2506*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
2507*9b33a4fcSRichard Fitzgerald u32 *init_vals, *readback, *ctl_vals;
2508*9b33a4fcSRichard Fitzgerald
2509*9b33a4fcSRichard Fitzgerald init_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2510*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, init_vals);
2511*9b33a4fcSRichard Fitzgerald
2512*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2513*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
2514*9b33a4fcSRichard Fitzgerald
2515*9b33a4fcSRichard Fitzgerald ctl_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
2516*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctl_vals);
2517*9b33a4fcSRichard Fitzgerald
2518*9b33a4fcSRichard Fitzgerald /* Zero-fill the registers backing the control */
2519*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
2520*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
2521*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
2522*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
2523*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
2524*9b33a4fcSRichard Fitzgerald
2525*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
2526*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
2527*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
2528*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
2529*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
2530*9b33a4fcSRichard Fitzgerald
2531*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
2532*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
2533*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
2534*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
2535*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
2536*9b33a4fcSRichard Fitzgerald
2537*9b33a4fcSRichard Fitzgerald /* Power-up DSP but don't start firmware */
2538*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
2539*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
2540*9b33a4fcSRichard Fitzgerald
2541*9b33a4fcSRichard Fitzgerald /* Write new data to the control */
2542*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
2543*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
2544*9b33a4fcSRichard Fitzgerald
2545*9b33a4fcSRichard Fitzgerald get_random_bytes(ctl_vals, param->len_bytes);
2546*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2547*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, ctl_vals, param->len_bytes),
2548*9b33a4fcSRichard Fitzgerald 1);
2549*9b33a4fcSRichard Fitzgerald
2550*9b33a4fcSRichard Fitzgerald /* Start the firmware and the cached data should be written to registers */
2551*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2552*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
2553*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2554*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
2555*9b33a4fcSRichard Fitzgerald
2556*9b33a4fcSRichard Fitzgerald /* Stop the firmware and power-down the DSP */
2557*9b33a4fcSRichard Fitzgerald kunit_release_action(test, _cs_dsp_stop_wrapper, dsp);
2558*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
2559*9b33a4fcSRichard Fitzgerald
2560*9b33a4fcSRichard Fitzgerald /* Reset the registers */
2561*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
2562*9b33a4fcSRichard Fitzgerald
2563*9b33a4fcSRichard Fitzgerald /* Download the firmware again, the cache content should not change */
2564*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
2565*9b33a4fcSRichard Fitzgerald
2566*9b33a4fcSRichard Fitzgerald /* Start the firmware and the cached data should be written to registers */
2567*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2568*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
2569*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2570*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
2571*9b33a4fcSRichard Fitzgerald
2572*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
2573*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2574*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
2575*9b33a4fcSRichard Fitzgerald 0);
2576*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
2577*9b33a4fcSRichard Fitzgerald }
2578*9b33a4fcSRichard Fitzgerald
2579*9b33a4fcSRichard Fitzgerald /*
2580*9b33a4fcSRichard Fitzgerald * The value in the control cache should be retained after a different
2581*9b33a4fcSRichard Fitzgerald * firmware is downloaded.
2582*9b33a4fcSRichard Fitzgerald * When the firmware containing the control is downloaded and run
2583*9b33a4fcSRichard Fitzgerald * the value in the control cache should be synced out to the registers
2584*9b33a4fcSRichard Fitzgerald * backing the control.
2585*9b33a4fcSRichard Fitzgerald */
cs_dsp_ctl_cache_sync_reapply_after_fw_swap(struct kunit * test)2586*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_cache_sync_reapply_after_fw_swap(struct kunit *test)
2587*9b33a4fcSRichard Fitzgerald {
2588*9b33a4fcSRichard Fitzgerald const struct cs_dsp_ctl_cache_test_param *param = test->param_value;
2589*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv = test->priv;
2590*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local = priv->local;
2591*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp = priv->dsp;
2592*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_coeff_def def = mock_coeff_template;
2593*9b33a4fcSRichard Fitzgerald int alg_idx = _find_alg_entry(test, param->alg_id);
2594*9b33a4fcSRichard Fitzgerald struct cs_dsp_mock_wmfw_builder *builder2 = _create_dummy_wmfw(test);
2595*9b33a4fcSRichard Fitzgerald unsigned int reg, alg_base_words;
2596*9b33a4fcSRichard Fitzgerald struct cs_dsp_coeff_ctl *ctl;
2597*9b33a4fcSRichard Fitzgerald struct firmware *wmfw;
2598*9b33a4fcSRichard Fitzgerald u32 *init_vals, *readback, *ctl_vals;
2599*9b33a4fcSRichard Fitzgerald
2600*9b33a4fcSRichard Fitzgerald init_vals = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2601*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, init_vals);
2602*9b33a4fcSRichard Fitzgerald
2603*9b33a4fcSRichard Fitzgerald readback = kunit_kzalloc(test, param->len_bytes, GFP_KERNEL);
2604*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, readback);
2605*9b33a4fcSRichard Fitzgerald
2606*9b33a4fcSRichard Fitzgerald ctl_vals = kunit_kmalloc(test, param->len_bytes, GFP_KERNEL);
2607*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctl_vals);
2608*9b33a4fcSRichard Fitzgerald
2609*9b33a4fcSRichard Fitzgerald /* Zero-fill the registers backing the control */
2610*9b33a4fcSRichard Fitzgerald alg_base_words = _get_alg_mem_base_words(test, alg_idx, param->mem_type);
2611*9b33a4fcSRichard Fitzgerald reg = cs_dsp_mock_base_addr_for_mem(priv, param->mem_type);
2612*9b33a4fcSRichard Fitzgerald reg += (alg_base_words + param->offs_words) *
2613*9b33a4fcSRichard Fitzgerald cs_dsp_mock_reg_addr_inc_per_unpacked_word(priv);
2614*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
2615*9b33a4fcSRichard Fitzgerald
2616*9b33a4fcSRichard Fitzgerald /* Create control pointing to this data */
2617*9b33a4fcSRichard Fitzgerald def.flags = param->flags;
2618*9b33a4fcSRichard Fitzgerald def.mem_type = param->mem_type;
2619*9b33a4fcSRichard Fitzgerald def.offset_dsp_words = param->offs_words;
2620*9b33a4fcSRichard Fitzgerald def.length_bytes = param->len_bytes;
2621*9b33a4fcSRichard Fitzgerald
2622*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_start_alg_info_block(local->wmfw_builder,
2623*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs[alg_idx].id,
2624*9b33a4fcSRichard Fitzgerald "dummyalg", NULL);
2625*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_add_coeff_desc(local->wmfw_builder, &def);
2626*9b33a4fcSRichard Fitzgerald cs_dsp_mock_wmfw_end_alg_info_block(local->wmfw_builder);
2627*9b33a4fcSRichard Fitzgerald
2628*9b33a4fcSRichard Fitzgerald /* Power-up DSP but don't start firmware */
2629*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
2630*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
2631*9b33a4fcSRichard Fitzgerald
2632*9b33a4fcSRichard Fitzgerald /* Write new data to the control */
2633*9b33a4fcSRichard Fitzgerald ctl = list_first_entry_or_null(&dsp->ctl_list, struct cs_dsp_coeff_ctl, list);
2634*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_NULL(test, ctl);
2635*9b33a4fcSRichard Fitzgerald
2636*9b33a4fcSRichard Fitzgerald get_random_bytes(ctl_vals, param->len_bytes);
2637*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2638*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_write_ctrl(ctl, 0, ctl_vals, param->len_bytes),
2639*9b33a4fcSRichard Fitzgerald 1);
2640*9b33a4fcSRichard Fitzgerald
2641*9b33a4fcSRichard Fitzgerald /* Start the firmware and the cached data should be written to registers */
2642*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2643*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
2644*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2645*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
2646*9b33a4fcSRichard Fitzgerald
2647*9b33a4fcSRichard Fitzgerald /* Stop the firmware and power-down the DSP */
2648*9b33a4fcSRichard Fitzgerald kunit_release_action(test, _cs_dsp_stop_wrapper, dsp);
2649*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
2650*9b33a4fcSRichard Fitzgerald
2651*9b33a4fcSRichard Fitzgerald /* Reset the registers */
2652*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
2653*9b33a4fcSRichard Fitzgerald
2654*9b33a4fcSRichard Fitzgerald /* Download and run a different firmware */
2655*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(builder2);
2656*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw2", NULL, NULL, "mbc.vss"), 0);
2657*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2658*9b33a4fcSRichard Fitzgerald cs_dsp_power_down(dsp);
2659*9b33a4fcSRichard Fitzgerald
2660*9b33a4fcSRichard Fitzgerald /* Reset the registers */
2661*9b33a4fcSRichard Fitzgerald regmap_raw_write(dsp->regmap, reg, init_vals, param->len_bytes);
2662*9b33a4fcSRichard Fitzgerald
2663*9b33a4fcSRichard Fitzgerald /* Download the original firmware again */
2664*9b33a4fcSRichard Fitzgerald wmfw = cs_dsp_mock_wmfw_get_firmware(priv->local->wmfw_builder);
2665*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_power_up(dsp, wmfw, "mock_fw", NULL, NULL, "misc"), 0);
2666*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_TRUE(test, ctl->set);
2667*9b33a4fcSRichard Fitzgerald
2668*9b33a4fcSRichard Fitzgerald /* Start the firmware and the cached data should be written to registers */
2669*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, cs_dsp_run(dsp), 0);
2670*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, _cs_dsp_stop_wrapper, dsp), 0);
2671*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test, regmap_raw_read(dsp->regmap, reg, readback, param->len_bytes), 0);
2672*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
2673*9b33a4fcSRichard Fitzgerald
2674*9b33a4fcSRichard Fitzgerald /* Control should readback the new data from the control cache */
2675*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_EQ(test,
2676*9b33a4fcSRichard Fitzgerald cs_dsp_coeff_lock_and_read_ctrl(ctl, 0, readback, param->len_bytes),
2677*9b33a4fcSRichard Fitzgerald 0);
2678*9b33a4fcSRichard Fitzgerald KUNIT_EXPECT_MEMEQ(test, readback, ctl_vals, param->len_bytes);
2679*9b33a4fcSRichard Fitzgerald }
2680*9b33a4fcSRichard Fitzgerald
cs_dsp_ctl_cache_test_common_init(struct kunit * test,struct cs_dsp * dsp,int wmfw_version)2681*9b33a4fcSRichard Fitzgerald static int cs_dsp_ctl_cache_test_common_init(struct kunit *test, struct cs_dsp *dsp,
2682*9b33a4fcSRichard Fitzgerald int wmfw_version)
2683*9b33a4fcSRichard Fitzgerald {
2684*9b33a4fcSRichard Fitzgerald struct cs_dsp_test *priv;
2685*9b33a4fcSRichard Fitzgerald struct cs_dsp_test_local *local;
2686*9b33a4fcSRichard Fitzgerald struct device *test_dev;
2687*9b33a4fcSRichard Fitzgerald int ret;
2688*9b33a4fcSRichard Fitzgerald
2689*9b33a4fcSRichard Fitzgerald priv = kunit_kzalloc(test, sizeof(*priv), GFP_KERNEL);
2690*9b33a4fcSRichard Fitzgerald if (!priv)
2691*9b33a4fcSRichard Fitzgerald return -ENOMEM;
2692*9b33a4fcSRichard Fitzgerald
2693*9b33a4fcSRichard Fitzgerald local = kunit_kzalloc(test, sizeof(struct cs_dsp_test_local), GFP_KERNEL);
2694*9b33a4fcSRichard Fitzgerald if (!local)
2695*9b33a4fcSRichard Fitzgerald return -ENOMEM;
2696*9b33a4fcSRichard Fitzgerald
2697*9b33a4fcSRichard Fitzgerald priv->test = test;
2698*9b33a4fcSRichard Fitzgerald priv->dsp = dsp;
2699*9b33a4fcSRichard Fitzgerald test->priv = priv;
2700*9b33a4fcSRichard Fitzgerald priv->local = local;
2701*9b33a4fcSRichard Fitzgerald priv->local->wmfw_version = wmfw_version;
2702*9b33a4fcSRichard Fitzgerald
2703*9b33a4fcSRichard Fitzgerald /* Create dummy struct device */
2704*9b33a4fcSRichard Fitzgerald test_dev = kunit_device_register(test, "cs_dsp_test_drv");
2705*9b33a4fcSRichard Fitzgerald if (IS_ERR(test_dev))
2706*9b33a4fcSRichard Fitzgerald return PTR_ERR(test_dev);
2707*9b33a4fcSRichard Fitzgerald
2708*9b33a4fcSRichard Fitzgerald dsp->dev = get_device(test_dev);
2709*9b33a4fcSRichard Fitzgerald if (!dsp->dev)
2710*9b33a4fcSRichard Fitzgerald return -ENODEV;
2711*9b33a4fcSRichard Fitzgerald
2712*9b33a4fcSRichard Fitzgerald ret = kunit_add_action_or_reset(test, _put_device_wrapper, dsp->dev);
2713*9b33a4fcSRichard Fitzgerald if (ret)
2714*9b33a4fcSRichard Fitzgerald return ret;
2715*9b33a4fcSRichard Fitzgerald
2716*9b33a4fcSRichard Fitzgerald dev_set_drvdata(dsp->dev, priv);
2717*9b33a4fcSRichard Fitzgerald
2718*9b33a4fcSRichard Fitzgerald /* Allocate regmap */
2719*9b33a4fcSRichard Fitzgerald ret = cs_dsp_mock_regmap_init(priv);
2720*9b33a4fcSRichard Fitzgerald if (ret)
2721*9b33a4fcSRichard Fitzgerald return ret;
2722*9b33a4fcSRichard Fitzgerald
2723*9b33a4fcSRichard Fitzgerald /*
2724*9b33a4fcSRichard Fitzgerald * There must always be a XM header with at least 1 algorithm, so create
2725*9b33a4fcSRichard Fitzgerald * a dummy one that tests can use and extract it to a data blob.
2726*9b33a4fcSRichard Fitzgerald */
2727*9b33a4fcSRichard Fitzgerald local->xm_header = cs_dsp_create_mock_xm_header(priv,
2728*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_cache_test_algs,
2729*9b33a4fcSRichard Fitzgerald ARRAY_SIZE(cs_dsp_ctl_cache_test_algs));
2730*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, local->xm_header);
2731*9b33a4fcSRichard Fitzgerald
2732*9b33a4fcSRichard Fitzgerald /* Create wmfw builder */
2733*9b33a4fcSRichard Fitzgerald local->wmfw_builder = _create_dummy_wmfw(test);
2734*9b33a4fcSRichard Fitzgerald
2735*9b33a4fcSRichard Fitzgerald /* Init cs_dsp */
2736*9b33a4fcSRichard Fitzgerald dsp->client_ops = kunit_kzalloc(test, sizeof(*dsp->client_ops), GFP_KERNEL);
2737*9b33a4fcSRichard Fitzgerald KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dsp->client_ops);
2738*9b33a4fcSRichard Fitzgerald
2739*9b33a4fcSRichard Fitzgerald switch (dsp->type) {
2740*9b33a4fcSRichard Fitzgerald case WMFW_ADSP2:
2741*9b33a4fcSRichard Fitzgerald ret = cs_dsp_adsp2_init(dsp);
2742*9b33a4fcSRichard Fitzgerald break;
2743*9b33a4fcSRichard Fitzgerald case WMFW_HALO:
2744*9b33a4fcSRichard Fitzgerald ret = cs_dsp_halo_init(dsp);
2745*9b33a4fcSRichard Fitzgerald break;
2746*9b33a4fcSRichard Fitzgerald default:
2747*9b33a4fcSRichard Fitzgerald KUNIT_FAIL(test, "Untested DSP type %d\n", dsp->type);
2748*9b33a4fcSRichard Fitzgerald return -EINVAL;
2749*9b33a4fcSRichard Fitzgerald }
2750*9b33a4fcSRichard Fitzgerald
2751*9b33a4fcSRichard Fitzgerald if (ret)
2752*9b33a4fcSRichard Fitzgerald return ret;
2753*9b33a4fcSRichard Fitzgerald
2754*9b33a4fcSRichard Fitzgerald /* Automatically call cs_dsp_remove() when test case ends */
2755*9b33a4fcSRichard Fitzgerald return kunit_add_action_or_reset(priv->test, _cs_dsp_remove_wrapper, dsp);
2756*9b33a4fcSRichard Fitzgerald }
2757*9b33a4fcSRichard Fitzgerald
cs_dsp_ctl_cache_test_halo_init(struct kunit * test)2758*9b33a4fcSRichard Fitzgerald static int cs_dsp_ctl_cache_test_halo_init(struct kunit *test)
2759*9b33a4fcSRichard Fitzgerald {
2760*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp;
2761*9b33a4fcSRichard Fitzgerald
2762*9b33a4fcSRichard Fitzgerald /* Fill in cs_dsp and initialize */
2763*9b33a4fcSRichard Fitzgerald dsp = kunit_kzalloc(test, sizeof(*dsp), GFP_KERNEL);
2764*9b33a4fcSRichard Fitzgerald if (!dsp)
2765*9b33a4fcSRichard Fitzgerald return -ENOMEM;
2766*9b33a4fcSRichard Fitzgerald
2767*9b33a4fcSRichard Fitzgerald dsp->num = 1;
2768*9b33a4fcSRichard Fitzgerald dsp->type = WMFW_HALO;
2769*9b33a4fcSRichard Fitzgerald dsp->mem = cs_dsp_mock_halo_dsp1_regions;
2770*9b33a4fcSRichard Fitzgerald dsp->num_mems = cs_dsp_mock_count_regions(cs_dsp_mock_halo_dsp1_region_sizes);
2771*9b33a4fcSRichard Fitzgerald dsp->base = cs_dsp_mock_halo_core_base;
2772*9b33a4fcSRichard Fitzgerald dsp->base_sysinfo = cs_dsp_mock_halo_sysinfo_base;
2773*9b33a4fcSRichard Fitzgerald
2774*9b33a4fcSRichard Fitzgerald return cs_dsp_ctl_cache_test_common_init(test, dsp, 3);
2775*9b33a4fcSRichard Fitzgerald }
2776*9b33a4fcSRichard Fitzgerald
cs_dsp_ctl_cache_test_adsp2_32bit_init(struct kunit * test,int wmfw_ver)2777*9b33a4fcSRichard Fitzgerald static int cs_dsp_ctl_cache_test_adsp2_32bit_init(struct kunit *test, int wmfw_ver)
2778*9b33a4fcSRichard Fitzgerald {
2779*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp;
2780*9b33a4fcSRichard Fitzgerald
2781*9b33a4fcSRichard Fitzgerald /* Fill in cs_dsp and initialize */
2782*9b33a4fcSRichard Fitzgerald dsp = kunit_kzalloc(test, sizeof(*dsp), GFP_KERNEL);
2783*9b33a4fcSRichard Fitzgerald if (!dsp)
2784*9b33a4fcSRichard Fitzgerald return -ENOMEM;
2785*9b33a4fcSRichard Fitzgerald
2786*9b33a4fcSRichard Fitzgerald dsp->num = 1;
2787*9b33a4fcSRichard Fitzgerald dsp->type = WMFW_ADSP2;
2788*9b33a4fcSRichard Fitzgerald dsp->rev = 1;
2789*9b33a4fcSRichard Fitzgerald dsp->mem = cs_dsp_mock_adsp2_32bit_dsp1_regions;
2790*9b33a4fcSRichard Fitzgerald dsp->num_mems = cs_dsp_mock_count_regions(cs_dsp_mock_adsp2_32bit_dsp1_region_sizes);
2791*9b33a4fcSRichard Fitzgerald dsp->base = cs_dsp_mock_adsp2_32bit_sysbase;
2792*9b33a4fcSRichard Fitzgerald
2793*9b33a4fcSRichard Fitzgerald return cs_dsp_ctl_cache_test_common_init(test, dsp, wmfw_ver);
2794*9b33a4fcSRichard Fitzgerald }
2795*9b33a4fcSRichard Fitzgerald
cs_dsp_ctl_cache_test_adsp2_32bit_wmfw1_init(struct kunit * test)2796*9b33a4fcSRichard Fitzgerald static int cs_dsp_ctl_cache_test_adsp2_32bit_wmfw1_init(struct kunit *test)
2797*9b33a4fcSRichard Fitzgerald {
2798*9b33a4fcSRichard Fitzgerald return cs_dsp_ctl_cache_test_adsp2_32bit_init(test, 1);
2799*9b33a4fcSRichard Fitzgerald }
2800*9b33a4fcSRichard Fitzgerald
cs_dsp_ctl_cache_test_adsp2_32bit_wmfw2_init(struct kunit * test)2801*9b33a4fcSRichard Fitzgerald static int cs_dsp_ctl_cache_test_adsp2_32bit_wmfw2_init(struct kunit *test)
2802*9b33a4fcSRichard Fitzgerald {
2803*9b33a4fcSRichard Fitzgerald return cs_dsp_ctl_cache_test_adsp2_32bit_init(test, 2);
2804*9b33a4fcSRichard Fitzgerald }
2805*9b33a4fcSRichard Fitzgerald
cs_dsp_ctl_cache_test_adsp2_16bit_init(struct kunit * test,int wmfw_ver)2806*9b33a4fcSRichard Fitzgerald static int cs_dsp_ctl_cache_test_adsp2_16bit_init(struct kunit *test, int wmfw_ver)
2807*9b33a4fcSRichard Fitzgerald {
2808*9b33a4fcSRichard Fitzgerald struct cs_dsp *dsp;
2809*9b33a4fcSRichard Fitzgerald
2810*9b33a4fcSRichard Fitzgerald /* Fill in cs_dsp and initialize */
2811*9b33a4fcSRichard Fitzgerald dsp = kunit_kzalloc(test, sizeof(*dsp), GFP_KERNEL);
2812*9b33a4fcSRichard Fitzgerald if (!dsp)
2813*9b33a4fcSRichard Fitzgerald return -ENOMEM;
2814*9b33a4fcSRichard Fitzgerald
2815*9b33a4fcSRichard Fitzgerald dsp->num = 1;
2816*9b33a4fcSRichard Fitzgerald dsp->type = WMFW_ADSP2;
2817*9b33a4fcSRichard Fitzgerald dsp->rev = 0;
2818*9b33a4fcSRichard Fitzgerald dsp->mem = cs_dsp_mock_adsp2_16bit_dsp1_regions;
2819*9b33a4fcSRichard Fitzgerald dsp->num_mems = cs_dsp_mock_count_regions(cs_dsp_mock_adsp2_16bit_dsp1_region_sizes);
2820*9b33a4fcSRichard Fitzgerald dsp->base = cs_dsp_mock_adsp2_16bit_sysbase;
2821*9b33a4fcSRichard Fitzgerald
2822*9b33a4fcSRichard Fitzgerald return cs_dsp_ctl_cache_test_common_init(test, dsp, wmfw_ver);
2823*9b33a4fcSRichard Fitzgerald }
2824*9b33a4fcSRichard Fitzgerald
cs_dsp_ctl_cache_test_adsp2_16bit_wmfw1_init(struct kunit * test)2825*9b33a4fcSRichard Fitzgerald static int cs_dsp_ctl_cache_test_adsp2_16bit_wmfw1_init(struct kunit *test)
2826*9b33a4fcSRichard Fitzgerald {
2827*9b33a4fcSRichard Fitzgerald return cs_dsp_ctl_cache_test_adsp2_16bit_init(test, 1);
2828*9b33a4fcSRichard Fitzgerald }
2829*9b33a4fcSRichard Fitzgerald
cs_dsp_ctl_cache_test_adsp2_16bit_wmfw2_init(struct kunit * test)2830*9b33a4fcSRichard Fitzgerald static int cs_dsp_ctl_cache_test_adsp2_16bit_wmfw2_init(struct kunit *test)
2831*9b33a4fcSRichard Fitzgerald {
2832*9b33a4fcSRichard Fitzgerald return cs_dsp_ctl_cache_test_adsp2_16bit_init(test, 2);
2833*9b33a4fcSRichard Fitzgerald }
2834*9b33a4fcSRichard Fitzgerald
cs_dsp_ctl_all_param_desc(const struct cs_dsp_ctl_cache_test_param * param,char * desc)2835*9b33a4fcSRichard Fitzgerald static void cs_dsp_ctl_all_param_desc(const struct cs_dsp_ctl_cache_test_param *param,
2836*9b33a4fcSRichard Fitzgerald char *desc)
2837*9b33a4fcSRichard Fitzgerald {
2838*9b33a4fcSRichard Fitzgerald snprintf(desc, KUNIT_PARAM_DESC_SIZE, "alg:%#x %s@%u len:%u flags:%#x",
2839*9b33a4fcSRichard Fitzgerald param->alg_id, cs_dsp_mem_region_name(param->mem_type),
2840*9b33a4fcSRichard Fitzgerald param->offs_words, param->len_bytes, param->flags);
2841*9b33a4fcSRichard Fitzgerald }
2842*9b33a4fcSRichard Fitzgerald
2843*9b33a4fcSRichard Fitzgerald /* All parameters populated, with various lengths */
2844*9b33a4fcSRichard Fitzgerald static const struct cs_dsp_ctl_cache_test_param all_pop_varying_len_cases[] = {
2845*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4 },
2846*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 8 },
2847*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 12 },
2848*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 16 },
2849*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 48 },
2850*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 100 },
2851*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 512 },
2852*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 1000 },
2853*9b33a4fcSRichard Fitzgerald };
2854*9b33a4fcSRichard Fitzgerald KUNIT_ARRAY_PARAM(all_pop_varying_len, all_pop_varying_len_cases,
2855*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_all_param_desc);
2856*9b33a4fcSRichard Fitzgerald
2857*9b33a4fcSRichard Fitzgerald /* All parameters populated, with various offsets */
2858*9b33a4fcSRichard Fitzgerald static const struct cs_dsp_ctl_cache_test_param all_pop_varying_offset_cases[] = {
2859*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 0, .len_bytes = 4 },
2860*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4 },
2861*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 2, .len_bytes = 4 },
2862*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 3, .len_bytes = 4 },
2863*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 8, .len_bytes = 4 },
2864*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 10, .len_bytes = 4 },
2865*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 128, .len_bytes = 4 },
2866*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 180, .len_bytes = 4 },
2867*9b33a4fcSRichard Fitzgerald };
2868*9b33a4fcSRichard Fitzgerald KUNIT_ARRAY_PARAM(all_pop_varying_offset, all_pop_varying_offset_cases,
2869*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_all_param_desc);
2870*9b33a4fcSRichard Fitzgerald
2871*9b33a4fcSRichard Fitzgerald /* All parameters populated, with various X and Y memory regions */
2872*9b33a4fcSRichard Fitzgerald static const struct cs_dsp_ctl_cache_test_param all_pop_varying_xy_cases[] = {
2873*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_XM, .offs_words = 1, .len_bytes = 4 },
2874*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4 },
2875*9b33a4fcSRichard Fitzgerald };
2876*9b33a4fcSRichard Fitzgerald KUNIT_ARRAY_PARAM(all_pop_varying_xy, all_pop_varying_xy_cases,
2877*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_all_param_desc);
2878*9b33a4fcSRichard Fitzgerald
2879*9b33a4fcSRichard Fitzgerald /* All parameters populated, using ZM */
2880*9b33a4fcSRichard Fitzgerald static const struct cs_dsp_ctl_cache_test_param all_pop_z_cases[] = {
2881*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_ZM, .offs_words = 1, .len_bytes = 4 },
2882*9b33a4fcSRichard Fitzgerald };
2883*9b33a4fcSRichard Fitzgerald KUNIT_ARRAY_PARAM(all_pop_z, all_pop_z_cases, cs_dsp_ctl_all_param_desc);
2884*9b33a4fcSRichard Fitzgerald
2885*9b33a4fcSRichard Fitzgerald /* All parameters populated, with various algorithm ids */
2886*9b33a4fcSRichard Fitzgerald static const struct cs_dsp_ctl_cache_test_param all_pop_varying_alg_cases[] = {
2887*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4 },
2888*9b33a4fcSRichard Fitzgerald { .alg_id = 0xb, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4 },
2889*9b33a4fcSRichard Fitzgerald { .alg_id = 0x9f1234, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4 },
2890*9b33a4fcSRichard Fitzgerald { .alg_id = 0xff00ff, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4 },
2891*9b33a4fcSRichard Fitzgerald };
2892*9b33a4fcSRichard Fitzgerald KUNIT_ARRAY_PARAM(all_pop_varying_alg, all_pop_varying_alg_cases,
2893*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_all_param_desc);
2894*9b33a4fcSRichard Fitzgerald
2895*9b33a4fcSRichard Fitzgerald /*
2896*9b33a4fcSRichard Fitzgerald * All parameters populated, with all combinations of flags for a
2897*9b33a4fcSRichard Fitzgerald * non-volatile readable control
2898*9b33a4fcSRichard Fitzgerald */
2899*9b33a4fcSRichard Fitzgerald static const struct cs_dsp_ctl_cache_test_param all_pop_nonvol_readable_flags_cases[] = {
2900*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2901*9b33a4fcSRichard Fitzgerald .flags = 0
2902*9b33a4fcSRichard Fitzgerald },
2903*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2904*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_READABLE,
2905*9b33a4fcSRichard Fitzgerald },
2906*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2907*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_READABLE | WMFW_CTL_FLAG_WRITEABLE,
2908*9b33a4fcSRichard Fitzgerald },
2909*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2910*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_SYS | WMFW_CTL_FLAG_READABLE,
2911*9b33a4fcSRichard Fitzgerald },
2912*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2913*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_SYS | WMFW_CTL_FLAG_READABLE | WMFW_CTL_FLAG_WRITEABLE,
2914*9b33a4fcSRichard Fitzgerald },
2915*9b33a4fcSRichard Fitzgerald };
2916*9b33a4fcSRichard Fitzgerald KUNIT_ARRAY_PARAM(all_pop_nonvol_readable_flags,
2917*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_cases,
2918*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_all_param_desc);
2919*9b33a4fcSRichard Fitzgerald
2920*9b33a4fcSRichard Fitzgerald /*
2921*9b33a4fcSRichard Fitzgerald * All parameters populated, with all combinations of flags for a
2922*9b33a4fcSRichard Fitzgerald * non-volatile readable control, except flags==0
2923*9b33a4fcSRichard Fitzgerald */
2924*9b33a4fcSRichard Fitzgerald static const struct cs_dsp_ctl_cache_test_param all_pop_nonvol_readable_nonzero_flags_cases[] = {
2925*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2926*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_READABLE,
2927*9b33a4fcSRichard Fitzgerald },
2928*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2929*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_READABLE | WMFW_CTL_FLAG_WRITEABLE,
2930*9b33a4fcSRichard Fitzgerald },
2931*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2932*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_SYS | WMFW_CTL_FLAG_READABLE,
2933*9b33a4fcSRichard Fitzgerald },
2934*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2935*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_SYS | WMFW_CTL_FLAG_READABLE | WMFW_CTL_FLAG_WRITEABLE,
2936*9b33a4fcSRichard Fitzgerald },
2937*9b33a4fcSRichard Fitzgerald };
2938*9b33a4fcSRichard Fitzgerald KUNIT_ARRAY_PARAM(all_pop_nonvol_readable_nonzero_flags,
2939*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_nonzero_flags_cases,
2940*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_all_param_desc);
2941*9b33a4fcSRichard Fitzgerald
2942*9b33a4fcSRichard Fitzgerald /*
2943*9b33a4fcSRichard Fitzgerald * All parameters populated, with all combinations of flags for a
2944*9b33a4fcSRichard Fitzgerald * non-volatile writeable control
2945*9b33a4fcSRichard Fitzgerald */
2946*9b33a4fcSRichard Fitzgerald static const struct cs_dsp_ctl_cache_test_param all_pop_nonvol_writeable_flags_cases[] = {
2947*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2948*9b33a4fcSRichard Fitzgerald .flags = 0
2949*9b33a4fcSRichard Fitzgerald },
2950*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2951*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_WRITEABLE,
2952*9b33a4fcSRichard Fitzgerald },
2953*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2954*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_READABLE | WMFW_CTL_FLAG_WRITEABLE,
2955*9b33a4fcSRichard Fitzgerald },
2956*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2957*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_SYS | WMFW_CTL_FLAG_WRITEABLE,
2958*9b33a4fcSRichard Fitzgerald },
2959*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2960*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_SYS | WMFW_CTL_FLAG_READABLE | WMFW_CTL_FLAG_WRITEABLE,
2961*9b33a4fcSRichard Fitzgerald },
2962*9b33a4fcSRichard Fitzgerald };
2963*9b33a4fcSRichard Fitzgerald KUNIT_ARRAY_PARAM(all_pop_nonvol_writeable_flags,
2964*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_cases,
2965*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_all_param_desc);
2966*9b33a4fcSRichard Fitzgerald
2967*9b33a4fcSRichard Fitzgerald /*
2968*9b33a4fcSRichard Fitzgerald * All parameters populated, with all combinations of flags for a
2969*9b33a4fcSRichard Fitzgerald * non-volatile write-only control of varying lengths
2970*9b33a4fcSRichard Fitzgerald */
2971*9b33a4fcSRichard Fitzgerald static const struct cs_dsp_ctl_cache_test_param all_pop_nonvol_write_only_length_cases[] = {
2972*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2973*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_WRITEABLE,
2974*9b33a4fcSRichard Fitzgerald },
2975*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 512,
2976*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_WRITEABLE,
2977*9b33a4fcSRichard Fitzgerald },
2978*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 4,
2979*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_SYS | WMFW_CTL_FLAG_WRITEABLE,
2980*9b33a4fcSRichard Fitzgerald },
2981*9b33a4fcSRichard Fitzgerald { .alg_id = 0xfafa, .mem_type = WMFW_ADSP2_YM, .offs_words = 1, .len_bytes = 512,
2982*9b33a4fcSRichard Fitzgerald .flags = WMFW_CTL_FLAG_SYS | WMFW_CTL_FLAG_WRITEABLE,
2983*9b33a4fcSRichard Fitzgerald },
2984*9b33a4fcSRichard Fitzgerald };
2985*9b33a4fcSRichard Fitzgerald KUNIT_ARRAY_PARAM(all_pop_nonvol_write_only_length,
2986*9b33a4fcSRichard Fitzgerald all_pop_nonvol_write_only_length_cases,
2987*9b33a4fcSRichard Fitzgerald cs_dsp_ctl_all_param_desc);
2988*9b33a4fcSRichard Fitzgerald
2989*9b33a4fcSRichard Fitzgerald static struct kunit_case cs_dsp_ctl_cache_test_cases_v1[] = {
2990*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_varying_len_gen_params),
2991*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_varying_offset_gen_params),
2992*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_varying_xy_gen_params),
2993*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_z_gen_params),
2994*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_varying_alg_gen_params),
2995*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_nonvol_readable_flags_gen_params),
2996*9b33a4fcSRichard Fitzgerald
2997*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init_write_only,
2998*9b33a4fcSRichard Fitzgerald all_pop_nonvol_write_only_length_gen_params),
2999*9b33a4fcSRichard Fitzgerald
3000*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_fw_same_controls),
3001*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_fwalgid_same_controls),
3002*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_mems),
3003*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_algs),
3004*9b33a4fcSRichard Fitzgerald
3005*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_not_started,
3006*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3007*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_stopped,
3008*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3009*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_powered_down,
3010*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3011*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_stopped_powered_down,
3012*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3013*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_not_current_loaded_fw,
3014*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3015*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_not_current_running_fw,
3016*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3017*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_running,
3018*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_nonzero_flags_gen_params),
3019*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_running_zero_flags,
3020*9b33a4fcSRichard Fitzgerald all_pop_varying_len_gen_params),
3021*9b33a4fcSRichard Fitzgerald
3022*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_varying_len_gen_params),
3023*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_varying_offset_gen_params),
3024*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_varying_xy_gen_params),
3025*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_z_gen_params),
3026*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_varying_alg_gen_params),
3027*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_nonvol_writeable_flags_gen_params),
3028*9b33a4fcSRichard Fitzgerald
3029*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3030*9b33a4fcSRichard Fitzgerald all_pop_varying_len_gen_params),
3031*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3032*9b33a4fcSRichard Fitzgerald all_pop_varying_offset_gen_params),
3033*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3034*9b33a4fcSRichard Fitzgerald all_pop_varying_xy_gen_params),
3035*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3036*9b33a4fcSRichard Fitzgerald all_pop_z_gen_params),
3037*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3038*9b33a4fcSRichard Fitzgerald all_pop_varying_alg_gen_params),
3039*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3040*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3041*9b33a4fcSRichard Fitzgerald
3042*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_unchanged_not_started,
3043*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3044*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_not_started,
3045*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3046*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_stopped,
3047*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3048*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_powered_down,
3049*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3050*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_stopped_powered_down,
3051*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3052*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_not_current_loaded_fw,
3053*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3054*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_not_current_running_fw,
3055*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3056*9b33a4fcSRichard Fitzgerald
3057*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_write_before_run,
3058*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3059*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_write_while_running,
3060*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3061*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_write_after_stop,
3062*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3063*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_write_not_current_fw,
3064*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3065*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_reapply_every_run,
3066*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3067*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_reapply_after_fw_reload,
3068*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3069*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_reapply_after_fw_swap,
3070*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3071*9b33a4fcSRichard Fitzgerald
3072*9b33a4fcSRichard Fitzgerald { } /* terminator */
3073*9b33a4fcSRichard Fitzgerald };
3074*9b33a4fcSRichard Fitzgerald
3075*9b33a4fcSRichard Fitzgerald static struct kunit_case cs_dsp_ctl_cache_test_cases_v2[] = {
3076*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_v2_cache_alloc),
3077*9b33a4fcSRichard Fitzgerald
3078*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_varying_len_gen_params),
3079*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_varying_offset_gen_params),
3080*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_varying_xy_gen_params),
3081*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_z_gen_params),
3082*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_varying_alg_gen_params),
3083*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_nonvol_readable_flags_gen_params),
3084*9b33a4fcSRichard Fitzgerald
3085*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init_write_only,
3086*9b33a4fcSRichard Fitzgerald all_pop_nonvol_write_only_length_gen_params),
3087*9b33a4fcSRichard Fitzgerald
3088*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_fw_same_controls),
3089*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_fwalgid_same_controls),
3090*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_mems),
3091*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_algs),
3092*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_offsets),
3093*9b33a4fcSRichard Fitzgerald
3094*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_not_started,
3095*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3096*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_stopped,
3097*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3098*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_powered_down,
3099*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3100*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_stopped_powered_down,
3101*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3102*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_not_current_loaded_fw,
3103*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3104*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_not_current_running_fw,
3105*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3106*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_running,
3107*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_nonzero_flags_gen_params),
3108*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_running_zero_flags,
3109*9b33a4fcSRichard Fitzgerald all_pop_varying_len_gen_params),
3110*9b33a4fcSRichard Fitzgerald
3111*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_varying_len_gen_params),
3112*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_varying_offset_gen_params),
3113*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_varying_xy_gen_params),
3114*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_z_gen_params),
3115*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_varying_alg_gen_params),
3116*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_nonvol_writeable_flags_gen_params),
3117*9b33a4fcSRichard Fitzgerald
3118*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3119*9b33a4fcSRichard Fitzgerald all_pop_varying_len_gen_params),
3120*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3121*9b33a4fcSRichard Fitzgerald all_pop_varying_offset_gen_params),
3122*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3123*9b33a4fcSRichard Fitzgerald all_pop_varying_xy_gen_params),
3124*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3125*9b33a4fcSRichard Fitzgerald all_pop_z_gen_params),
3126*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3127*9b33a4fcSRichard Fitzgerald all_pop_varying_alg_gen_params),
3128*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3129*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3130*9b33a4fcSRichard Fitzgerald
3131*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_unchanged_not_started,
3132*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3133*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_not_started,
3134*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3135*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_stopped,
3136*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3137*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_powered_down,
3138*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3139*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_stopped_powered_down,
3140*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3141*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_not_current_loaded_fw,
3142*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3143*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_not_current_running_fw,
3144*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3145*9b33a4fcSRichard Fitzgerald
3146*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_write_before_run,
3147*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3148*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_write_while_running,
3149*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3150*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_write_after_stop,
3151*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3152*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_write_not_current_fw,
3153*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3154*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_reapply_every_run,
3155*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3156*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_reapply_after_fw_reload,
3157*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3158*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_reapply_after_fw_swap,
3159*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3160*9b33a4fcSRichard Fitzgerald
3161*9b33a4fcSRichard Fitzgerald { } /* terminator */
3162*9b33a4fcSRichard Fitzgerald };
3163*9b33a4fcSRichard Fitzgerald
3164*9b33a4fcSRichard Fitzgerald static struct kunit_case cs_dsp_ctl_cache_test_cases_v3[] = {
3165*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_v2_cache_alloc),
3166*9b33a4fcSRichard Fitzgerald
3167*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_varying_len_gen_params),
3168*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_varying_offset_gen_params),
3169*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_varying_xy_gen_params),
3170*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_varying_alg_gen_params),
3171*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init, all_pop_nonvol_readable_flags_gen_params),
3172*9b33a4fcSRichard Fitzgerald
3173*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_init_write_only,
3174*9b33a4fcSRichard Fitzgerald all_pop_nonvol_write_only_length_gen_params),
3175*9b33a4fcSRichard Fitzgerald
3176*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_fw_same_controls),
3177*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_fwalgid_same_controls),
3178*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_mems),
3179*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_algs),
3180*9b33a4fcSRichard Fitzgerald KUNIT_CASE(cs_dsp_ctl_cache_init_multiple_offsets),
3181*9b33a4fcSRichard Fitzgerald
3182*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_not_started,
3183*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3184*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_stopped,
3185*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3186*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_powered_down,
3187*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3188*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_stopped_powered_down,
3189*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3190*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_not_current_loaded_fw,
3191*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3192*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_not_current_running_fw,
3193*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_flags_gen_params),
3194*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_read_running,
3195*9b33a4fcSRichard Fitzgerald all_pop_nonvol_readable_nonzero_flags_gen_params),
3196*9b33a4fcSRichard Fitzgerald
3197*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_varying_len_gen_params),
3198*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_varying_offset_gen_params),
3199*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_varying_xy_gen_params),
3200*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_varying_alg_gen_params),
3201*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough, all_pop_nonvol_writeable_flags_gen_params),
3202*9b33a4fcSRichard Fitzgerald
3203*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3204*9b33a4fcSRichard Fitzgerald all_pop_varying_len_gen_params),
3205*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3206*9b33a4fcSRichard Fitzgerald all_pop_varying_offset_gen_params),
3207*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3208*9b33a4fcSRichard Fitzgerald all_pop_varying_xy_gen_params),
3209*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3210*9b33a4fcSRichard Fitzgerald all_pop_varying_alg_gen_params),
3211*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_writethrough_unchanged,
3212*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3213*9b33a4fcSRichard Fitzgerald
3214*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_unchanged_not_started,
3215*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3216*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_not_started,
3217*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3218*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_stopped,
3219*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3220*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_powered_down,
3221*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3222*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_stopped_powered_down,
3223*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3224*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_not_current_loaded_fw,
3225*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3226*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_write_not_current_running_fw,
3227*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3228*9b33a4fcSRichard Fitzgerald
3229*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_write_before_run,
3230*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3231*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_write_while_running,
3232*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3233*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_write_after_stop,
3234*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3235*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_write_not_current_fw,
3236*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3237*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_reapply_every_run,
3238*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3239*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_reapply_after_fw_reload,
3240*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3241*9b33a4fcSRichard Fitzgerald KUNIT_CASE_PARAM(cs_dsp_ctl_cache_sync_reapply_after_fw_swap,
3242*9b33a4fcSRichard Fitzgerald all_pop_nonvol_writeable_flags_gen_params),
3243*9b33a4fcSRichard Fitzgerald
3244*9b33a4fcSRichard Fitzgerald { } /* terminator */
3245*9b33a4fcSRichard Fitzgerald };
3246*9b33a4fcSRichard Fitzgerald
3247*9b33a4fcSRichard Fitzgerald static struct kunit_suite cs_dsp_ctl_cache_test_halo = {
3248*9b33a4fcSRichard Fitzgerald .name = "cs_dsp_ctl_cache_wmfwV3_halo",
3249*9b33a4fcSRichard Fitzgerald .init = cs_dsp_ctl_cache_test_halo_init,
3250*9b33a4fcSRichard Fitzgerald .test_cases = cs_dsp_ctl_cache_test_cases_v3,
3251*9b33a4fcSRichard Fitzgerald };
3252*9b33a4fcSRichard Fitzgerald
3253*9b33a4fcSRichard Fitzgerald static struct kunit_suite cs_dsp_ctl_cache_test_adsp2_32bit_wmfw1 = {
3254*9b33a4fcSRichard Fitzgerald .name = "cs_dsp_ctl_cache_wmfwV1_adsp2_32bit",
3255*9b33a4fcSRichard Fitzgerald .init = cs_dsp_ctl_cache_test_adsp2_32bit_wmfw1_init,
3256*9b33a4fcSRichard Fitzgerald .test_cases = cs_dsp_ctl_cache_test_cases_v1,
3257*9b33a4fcSRichard Fitzgerald };
3258*9b33a4fcSRichard Fitzgerald
3259*9b33a4fcSRichard Fitzgerald static struct kunit_suite cs_dsp_ctl_cache_test_adsp2_32bit_wmfw2 = {
3260*9b33a4fcSRichard Fitzgerald .name = "cs_dsp_ctl_cache_wmfwV2_adsp2_32bit",
3261*9b33a4fcSRichard Fitzgerald .init = cs_dsp_ctl_cache_test_adsp2_32bit_wmfw2_init,
3262*9b33a4fcSRichard Fitzgerald .test_cases = cs_dsp_ctl_cache_test_cases_v2,
3263*9b33a4fcSRichard Fitzgerald };
3264*9b33a4fcSRichard Fitzgerald
3265*9b33a4fcSRichard Fitzgerald static struct kunit_suite cs_dsp_ctl_cache_test_adsp2_16bit_wmfw1 = {
3266*9b33a4fcSRichard Fitzgerald .name = "cs_dsp_ctl_cache_wmfwV1_adsp2_16bit",
3267*9b33a4fcSRichard Fitzgerald .init = cs_dsp_ctl_cache_test_adsp2_16bit_wmfw1_init,
3268*9b33a4fcSRichard Fitzgerald .test_cases = cs_dsp_ctl_cache_test_cases_v1,
3269*9b33a4fcSRichard Fitzgerald };
3270*9b33a4fcSRichard Fitzgerald
3271*9b33a4fcSRichard Fitzgerald static struct kunit_suite cs_dsp_ctl_cache_test_adsp2_16bit_wmfw2 = {
3272*9b33a4fcSRichard Fitzgerald .name = "cs_dsp_ctl_cache_wmfwV2_adsp2_16bit",
3273*9b33a4fcSRichard Fitzgerald .init = cs_dsp_ctl_cache_test_adsp2_16bit_wmfw2_init,
3274*9b33a4fcSRichard Fitzgerald .test_cases = cs_dsp_ctl_cache_test_cases_v2,
3275*9b33a4fcSRichard Fitzgerald };
3276*9b33a4fcSRichard Fitzgerald
3277*9b33a4fcSRichard Fitzgerald kunit_test_suites(&cs_dsp_ctl_cache_test_halo,
3278*9b33a4fcSRichard Fitzgerald &cs_dsp_ctl_cache_test_adsp2_32bit_wmfw1,
3279*9b33a4fcSRichard Fitzgerald &cs_dsp_ctl_cache_test_adsp2_32bit_wmfw2,
3280*9b33a4fcSRichard Fitzgerald &cs_dsp_ctl_cache_test_adsp2_16bit_wmfw1,
3281*9b33a4fcSRichard Fitzgerald &cs_dsp_ctl_cache_test_adsp2_16bit_wmfw2);
3282