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/linux/lib/zlib_inflate/
H A Dinffixed.h1 /* inffixed.h -- table for decoding fixed codes
11 {96,7,0},{0,8,80},{0,8,16},{20,8,115},{18,7,31},{0,8,112},{0,8,48},
12 {0,9,192},{16,7,10},{0,8,96},{0,8,32},{0,9,160},{0,8,0},{0,8,128},
13 {0,8,64},{0,9,224},{16,7,6},{0,8,88},{0,8,24},{0,9,144},{19,7,59},
14 {0,8,120},{0,8,56},{0,9,208},{17,7,17},{0,8,104},{0,8,40},{0,9,176},
15 {0,8,8},{0,8,136},{0,8,72},{0,9,240},{16,7,4},{0,8,84},{0,8,20},
16 {21,8,227},{19,7,43},{0,8,116},{0,8,52},{0,9,200},{17,7,13},{0,8,100},
17 {0,8,36},{0,9,168},{0,8,4},{0,8,132},{0,8,68},{0,9,232},{16,7,8},
18 {0,8,92},{0,8,28},{0,9,152},{20,7,83},{0,8,124},{0,8,60},{0,9,216},
19 {18,7,23},{0,8,108},{0,8,44},{0,9,184},{0,8,12},{0,8,140},{0,8,76},
[all …]
/linux/arch/powerpc/boot/
H A Dwii-head.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * arch/powerpc/boot/wii-head.S
6 * Copyright (C) 2008-2009 The GameCube Linux Team
14 * - if the data and instruction caches are enabled or not
15 * - if the MMU is enabled or not
16 * - if the high BATs are enabled or not
28 mfmsr 9
29 rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
32 mflr 8
33 clrlwi 8, 8, 3 /* convert to a real address */
[all …]
H A Dgamecube-head.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * arch/powerpc/boot/gamecube-head.S
6 * Copyright (C) 2004-2009 The GameCube Linux Team
14 * - if the data and instruction caches are enabled or not
15 * - if the MMU is enabled or not
27 mfmsr 9
28 rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
31 mflr 8
32 clrlwi 8, 8, 3 /* convert to a real address */
33 addi 8, 8, _mmu_off - 1b
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Dintel_qp_tables.c1 // SPDX-License-Identifier: MIT
65 { 9, 9, 9, 9, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 5,
67 { 14, 14, 13, 13, 12, 12, 12, 12, 11, 11, 10, 10, 10, 10, 9, 9, 9, 8, 8,
68 8, 7, 7, 7, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3 }
76 { 8, 7, 7, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 2, 2, 1, 1, 1, 1, 1,
78 { 8, 8, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 4, 3, 3, 2, 2, 2, 2, 2,
80 { 9, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 5, 4, 4, 3, 2, 2, 2, 2, 2,
82 { 9, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 5, 4, 4, 3, 3, 3, 3, 3,
84 { 9, 9, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 5, 4, 4, 3, 3, 3, 3, 3,
86 { 10, 10, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 6, 5, 5, 4, 4, 4, 4, 3,
[all …]
/linux/lib/crypto/powerpc/
H A Dcurve25519-ppc64le_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 # [1] https://github.com/dot-asm/cryptogams/
11 # Copyright (c) 2006-2017, CRYPTOGAMS by <appro@openssl.org>
58 # - Added x25519_fe51_sqr_times, x25519_fe51_frombytes, x25519_fe51_tobytes
61 # Copyright 2024- IBM Corp.
63 # X25519 lower-level primitives for PPC64.
73 stdu 1,-144(1)
88 ld 8,8(4)
89 ld 9,16(4)
96 mulld 24,8,6
[all …]
H A Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
26 # to 9 vectors for multiplications.
56 #include <asm/asm-offsets.h>
57 #include <asm/asm-compat.h>
[all …]
H A Dchacha-p10le-8x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # do rounds, 8 quarter rounds
13 # 3. a += b; d ^= a; d <<<= 8;
18 # row1 = (row1 + row2), row4 = row1 xor row4, row4 rotate each word by 8
40 #include <asm/asm-offsets.h>
41 #include <asm/asm-compat.h>
78 stdu 1,-752(1)
99 addi 9, 1, 256
100 SAVE_VRS 20, 0, 9
[all …]
/linux/lib/crypto/arm/
H A Dsha1-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * sha1-ce-core.S - SHA-1 secure hash using ARMv8 Crypto Extensions
13 .arch armv8-a
14 .fpu crypto-neon-fp-armv8
68 vld1.32 {k0-k1}, [ip, :128]!
69 vld1.32 {k2-k3}, [ip, :128]
76 0: vld1.32 {q8-q9}, [r1]!
77 vld1.32 {q10-q11}, [r1]!
81 vrev32.8 q8, q8
82 vrev32.8 q9, q9
[all …]
/linux/include/dt-bindings/memory/
H A Dmt8186-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
15 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
18 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
22 * modules dma-address-region larbs-ports
24 * vcodec 4G ~ 8G larb4/7
25 * cam/mdp 8G ~ 12G the other larbs.
27 * CCU0 0x24000_0000 ~ 0x243ff_ffff larb13: port 9/10
32 /* LARB 0 -- MMSYS */
38 /* LARB 1 -- MMSYS */
[all …]
H A Dmt8195-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <dt-bindings/memory/mtk-memory-port.h>
13 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
16 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
20 * modules dma-address-region larbs-ports
22 * vcodec 4G ~ 8G larb19/20/21/22/23/24
23 * cam/mdp 8G ~ 12G the other larbs.
29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
30 * iommu-vpp: larb1/3/4/6/8/12/14/16/18/20/22/23/26/27
95 #define M4U_PORT_L8_IMG_WPE_RDMA0 MTK_M4U_ID(8, 0)
[all …]
H A Dmediatek,mt6893-memory-port.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
10 #include <dt-bindings/memory/mtk-memory-port.h>
17 * modules dma-address-region larbs-ports
19 * vcodec 4G ~ 8G larb4/5/7
20 * cam/mdp 8G ~ 12G larb9/11/13/14/16/17/18/19/20
21 * CCU0 0x4000_0000 ~ 0x43ff_ffff larb13: port 9/10
24 * larb3/6/8/10/12/15 are null.
36 #define M4U_PORT_L0_OVL_RDMA1_SYSRAM MTK_M4U_DOM_ID(0, 8)
37 #define M4U_PORT_L0_OVL_2L_RDMA0_SYSRAM MTK_M4U_DOM_ID(0, 9)
53 #define M4U_PORT_L1_OVL_RDMA0_SYSRAM MTK_M4U_DOM_ID(1, 8)
[all …]
/linux/drivers/clk/renesas/
H A Dr9a09g047-cpg.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/renesas,r9a09g047-cpg.h>
15 #include "rzv2h-cpg.h"
73 {3, 8},
86 {2, 8},
94 {2, 8},
142 DEF_FIXED(".pllcln_div8", CLK_PLLCLN_DIV8, CLK_PLLCLN, 1, 8),
149 DEF_FIXED(".plldty_div8", CLK_PLLDTY_DIV8, CLK_PLLDTY, 1, 8),
190 BUS_MSTOP(5, BIT(9))),
[all …]
H A Dr9a09g056-cpg.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/renesas,r9a09g056-cpg.h>
15 #include "rzv2h-cpg.h"
68 {3, 8},
75 {2, 8},
83 {2, 8},
130 DEF_FIXED(".pllcln_div8", CLK_PLLCLN_DIV8, CLK_PLLCLN, 1, 8),
136 DEF_FIXED(".plldty_div8", CLK_PLLDTY_DIV8, CLK_PLLDTY, 1, 8),
184 DEF_MOD("gtm_5_pclk", CLK_PLLCLN_DIV16, 4, 8, 2, 8,
[all …]
H A Dr9a09g057-cpg.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
15 #include "rzv2h-cpg.h"
76 {3, 8},
89 {2, 8},
97 {2, 8},
145 DEF_FIXED(".pllcln_div8", CLK_PLLCLN_DIV8, CLK_PLLCLN, 1, 8),
151 DEF_FIXED(".plldty_div8", CLK_PLLDTY_DIV8, CLK_PLLDTY, 1, 8),
197 BUS_MSTOP(5, BIT(9))),
[all …]
/linux/drivers/staging/media/ipu3/
H A Dipu3-tables.c1 // SPDX-License-Identifier: GPL-2.0
4 #include "ipu3-tables.h"
25 { 0, 0, 122, 7, 7, -1, 0 },
26 { 0, -3, 122, 7, 10, -1, 0 },
27 { 0, -5, 121, 7, 14, -2, 0 },
28 { 0, -7, 120, 7, 18, -3, 0 },
29 { 0, -9, 118, 7, 23, -4, 0 },
30 { 0, -11, 116, 7, 27, -4, 0 },
31 { 0, -12, 113, 7, 32, -5, 0 },
32 { 0, -13, 110, 7, 37, -6, 0 },
[all …]
/linux/lib/crypto/arm64/
H A Dsha1-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * sha1-ce-core.S - SHA-1 secure hash using ARMv8 Crypto Extensions
12 .arch armv8-a+crypto
80 0: ld1 {v8.4s-v11.4s}, [x1], #64
91 add_update c, ev, k0, 8, 9, 10, 11, dgb
92 add_update c, od, k0, 9, 10, 11, 8
93 add_update c, ev, k0, 10, 11, 8, 9
94 add_update c, od, k0, 11, 8, 9, 10
95 add_update c, ev, k1, 8, 9, 10, 11
97 add_update p, od, k1, 9, 10, 11, 8
[all …]
/linux/tools/arch/arm64/include/asm/
H A Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
34 #define CRm_shift 8
68 (((x) << 8) & 0x00ff0000) | \
[all …]
/linux/tools/perf/pmu-events/arch/x86/pantherlake/
H A Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7,8,9",
8 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
15 "Counter": "0,1,2,3,4,5,6,7,8,9",
26 "Counter": "0,1,2,3,4,5,6,7,8,9",
36 "Counter": "0,1,2,3,4,5,6,7,8,9",
54 "Counter": "0,1,2,3,4,5,6,7,8,9",
63 "Counter": "0,1,2,3,4,5,6,7,8,9",
83 "Counter": "0,1,2,3,4,5,6,7,8,9",
93 "Counter": "0,1,2,3,4,5,6,7,8,9",
103 "Counter": "0,1,2,3,4,5,6,7,8,9",
[all …]
H A Dfrontend.json14 "Counter": "0,1,2,3,4,5,6,7,8,9",
17 …"PublicDescription": "Number of times the front-end is resteered when it finds a branch instructio…
60 "Counter": "0,1,2,3,4,5,6,7,8,9",
63 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length …
70 "Counter": "0,1,2,3,4,5,6,7,8,9",
78 "BriefDescription": "DSB-to-MITE switch true penalty cycles.",
79 "Counter": "0,1,2,3,4,5,6,7,8,9",
82 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou…
89 "Counter": "0,1,2,3,4,5,6,7,8,9",
101 "Counter": "0,1,2,3,4,5,6,7,8,9",
[all …]
/linux/include/linux/mfd/wm831x/
H A Dregulator.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/mfd/wm831x/regulator.h -- Regulator definitons for wm831x
14 * R16462 (0x404E) - Current Sink 1
28 #define WM831X_CS1_OFF_RAMP_MASK 0x0C00 /* CS1_OFF_RAMP - [11:10] */
29 #define WM831X_CS1_OFF_RAMP_SHIFT 10 /* CS1_OFF_RAMP - [11:10] */
30 #define WM831X_CS1_OFF_RAMP_WIDTH 2 /* CS1_OFF_RAMP - [11:10] */
31 #define WM831X_CS1_ON_RAMP_MASK 0x0300 /* CS1_ON_RAMP - [9:8] */
32 #define WM831X_CS1_ON_RAMP_SHIFT 8 /* CS1_ON_RAMP - [9:8] */
33 #define WM831X_CS1_ON_RAMP_WIDTH 2 /* CS1_ON_RAMP - [9:8] */
34 #define WM831X_CS1_ISEL_MASK 0x003F /* CS1_ISEL - [5:0] */
[all …]
/linux/arch/mips/kernel/
H A Dmips-r2-to-r6-emul.c28 #include <asm/mips-r2-to-r6-emul.h>
55 extern const unsigned int fpucondbit[8];
65 pr_info("MIPS R2-to-R6 Emulator Enabled!"); in mipsr2emu_enable()
72 * mipsr6_emul - Emulate some frequent R2/R5/R6 instructions in delay slot
83 regs->regs[MIPSInst_RT(ir)] = in mipsr6_emul()
84 (s32)regs->regs[MIPSInst_RS(ir)] + in mipsr6_emul()
92 regs->regs[MIPSInst_RT(ir)] = in mipsr6_emul()
93 (s64)regs->regs[MIPSInst_RS(ir)] + in mipsr6_emul()
101 return -SIGFPE; in mipsr6_emul()
106 regs->regs[MIPSInst_RD(ir)] = in mipsr6_emul()
[all …]
/linux/Documentation/trace/postprocess/
H A Dtrace-pagealloc-postprocess.pl4 # to extract some high-level information on what is going on. The accuracy of the parser
7 # Example usage: trace-pagealloc-postprocess.pl < /sys/kernel/tracing/trace_pipe
9 # --prepend-parent Report on the parent proc and PID
10 # --read-procstat If the trace lacks process info, get it from /proc
11 # --ignore-pid Aggregate processes of the same name together
28 use constant STATE_PCPU_PAGES_DRAINED => 8;
29 use constant STATE_PCPU_PAGES_REFILLED => 9;
31 # High-level events extrapolated from tracepoints
52 if ($current_time - 2 > $sigint_received) {
53 print "SIGINT received, report pending. Hit ctrl-c again to exit\n";
[all …]
/linux/drivers/clk/rockchip/
H A Drst-rk3576.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <dt-bindings/reset/rockchip,rk3576-cru.h>
46 RK3576_CRU_RESET_OFFSET(SRST_ASRC_2CH_1, 7, 8),
47 RK3576_CRU_RESET_OFFSET(SRST_ASRC_4CH_0, 7, 9),
55 RK3576_CRU_RESET_OFFSET(SRST_H_SPDIF_RX1, 8, 0),
56 RK3576_CRU_RESET_OFFSET(SRST_M_SPDIF_RX1, 8, 1),
57 RK3576_CRU_RESET_OFFSET(SRST_M_SAI1_8CH, 8, 5),
58 RK3576_CRU_RESET_OFFSET(SRST_H_SAI1_8CH, 8, 6),
59 RK3576_CRU_RESET_OFFSET(SRST_M_SAI2_2CH, 8, 8),
60 RK3576_CRU_RESET_OFFSET(SRST_H_SAI2_2CH, 8, 10),
[all …]
/linux/drivers/scsi/aic7xxx/aicasm/
H A Daicasm_insformat.h19 * 3. Neither the names of the above-listed copyright holders nor the names
47 /* 8bit ALU logic operations */
50 uint32_t immediate : 8,
51 source : 9,
52 destination : 9,
60 destination : 9,
61 source : 9,
62 immediate : 8;
66 /* 8bit ALU shift/rotate operations */
69 uint32_t shift_control : 8,
[all …]
/linux/arch/powerpc/kernel/vdso/
H A Dsigtramp32.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
23 .Lsig_start = . - 4
43 .uleb128 9f - 1f; /* length */ \
49 9:
56 .uleb128 9f - 1f; /* length */ \
63 9:
72 .uleb128 9f - 1f; /* length */ \
95 9:
102 .uleb128 9f - 1f; /* length */ \
105 .byte 0x2f; .short 2b - 9f; /* DW_OP_skip */ \
[all …]

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