| /linux/tools/perf/pmu-events/arch/x86/ivytown/ |
| H A D | uncore-cache.json | 4 "Counter": "0,1,2,3",
11 "Counter": "1,2,3",
15 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an…
24 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
34 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
44 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
54 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
64 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa…
189 "BriefDescription": "LRU Queue; LRU Age 3",
194 "PublicDescription": "How often age was set to 3",
[all …]
|
| H A D | uncore-io.json | 4 "Counter": "0,1,2,3",
17 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
27 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
37 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
47 …to the IIO, but was rejected because no credits were available. NCB, or non-coherent bypass messa…
57 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
67 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
77 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
82 "BriefDescription": "R2 AD Ring in Use; Counterclockwise",
83 "Counter": "0,1,2,3",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/snowridgex/ |
| H A D | uncore-interconnect.json | 111 "BriefDescription": "FAF allocation -- sent to ADQ",
148 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
158 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
168 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
178 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
188 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests",
198 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary",
208 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary",
218 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch",
228 "BriefDescription": "Misc Events - Set 1 : Lost Forward",
[all …]
|
| H A D | uncore-cache.json | 4 "Counter": "0,1,2,3",
15 "Counter": "0,1,2,3",
26 "Counter": "0,1,2,3",
36 "BriefDescription": "CMS Agent0 AD Credits Acquired : For Transgress 3",
37 "Counter": "0,1,2,3",
42 …"PublicDescription": "CMS Agent0 AD Credits Acquired : For Transgress 3 : Number of CMS Agent 0 AD…
48 "Counter": "0,1,2,3",
59 "Counter": "0,1,2,3",
70 "Counter": "0,1,2,3",
81 "Counter": "0,1,2,3",
[all …]
|
| H A D | uncore-io.json | 13 …y the Card, including reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
29 …y the Card, including reads and writes. : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
56 "Counter": "3",
116 "Counter": "0,1,2,3",
134 "Counter": "0,1,2,3",
145 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
146 "Counter": "0,1,2,3",
152 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
158 "Counter": "0,1,2,3",
164 …serts of completions with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/broadwellx/ |
| H A D | uncore-cache.json | 4 "Counter": "0,1,2,3",
16 "Counter": "0,1,2,3",
27 "BriefDescription": "LLC misses - demand and prefetch data reads - excludes LLC prefetches. Derived from unc_c_tor_inserts.miss_opcode",
28 "Counter": "0,1,2,3",
40 "Counter": "0,1,2,3",
52 "Counter": "0,1,2,3",
64 "Counter": "0,1,2,3",
76 "Counter": "0,1,2,3",
88 "Counter": "0,1,2,3",
38 { global() object
[all...] |
| H A D | uncore-io.json | 4 "Counter": "0,1,2,3",
53 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
63 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
73 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
83 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
93 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
103 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
108 "BriefDescription": "R2 AD Ring in Use; All",
109 "Counter": "0,1,2,3",
113 …ring is being used at this ring stop. This includes when packets are passing by and when packets …
[all …]
|
| H A D | uncore-interconnect.json | 111 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
116 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
121 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
126 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
131 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
136 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
141 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
146 "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
151 "BriefDescription": "Misc Events - Set 0; Fastpath Requests",
156 "PublicDescription": "Counts Timeouts - Se
32 { global() object
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/icelakex/ |
| H A D | uncore-interconnect.json | 111 "BriefDescription": "FAF allocation -- sent to ADQ",
148 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
158 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
168 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
178 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
188 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests",
198 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary",
208 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary",
218 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch",
228 "BriefDescription": "Misc Events - Set 1 : Lost Forward",
[all …]
|
| H A D | uncore-io.json | 24 "Counter": "3",
84 "Counter": "0,1,2,3",
103 "Counter": "0,1,2,3",
114 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
115 "Counter": "0,1,2,3",
121 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
127 "Counter": "0,1,2,3",
133 …serts of completions with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
139 "Counter": "0,1,2,3",
145 …serts of completions with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
[all …]
|
| H A D | uncore-cache.json | 4 "Counter": "0,1,2,3",
15 "Counter": "0,1,2,3",
26 "Counter": "0,1,2,3",
37 "Counter": "0,1,2,3",
48 "Counter": "0,1,2,3",
59 "Counter": "0,1,2,3",
70 "Counter": "0,1,2,3",
81 "Counter": "0,1,2,3",
92 "Counter": "0,1,2,3",
103 "Counter": "0,1,2,3",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/broadwellde/ |
| H A D | uncore-cache.json | 4 "Counter": "0,1,2,3",
12 "Counter": "0,1,2,3",
19 "Counter": "0,1,2,3",
23 "PublicDescription": "Since occupancy counts can only be captured in the Cbo's 0 counter, this event allows a user to capture occupancy related information by filtering the Cb0 occupancy count captured in Counter 0. The filtering available is found in the control register - threshold, invert and edge detect. E.g. setting threshold to 1 can effectively monitor how many cycles the monitored queue has an entry.",
37 "Counter": "0,1,2,3",
41 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Filters for any transaction originating from the IPQ or IRQ. This does not include lookups originating from the ISMQ.",
47 "Counter": "0,1,2,3",
51 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standar
26 { global() object
[all...] |
| H A D | uncore-io.json | 4 "Counter": "0,1,2,3",
53 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
63 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
73 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
83 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
93 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
103 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
108 "BriefDescription": "R2 AD Ring in Use; All",
109 "Counter": "0,1,2,3",
113 …ring is being used at this ring stop. This includes when packets are passing by and when packets …
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/haswellx/ |
| H A D | uncore-cache.json | 4 "Counter": "0,1,2,3",
16 "Counter": "0,1,2,3",
27 "BriefDescription": "LLC misses - demand and prefetch data reads - excludes LLC prefetches. Derived from unc_c_tor_inserts.miss_opcode",
28 "Counter": "0,1,2,3",
40 "Counter": "0,1,2,3",
52 "Counter": "0,1,2,3",
64 "Counter": "0,1,2,3",
76 "Counter": "0,1,2,3",
88 "Counter": "0,1,2,3",
38 { global() object
[all...] |
| H A D | uncore-io.json | 4 "Counter": "0,1,2,3",
53 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
63 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
73 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
83 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
93 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
103 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
108 "BriefDescription": "R2 AD Ring in Use; Counterclockwise",
109 "Counter": "0,1,2,3",
113 …ring is being used at this ring stop. This includes when packets are passing by and when packets …
[all …]
|
| H A D | uncore-interconnect.json | 111 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
116 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
121 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
126 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
131 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
136 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
141 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
146 "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
151 "BriefDescription": "Misc Events - Set 0; Fastpath Requests",
156 "PublicDescription": "Counts Timeouts - Se
32 { global() object
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/jaketown/ |
| H A D | uncore-cache.json | 4 "Counter": "0,1,2,3",
11 "Counter": "1,2,3",
15 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an…
31 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
41 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
51 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
61 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
156 "BriefDescription": "AD Ring In Use; Down and Even",
157 "Counter": "2,3",
161 …ring is being used at this ring stop. This includes when packets are passing by and when packets …
[all …]
|
| H A D | uncore-io.json | 4 "Counter": "0,1,2,3",
17 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
27 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
37 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
47 …to the IIO, but was rejected because no credits were available. NCB, or non-coherent bypass messa…
57 …to the IIO, but was rejected because no credits were available. NCB, or non-coherent bypass messa…
67 …to the IIO, but was rejected because no credits were available. NCB, or non-coherent bypass messa…
77 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
87 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
97 …m the BL ring going into the IIO Agent must first acquire a credit. These credits are for either …
[all …]
|
| /linux/drivers/gpu/drm/radeon/ |
| H A D | uvd_v1_0.c | 32 * uvd_v1_0_get_rptr - get read pointer
35 * @ring: radeon_ring pointer
40 struct radeon_ring *ring) in uvd_v1_0_get_rptr() argument
46 * uvd_v1_0_get_wptr - get write pointer
49 * @ring: radeon_ring pointer
54 struct radeon_ring *ring) in uvd_v1_0_get_wptr() argument
60 * uvd_v1_0_set_wptr - set write pointer
63 * @ring: radeon_ring pointer
68 struct radeon_ring *ring) in uvd_v1_0_set_wptr() argument
70 WREG32(UVD_RBC_RB_WPTR, ring->wptr); in uvd_v1_0_set_wptr()
[all …]
|
| H A D | uvd_v2_2.c | 32 * uvd_v2_2_fence_emit - emit an fence & trap command
37 * Write a fence and a trap command to the ring.
42 struct radeon_ring *ring = &rdev->ring[fence->ring]; in uvd_v2_2_fence_emit() local
43 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; in uvd_v2_2_fence_emit()
45 radeon_ring_write(ring, PACKET0(UVD_CONTEXT_ID, 0)); in uvd_v2_2_fence_emit()
46 radeon_ring_write(ring, fence->seq); in uvd_v2_2_fence_emit()
47 radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA0, 0)); in uvd_v2_2_fence_emit()
48 radeon_ring_write(ring, lower_32_bits(addr)); in uvd_v2_2_fence_emit()
49 radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA1, 0)); in uvd_v2_2_fence_emit()
50 radeon_ring_write(ring, upper_32_bits(addr) & 0xff); in uvd_v2_2_fence_emit()
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| H A D | uncore-interconnect.json | 157 "BriefDescription": "FAF allocation -- sent to ADQ",
186 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
196 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
206 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
216 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
226 "BriefDescription": "Misc Events - Set 0; Fastpath Requests",
236 "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From Primary to Secondary",
246 "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From Primary to Secondary",
256 "BriefDescription": "Misc Events - Se
34 { global() object
[all...] |
| H A D | uncore-cache.json | 4 "Counter": "0,1,2,3",
15 "Counter": "0,1,2,3",
25 "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.ia_miss",
26 "Counter": "0,1,2,3",
37 "Counter": "0,1,2,3",
49 "Counter": "0,1,2,3",
61 "Counter": "0,1,2,3",
72 "Counter": "0,1,2,3",
83 "Counter": "0,1,2,3",
93 "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 3",
35 { global() object
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/skylakex/ |
| H A D | uncore-interconnect.json | 157 "BriefDescription": "FAF allocation -- sent to ADQ",
186 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
196 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
206 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
216 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
226 "BriefDescription": "Misc Events - Set 0; Fastpath Requests",
236 "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From Primary to Secondary",
246 "BriefDescription": "Misc Events - Set 0; Prefetch Ack Hints From Primary to Secondary",
256 "BriefDescription": "Misc Events - Se
34 { global() object
[all...] |
| H A D | uncore-cache.json | 4 "Counter": "0,1,2,3",
15 "Counter": "0,1,2,3",
26 "Counter": "0,1,2,3",
36 "BriefDescription": "CMS Agent0 AD Credits Acquired; For Transgress 3",
37 "Counter": "0,1,2,3",
48 "Counter": "0,1,2,3",
59 "Counter": "0,1,2,3",
70 "Counter": "0,1,2,3",
81 "Counter": "0,1,2,3",
92 "Counter": "0,1,2,3",
35 { global() object
[all...] |
| /linux/drivers/net/ethernet/apm/xgene/ |
| H A D | xgene_enet_ring2.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Applied Micro X-Gene SoC Ethernet Driver
12 static void xgene_enet_ring_init(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_init() argument
14 u32 *ring_cfg = ring->state; in xgene_enet_ring_init()
15 u64 addr = ring->dma; in xgene_enet_ring_init()
17 if (xgene_enet_ring_owner(ring->id) == RING_OWNER_CPU) { in xgene_enet_ring_init()
18 ring_cfg[0] |= SET_VAL(X2_INTLINE, ring->id & RING_BUFNUM_MASK); in xgene_enet_ring_init()
19 ring_cfg[3] |= SET_BIT(X2_DEQINTEN); in xgene_enet_ring_init()
27 ring_cfg[3] |= SET_VAL(RINGSIZE, ring->cfgsize) in xgene_enet_ring_init()
34 static void xgene_enet_ring_set_type(struct xgene_enet_desc_ring *ring) in xgene_enet_ring_set_type() argument
[all …]
|