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/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A Duncore-power.json4 "Counter": "0,1,2,3",
6 "PerPkg": "1",
11 "BriefDescription": "Core 0 C State Transition Cycles",
12 "Counter": "0,1,2,3",
15 "PerPkg": "1",
16 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev…
20 "BriefDescription": "Core 10 C State Transition Cycles",
21 "Counter": "0,1,2,3",
24 "PerPkg": "1",
25 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev…
[all …]
/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A Duncore-power.json4 "Counter": "0,1,2,3",
6 "PerPkg": "1",
7 …"PublicDescription": "The PCU runs off a fixed 1 GHz clock. This event counts the number of pclk …
11 "BriefDescription": "Core C State Transition Cycles",
12 "Counter": "0,1,2,3",
15 "PerPkg": "1",
16 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev…
20 "BriefDescription": "Core C State Transition Cycles",
21 "Counter": "0,1,2,3",
24 "PerPkg": "1",
[all …]
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A Duncore-power.json4 "Counter": "0,1,2,3",
6 "PerPkg": "1",
7 …"PublicDescription": "The PCU runs off a fixed 1 GHz clock. This event counts the number of pclk …
11 "BriefDescription": "Core C State Transition Cycles",
12 "Counter": "0,1,2,3",
15 "PerPkg": "1",
16 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev…
20 "BriefDescription": "Core C State Transition Cycles",
21 "Counter": "0,1,2,3",
24 "PerPkg": "1",
[all …]
/linux/arch/x86/events/zhaoxin/
H A Dcore.c35 FIXED_EVENT_CONSTRAINT(0x0082, 1), /* unhalted core clock cycles */
42 FIXED_EVENT_CONSTRAINT(0x0082, 1), /* unhalted core clock cycles */
51 [C(L1D)] = {
52 [C(OP_READ)] = {
53 [C(RESULT_ACCESS)] = 0x0042,
54 [C(RESULT_MISS)] = 0x0538,
56 [C(OP_WRITE)] = {
57 [C(RESULT_ACCESS)] = 0x0043,
58 [C(RESULT_MISS)] = 0x0562,
60 [C(OP_PREFETCH)] = {
[all …]
/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A Duncore-power.json4 "Counter": "0,1,2,3",
6 "PerPkg": "1",
11 "BriefDescription": "Core C State Transition Cycles",
12 "Counter": "0,1,2,3",
15 "PerPkg": "1",
16 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev…
20 "BriefDescription": "Core C State Transition Cycles",
21 "Counter": "0,1,2,3",
24 "PerPkg": "1",
25 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev…
[all …]
/linux/arch/sh/kernel/cpu/sh4a/
H A Dperf_event.c5 * Copyright (C) 2009, 2010 Paul Mundt
18 #define CCBR_DUC (1 << 3)
19 #define CCBR_CMDS (1 << 1)
20 #define CCBR_PPCE (1 << 0)
42 #define PMCAT_OVF3 (1 << 27)
43 #define PMCAT_CNN3 (1 << 26)
44 #define PMCAT_CLR3 (1 << 25)
45 #define PMCAT_OVF2 (1 << 19)
46 #define PMCAT_CLR2 (1 << 17)
47 #define PMCAT_OVF1 (1 << 11)
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/linux/arch/powerpc/perf/
H A Dpower10-pmu.c39 * MMCR1[25] = pmc1combine[1]
41 * MMCR1[27] = pmc2combine[1]
43 * MMCR1[29] = pmc3combine[1]
45 * MMCR1[31] = pmc4combine[1]
61 * MMCR1[17] = cache_sel[1]
65 * MMCRA[63] = 1 (SAMPLE_ENABLE)
72 * MMCRA[SDAR_MODE] = sdar_mode[0:1]
319 return -1; in power10_bhrb_filter_map()
332 return -1; in power10_bhrb_filter_map()
340 return -1; in power10_bhrb_filter_map()
[all …]
H A Dpower8-pmu.c43 * [ ] [ sample ] [cache] [ pmc ] [unit ] c m [ pmcxsel ]
74 * MMCRC[53:55] = cache_sel[1:3] (L2EVENT_SEL)
77 * MMCRC[47:49] = cache_sel[1:3] (L3EVENT_SEL0)
78 * else if cache_sel[0] == 1:
80 * else if cache_sel[1]: # L1 event
85 * MMCRA[63] = 1 (SAMPLE_ENABLE)
234 return -1; in power8_bhrb_filter_map()
237 return -1; in power8_bhrb_filter_map()
240 return -1; in power8_bhrb_filter_map()
248 return -1; in power8_bhrb_filter_map()
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H A De6500-pmu.c6 * Based on e500-pmu.c
21 [PERF_COUNT_HW_CPU_CYCLES] = 1,
28 #define C(x) PERF_COUNT_HW_CACHE_##x macro
32 * 0 means not supported, -1 means nonsensical, other values
35 static int e6500_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
36 [C(L1D)] = {
38 [C(OP_READ)] = { 27, 222 },
39 [C(OP_WRITE)] = { 28, 223 },
40 [C(OP_PREFETCH)] = { 29, 0 },
42 [C(L1I)] = {
[all …]
H A Dpower9-pmu.c40 * MMCR1[25] = pmc1combine[1]
42 * MMCR1[27] = pmc2combine[1]
44 * MMCR1[29] = pmc3combine[1]
46 * MMCR1[31] = pmc4combine[1]
66 * MMCRA[63] = 1 (SAMPLE_ENABLE)
305 return -1; in power9_bhrb_filter_map()
308 return -1; in power9_bhrb_filter_map()
311 return -1; in power9_bhrb_filter_map()
319 return -1; in power9_bhrb_filter_map()
330 #define C(x) PERF_COUNT_HW_CACHE_##x macro
[all …]
H A De500-pmu.c18 [PERF_COUNT_HW_CPU_CYCLES] = 1,
27 #define C(x) PERF_COUNT_HW_CACHE_##x macro
31 * 0 means not supported, -1 means nonsensical, other values
34 static int e500_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
39 [C(L1D)] = { /* RESULT_ACCESS RESULT_MISS */
40 [C(OP_READ)] = { 27, 0 },
41 [C(OP_WRITE)] = { 28, 0 },
42 [C(OP_PREFETCH)] = { 29, 0 },
44 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
45 [C(OP_READ)] = { 2, 60 },
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/linux/drivers/media/platform/mediatek/mdp3/
H A Dmtk-mdp3-regs.h3 * Copyright (c) 2022 MediaTek Inc.
16 * Plane count: 1, 2, 3
17 * H-subsample: 0, 1, 2
18 * V-subsample: 0, 1
19 * Color group: 0-RGB, 1-YUV, 2-raw
26 #define MDP_COLOR_IS_COMPRESS(c) ((0x20000000 & (c)) >> 29) argument
27 #define MDP_COLOR_IS_10BIT_PACKED(c) ((0x08000000 & (c)) >> 27) argument
28 #define MDP_COLOR_IS_10BIT_LOOSE(c) (((0x0c000000 & (c)) >> 26) == 1) argument
29 #define MDP_COLOR_IS_10BIT_TILE(c) (((0x0c000000 & (c)) >> 26) == 3) argument
30 #define MDP_COLOR_IS_UFP(c) ((0x02000000 & (c)) >> 25) argument
[all …]
/linux/arch/x86/kernel/cpu/
H A Dcentaur.c14 #define ACE_PRESENT (1 << 6)
15 #define ACE_ENABLED (1 << 7)
16 #define ACE_FCR (1 << 28) /* MSR_VIA_FCR */
18 #define RNG_PRESENT (1 << 2)
19 #define RNG_ENABLED (1 << 3)
20 #define RNG_ENABLE (1 << 6) /* MSR_VIA_RNG */
22 static void init_c3(struct cpuinfo_x86 *c) in init_c3() argument
49 c->x86_capability[CPUID_C000_0001_EDX] = cpuid_edx(0xC0000001); in init_c3()
53 if (c->x86_model >= 6 && c->x86_model <= 13) { in init_c3()
55 lo |= (1<<1 | 1<<7); in init_c3()
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/linux/drivers/media/firewire/
H A Dfiredtv-avc.c5 * Copyright (C) 2004 Andreas Monitzer <andy@monitzer.com>
6 * Copyright (C) 2008 Ben Backx <ben@bbackx.com>
7 * Copyright (C) 2008 Henrik Kurelid <henrik@kurelid.se>
88 #define LAST_OPERAND (509 - 1)
90 static inline void clear_operands(struct avc_command_frame *c, int from, int to) in clear_operands() argument
92 memset(&c->operand[from], 0, to - from + 1); in clear_operands()
95 static void pad_operands(struct avc_command_frame *c, int from) in pad_operands() argument
100 clear_operands(c, from, to); in pad_operands()
129 ", or a combination, or all = -1)");
138 static int fake_ca_system_ids[4] = { -1, -1, -1, -1 };
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/linux/arch/sh/kernel/cpu/sh4/
H A Dperf_event.c5 * Copyright (C) 2009 Paul Mundt
80 [PERF_COUNT_HW_BRANCH_MISSES] = -1,
81 [PERF_COUNT_HW_BUS_CYCLES] = -1,
84 #define C(x) PERF_COUNT_HW_CACHE_##x macro
91 [ C(L1D) ] = {
92 [ C(OP_READ) ] = {
93 [ C(RESULT_ACCESS) ] = 0x0001,
94 [ C(RESULT_MISS) ] = 0x0004,
96 [ C(OP_WRITE) ] = {
97 [ C(RESULT_ACCESS) ] = 0x0002,
[all …]
/linux/net/mac80211/tests/
H A Dtpe.c5 * Copyright (C) 2024 Intel Corporation
29 struct cfg80211_chan_def c; member
35 .c.width = NL80211_CHAN_WIDTH_20,
36 .c.chan = &chan6g_1,
37 .c.center_freq1 = 5955,
38 .n = 1,
43 .c.width = NL80211_CHAN_WIDTH_40,
44 .c.chan = &chan6g_1,
45 .c.center_freq1 = 5965,
52 .c.width = NL80211_CHAN_WIDTH_80P80,
[all …]
/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Ddevlink_trap_control.sh12 # | | 2001:db8:1::1/64 |
15 # | | default via 2001:db8:1::2 |
22 # | 2001:db8:1::2/64 |
34 # | | 2001:db8:2::1/64 |
95 simple_if_init $h1 192.0.2.1/24 2001:db8:1::1/64
98 ip -6 route add default vrf v$h1 nexthop via 2001:db8:1::2
103 ip -6 route del default vrf v$h1 nexthop via 2001:db8:1::2
106 simple_if_fini $h1 192.0.2.1/24 2001:db8:1::1/64
111 simple_if_init $h2 198.51.100.1/24 2001:db8:2::1/64
122 simple_if_fini $h2 198.51.100.1/24 2001:db8:2::1/64
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/linux/drivers/media/v4l2-core/
H A Dv4l2-vp9.c5 * Copyright (C) 2021 Collabora, Ltd.
193 { /* Coeff Band 1 */
199 { 1, 19, 32 },
207 { 1, 28, 47 },
214 { 1, 42, 77 },
215 { 1, 17, 31 },
223 { 1, 15, 29 },
243 { /* Coeff Band 1 */
248 { 1, 39, 69 },
249 { 1, 17, 33 },
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/linux/fs/ubifs/
H A Dlpt_commit.c5 * Copyright (C) 2006-2008 Nokia Corporation.
21 static int dbg_populate_lsave(struct ubifs_info *c);
25 * @c: UBIFS file-system description object
30 static struct ubifs_cnode *first_dirty_cnode(const struct ubifs_info *c, struct ubifs_nnode *nnode) in first_dirty_cnode() argument
32 ubifs_assert(c, nnode); in first_dirty_cnode()
33 while (1) { in first_dirty_cnode()
45 cont = 1; in first_dirty_cnode()
56 * @c: UBIFS file-system description object
61 static struct ubifs_cnode *next_dirty_cnode(const struct ubifs_info *c, struct ubifs_cnode *cnode) in next_dirty_cnode() argument
66 ubifs_assert(c, cnode); in next_dirty_cnode()
[all …]
H A Dlpt.c5 * Copyright (C) 2006-2008 Nokia Corporation.
41 * @c: the UBIFS file-system description object
44 * properties of the flash and whether LPT is "big" (c->big_lpt).
46 static void do_calc_lpt_geom(struct ubifs_info *c) in do_calc_lpt_geom() argument
51 n = c->main_lebs + c->max_leb_cnt - c->leb_cnt; in do_calc_lpt_geom()
54 c->lpt_hght = 1; in do_calc_lpt_geom()
57 c->lpt_hght += 1; in do_calc_lpt_geom()
61 c->pnode_cnt = DIV_ROUND_UP(c->main_lebs, UBIFS_LPT_FANOUT); in do_calc_lpt_geom()
63 n = DIV_ROUND_UP(c->pnode_cnt, UBIFS_LPT_FANOUT); in do_calc_lpt_geom()
64 c->nnode_cnt = n; in do_calc_lpt_geom()
[all …]
H A Dkey.h5 * Copyright (C) 2006-2008 Nokia Corporation.
26 * Lot's of the key helpers require a struct ubifs_info *c as the first parameter.
28 * different c->key_format. But right now, there is only one key type, UBIFS_SIMPLE_KEY_FMT.
38 * We use hash values as offset in directories, so values %0 and %1 are
86 * @c: UBIFS file-system description object
90 static inline void ino_key_init(const struct ubifs_info *c, in ino_key_init() argument
94 key->u32[1] = UBIFS_INO_KEY << UBIFS_S_KEY_BLOCK_BITS; in ino_key_init()
99 * @c: UBIFS file-system description object
103 static inline void ino_key_init_flash(const struct ubifs_info *c, void *k, in ino_key_init_flash() argument
109 key->j32[1] = cpu_to_le32(UBIFS_INO_KEY << UBIFS_S_KEY_BLOCK_BITS); in ino_key_init_flash()
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/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A Duncore-power.json4 "Counter": "0,1,2,3",
6 "PerPkg": "1",
11 "Counter": "0,1,2,3",
14 "Experimental": "1",
15 "PerPkg": "1",
20 "Counter": "0,1,2,3",
23 "Experimental": "1",
24 "PerPkg": "1",
29 "Counter": "0,1,2,3",
32 "Experimental": "1",
[all …]
/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A Duncore-power.json4 "Counter": "0,1,2,3",
6 "PerPkg": "1",
11 "BriefDescription": "Core C State Transition Cycles",
12 "Counter": "0,1,2,3",
15 "PerPkg": "1",
16 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev…
20 "BriefDescription": "Core C State Transition Cycles",
21 "Counter": "0,1,2,3",
24 "PerPkg": "1",
25 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev…
[all …]
/linux/tools/build/tests/
H A Drun.sh5 make -C ex V=1 clean > ex.out 2>&1
6 make -C ex V=1 >> ex.out 2>&1
10 exit -1
13 make -C ex V=1 clean > /dev/null 2>&1
18 make -C ex V=1 clean > ex.out 2>&1
21 make -rR -C ex V=1 ex.o >> ex.out 2>&1
22 make -rR -C ex V=1 ex.i >> ex.out 2>&1
23 make -rR -C ex V=1 ex.s >> ex.out 2>&1
27 exit -1
32 exit -1
[all …]
/linux/arch/mips/alchemy/common/
H A Dclock.c15 * or [1 .. 256 in steps of 1] (Au1300),
20 * * divide this input by 1, 2, or 4 (and 3 on Au1300).
111 /* access locks to SYS_FREQCTRL0/1 and SYS_CLKSRC registers */
163 id.num_parents = 1; in alchemy_clk_setup_cpu()
245 struct clk *c; in alchemy_clk_setup_aux() local
254 id.num_parents = 1; in alchemy_clk_setup_aux()
262 c = clk_register(NULL, &a->hw); in alchemy_clk_setup_aux()
263 if (!IS_ERR(c)) in alchemy_clk_setup_aux()
264 clk_register_clkdev(c, name, NULL); in alchemy_clk_setup_aux()
268 return c; in alchemy_clk_setup_aux()
[all …]

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