Lines Matching +full:1 +full:c

5  *  Copyright (C) 2009  Paul Mundt
80 [PERF_COUNT_HW_BRANCH_MISSES] = -1,
81 [PERF_COUNT_HW_BUS_CYCLES] = -1,
84 #define C(x) PERF_COUNT_HW_CACHE_##x macro
91 [ C(L1D) ] = {
92 [ C(OP_READ) ] = {
93 [ C(RESULT_ACCESS) ] = 0x0001,
94 [ C(RESULT_MISS) ] = 0x0004,
96 [ C(OP_WRITE) ] = {
97 [ C(RESULT_ACCESS) ] = 0x0002,
98 [ C(RESULT_MISS) ] = 0x0005,
100 [ C(OP_PREFETCH) ] = {
101 [ C(RESULT_ACCESS) ] = 0,
102 [ C(RESULT_MISS) ] = 0,
106 [ C(L1I) ] = {
107 [ C(OP_READ) ] = {
108 [ C(RESULT_ACCESS) ] = 0x0006,
109 [ C(RESULT_MISS) ] = 0x0008,
111 [ C(OP_WRITE) ] = {
112 [ C(RESULT_ACCESS) ] = -1,
113 [ C(RESULT_MISS) ] = -1,
115 [ C(OP_PREFETCH) ] = {
116 [ C(RESULT_ACCESS) ] = 0,
117 [ C(RESULT_MISS) ] = 0,
121 [ C(LL) ] = {
122 [ C(OP_READ) ] = {
123 [ C(RESULT_ACCESS) ] = 0,
124 [ C(RESULT_MISS) ] = 0,
126 [ C(OP_WRITE) ] = {
127 [ C(RESULT_ACCESS) ] = 0,
128 [ C(RESULT_MISS) ] = 0,
130 [ C(OP_PREFETCH) ] = {
131 [ C(RESULT_ACCESS) ] = 0,
132 [ C(RESULT_MISS) ] = 0,
136 [ C(DTLB) ] = {
137 [ C(OP_READ) ] = {
138 [ C(RESULT_ACCESS) ] = 0,
139 [ C(RESULT_MISS) ] = 0x0003,
141 [ C(OP_WRITE) ] = {
142 [ C(RESULT_ACCESS) ] = 0,
143 [ C(RESULT_MISS) ] = 0,
145 [ C(OP_PREFETCH) ] = {
146 [ C(RESULT_ACCESS) ] = 0,
147 [ C(RESULT_MISS) ] = 0,
151 [ C(ITLB) ] = {
152 [ C(OP_READ) ] = {
153 [ C(RESULT_ACCESS) ] = 0,
154 [ C(RESULT_MISS) ] = 0x0007,
156 [ C(OP_WRITE) ] = {
157 [ C(RESULT_ACCESS) ] = -1,
158 [ C(RESULT_MISS) ] = -1,
160 [ C(OP_PREFETCH) ] = {
161 [ C(RESULT_ACCESS) ] = -1,
162 [ C(RESULT_MISS) ] = -1,
166 [ C(BPU) ] = {
167 [ C(OP_READ) ] = {
168 [ C(RESULT_ACCESS) ] = -1,
169 [ C(RESULT_MISS) ] = -1,
171 [ C(OP_WRITE) ] = {
172 [ C(RESULT_ACCESS) ] = -1,
173 [ C(RESULT_MISS) ] = -1,
175 [ C(OP_PREFETCH) ] = {
176 [ C(RESULT_ACCESS) ] = -1,
177 [ C(RESULT_MISS) ] = -1,
181 [ C(NODE) ] = {
182 [ C(OP_READ) ] = {
183 [ C(RESULT_ACCESS) ] = -1,
184 [ C(RESULT_MISS) ] = -1,
186 [ C(OP_WRITE) ] = {
187 [ C(RESULT_ACCESS) ] = -1,
188 [ C(RESULT_MISS) ] = -1,
190 [ C(OP_PREFETCH) ] = {
191 [ C(RESULT_ACCESS) ] = -1,
192 [ C(RESULT_MISS) ] = -1,