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/linux/lib/crc/powerpc/
H A Dcrc32c-vpmsum_asm.S17 /* x^261120 mod p(x)` << 1, x^261184 mod p(x)` << 1 */
20 /* x^260096 mod p(x)` << 1, x^260160 mod p(x)` << 1 */
23 /* x^259072 mod p(x)` << 1, x^259136 mod p(x)` << 1 */
26 /* x^258048 mod p(x)` << 1, x^258112 mod p(x)` << 1 */
29 /* x^257024 mod p(x)` << 1, x^257088 mod p(x)` << 1 */
32 /* x^256000 mod p(x)` << 1, x^256064 mod p(x)` << 1 */
35 /* x^254976 mod p(x)` << 1, x^255040 mod p(x)` << 1 */
38 /* x^253952 mod p(x)` << 1, x^254016 mod p(x)` << 1 */
41 /* x^252928 mod p(x)` << 1, x^252992 mod p(x)` << 1 */
44 /* x^251904 mod p(x)` << 1, x^251968 mod p(x)` << 1 */
[all …]
/linux/lib/crc/x86/
H A Dcrc-pclmul-consts.h12 * G(x) = x^16 + x^15 + x^11 + x^9 + x^8 + x^7 + x^5 + x^4 + x^2 + x^1 + x^0
24 .bswap_mask = {15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0},
26 0xdccf000000000000, /* LO64_TERMS: (x^2000 mod G) * x^48 */
27 0x4b0b000000000000, /* HI64_TERMS: (x^2064 mod G) * x^48 */
30 0x9d9d000000000000, /* LO64_TERMS: (x^976 mod G) * x^48 */
31 0x7cf5000000000000, /* HI64_TERMS: (x^1040 mod G) * x^48 */
34 0x044c000000000000, /* LO64_TERMS: (x^464 mod G) * x^48 */
35 0xe658000000000000, /* HI64_TERMS: (x^528 mod G) * x^48 */
38 0x6ee3000000000000, /* LO64_TERMS: (x^208 mod G) * x^48 */
39 0xe7b5000000000000, /* HI64_TERMS: (x^272 mod G) * x^48 */
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Dregs.h5 #define V_CONGMODE(x) ((x) << S_CONGMODE) argument
6 #define F_CONGMODE V_CONGMODE(1U)
9 #define V_TNLFLMODE(x) ((x) << S_TNLFLMODE) argument
10 #define F_TNLFLMODE V_TNLFLMODE(1U)
13 #define V_FATLPERREN(x) ((x) << S_FATLPERREN) argument
14 #define F_FATLPERREN V_FATLPERREN(1U)
17 #define V_DROPPKT(x) ((x) << S_DROPPKT) argument
18 #define F_DROPPKT V_DROPPKT(1U)
21 #define V_EGRGENCTRL(x) ((x) << S_EGRGENCTRL) argument
22 #define F_EGRGENCTRL V_EGRGENCTRL(1U)
[all …]
H A Dt3_cpl.h117 CPL_ERR_TCAM_PARITY = 1,
136 CPL_CONN_POLICY_ASK = 1,
148 ULP_CRC_HEADER = 1 << 0,
149 ULP_CRC_DATA = 1 << 1
179 RSS_HASH_2_TUPLE = 1,
190 #define V_OPCODE(x) ((x) << S_OPCODE) argument
191 #define G_OPCODE(x) (((x) >> S_OPCODE) & 0xFF) argument
192 #define G_TID(x) ((x) & 0xFFFFFF) argument
195 #define G_QNUM(x) (((x) >> S_QNUM) & 0xFFFF) argument
199 #define G_HASHTYPE(x) (((x) >> S_HASHTYPE) & M_HASHTYPE) argument
[all …]
H A Dsge_defs.h11 #define V_EC_CREDITS(x) ((x) << S_EC_CREDITS) argument
12 #define G_EC_CREDITS(x) (((x) >> S_EC_CREDITS) & M_EC_CREDITS) argument
15 #define V_EC_GTS(x) ((x) << S_EC_GTS) argument
16 #define F_EC_GTS V_EC_GTS(1U)
20 #define V_EC_INDEX(x) ((x) << S_EC_INDEX) argument
21 #define G_EC_INDEX(x) (((x) >> S_EC_INDEX) & M_EC_INDEX) argument
25 #define V_EC_SIZE(x) ((x) << S_EC_SIZE) argument
26 #define G_EC_SIZE(x) (((x) >> S_EC_SIZE) & M_EC_SIZE) argument
30 #define V_EC_BASE_LO(x) ((x) << S_EC_BASE_LO) argument
31 #define G_EC_BASE_LO(x) (((x) >> S_EC_BASE_LO) & M_EC_BASE_LO) argument
[all …]
/linux/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_regs.h35 #define AFI_PORT_FRM_OUT(g) __REG(TARGET_AFI, 0, 1, 98816, g, 10, 8, 0, 0, 1, 4)
38 #define AFI_PORT_FRM_OUT_FRM_OUT_CNT_SET(x)\ argument
39 FIELD_PREP(AFI_PORT_FRM_OUT_FRM_OUT_CNT, x)
40 #define AFI_PORT_FRM_OUT_FRM_OUT_CNT_GET(x)\ argument
41 FIELD_GET(AFI_PORT_FRM_OUT_FRM_OUT_CNT, x)
44 #define AFI_PORT_CFG(g) __REG(TARGET_AFI, 0, 1, 98816, g, 10, 8, 4, 0, 1, 4)
47 #define AFI_PORT_CFG_FC_SKIP_TTI_INJ_SET(x)\ argument
48 FIELD_PREP(AFI_PORT_CFG_FC_SKIP_TTI_INJ, x)
49 #define AFI_PORT_CFG_FC_SKIP_TTI_INJ_GET(x)\ argument
50 FIELD_GET(AFI_PORT_CFG_FC_SKIP_TTI_INJ, x)
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dr600d.h55 #define ENABLE_TC128 (1 << 30)
60 #define BACKEND_DISABLE(x) ((x) << 16) argument
63 #define S_028808_SPECIAL_OP(x) (((x) & 0x7) << 4) argument
64 #define G_028808_SPECIAL_OP(x) (((x) >> 4) & 0x7) argument
83 #define S_028080_SLICE_START(x) (((x) & 0x7FF) << 0) argument
84 #define G_028080_SLICE_START(x) (((x) >> 0) & 0x7FF) argument
86 #define S_028080_SLICE_MAX(x) (((x) & 0x7FF) << 13) argument
87 #define G_028080_SLICE_MAX(x) (((x) >> 13) & 0x7FF) argument
97 #define S_028100_CMASK_BLOCK_MAX(x) (((x) & 0xFFF) << 0) argument
98 #define G_028100_CMASK_BLOCK_MAX(x) (((x) >> 0) & 0xFFF) argument
[all …]
H A Drv770d.h47 # define UPLL_REF_DIV(x) ((x) << 16) argument
52 # define UPLL_SW_HILEN(x) ((x) << 0) argument
53 # define UPLL_SW_LOLEN(x) ((x) << 4) argument
54 # define UPLL_SW_HILEN2(x) ((x) << 8) argument
55 # define UPLL_SW_LOLEN2(x) ((x) << 12) argument
57 # define VCLK_SRC_SEL(x) ((x) << 20) argument
59 # define DCLK_SRC_SEL(x) ((x) << 25) argument
62 # define UPLL_FB_DIV(x) ((x) << 0) argument
67 #define SMC_SRAM_AUTO_INC_DIS (1 << 16)
70 #define SMC_RST_N (1 << 0)
[all …]
H A Devergreend.h53 #define HOST_SMC_MSG(x) ((x) << 0) argument
56 #define HOST_SMC_RESP(x) ((x) << 8) argument
59 #define SMC_HOST_MSG(x) ((x) << 16) argument
62 #define SMC_HOST_RESP(x) ((x) << 24) argument
67 #define DCCG_DISP1_SLOW_SELECT(x) ((x) << 0) argument
70 #define DCCG_DISP2_SLOW_SELECT(x) ((x) << 4) argument
75 #define SPLL_RESET (1 << 0)
76 #define SPLL_SLEEP (1 << 1)
77 #define SPLL_BYPASS_EN (1 << 3)
78 #define SPLL_REF_DIV(x) ((x) << 4) argument
[all …]
H A Dnid.h52 # define ECLK_DIR_CNTL_EN (1 << 8)
54 # define ECLK_STATUS (1 << 0)
60 #define RINGID(x) (((x) & 0x3) << 0) argument
61 #define VMID(x) (((x) & 0x7) << 0) argument
63 #define RLC_RQ_PENDING (1 << 3)
64 #define GRBM_RQ_PENDING (1 << 5)
65 #define VMC_BUSY (1 << 8)
66 #define MCB_BUSY (1 << 9)
67 #define MCB_NON_DISPLAY_BUSY (1 << 10)
68 #define MCC_BUSY (1 << 11)
[all …]
H A Dsumod.h35 # define PWR_GATING_EN (1 << 0)
36 # define RSVD_MASK (0x3 << 1)
37 # define PCV(x) ((x) << 3) argument
40 # define PCP(x) ((x) << 8) argument
43 # define RPW(x) ((x) << 16) argument
46 # define ID(x) ((x) << 24) argument
49 # define PGS(x) ((x) << 28) argument
55 # define LCLK_SCALING_EN (1 << 0)
56 # define LCLK_SCALING_TYPE (1 << 1)
57 # define LCLK_SCALING_TIMER_PRESCALER(x) ((x) << 4) argument
[all …]
H A Dcikd.h35 # define DIDT_CTRL_EN (1 << 0)
42 # define SamuBootLevel(x) ((x) << 0) argument
45 # define AcpBootLevel(x) ((x) << 8) argument
48 # define VceBootLevel(x) ((x) << 16) argument
51 # define UvdBootLevel(x) ((x) << 24) argument
56 # define INTERRUPTS_ENABLED (1 << 0)
59 # define Dpm0PgNbPsLo(x) ((x) << 0) argument
62 # define Dpm0PgNbPsHi(x) ((x) << 8) argument
65 # define DpmXNbPsLo(x) ((x) << 16) argument
68 # define DpmXNbPsHi(x) ((x) << 24) argument
[all …]
H A Drv6xxd.h28 # define SPLL_DIV_SYNC (1 << 5)
31 # define GLOBAL_PWRMGT_EN (1 << 0)
32 # define STATIC_PM_EN (1 << 1)
33 # define MOBILE_SU (1 << 2)
34 # define THERMAL_PROTECTION_DIS (1 << 3)
35 # define THERMAL_PROTECTION_TYPE (1 << 4)
36 # define ENABLE_GEN2PCIE (1 << 5)
37 # define SW_GPIO_INDEX(x) ((x) << 6) argument
39 # define LOW_VOLT_D2_ACPI (1 << 8)
40 # define LOW_VOLT_D3_ACPI (1 << 9)
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_regs.h77 #define QID_V(x) ((x) << QID_S) argument
80 #define DBPRIO_V(x) ((x) << DBPRIO_S) argument
81 #define DBPRIO_F DBPRIO_V(1U)
84 #define PIDX_V(x) ((x) << PIDX_S) argument
89 #define DBTYPE_V(x) ((x) << DBTYPE_S) argument
90 #define DBTYPE_F DBTYPE_V(1U)
94 #define PIDX_T5_V(x) ((x) << PIDX_T5_S) argument
95 #define PIDX_T5_G(x) (((x) >> PIDX_T5_S) & PIDX_T5_M) argument
100 #define INGRESSQID_V(x) ((x) << INGRESSQID_S) argument
103 #define TIMERREG_V(x) ((x) << TIMERREG_S) argument
[all …]
H A Dt4_msg.h126 CPL_ERR_TCAM_PARITY = 1,
152 CPL_CONN_POLICY_ASK = 1,
167 ULP_CRC_HEADER = 1 << 0,
168 ULP_CRC_DATA = 1 << 1
178 TX_CSUM_UDP = 1,
196 #define CPL_OPCODE_V(x) ((x) << CPL_OPCODE_S) argument
197 #define CPL_OPCODE_G(x) (((x) >> CPL_OPCODE_S) & 0xFF) argument
198 #define TID_G(x) ((x) & 0xFFFFFF) argument
211 #define TID_TID_V(x) ((x) << TID_TID_S) argument
212 #define TID_TID_G(x) (((x) >> TID_TID_S) & TID_TID_M) argument
[all …]
H A Dt4fw_api.h40 FW_EPERM = 1, /* operation not permitted */
123 #define FW_WR_OP_V(x) ((x) << FW_WR_OP_S) argument
124 #define FW_WR_OP_G(x) (((x) >> FW_WR_OP_S) & FW_WR_OP_M) argument
128 #define FW_WR_ATOMIC_V(x) ((x) << FW_WR_ATOMIC_S) argument
134 #define FW_WR_FLUSH_V(x) ((x) << FW_WR_FLUSH_S) argument
138 #define FW_WR_COMPL_V(x) ((x) << FW_WR_COMPL_S) argument
139 #define FW_WR_COMPL_F FW_WR_COMPL_V(1U)
144 #define FW_WR_IMMDLEN_V(x) ((x) << FW_WR_IMMDLEN_S) argument
148 #define FW_WR_EQUIQ_V(x) ((x) << FW_WR_EQUIQ_S) argument
149 #define FW_WR_EQUIQ_F FW_WR_EQUIQ_V(1U)
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dregs.h36 #define V_CMDQ0_ENABLE(x) ((x) << S_CMDQ0_ENABLE) argument
37 #define F_CMDQ0_ENABLE V_CMDQ0_ENABLE(1U)
39 #define S_CMDQ1_ENABLE 1
40 #define V_CMDQ1_ENABLE(x) ((x) << S_CMDQ1_ENABLE) argument
41 #define F_CMDQ1_ENABLE V_CMDQ1_ENABLE(1U)
44 #define V_FL0_ENABLE(x) ((x) << S_FL0_ENABLE) argument
45 #define F_FL0_ENABLE V_FL0_ENABLE(1U)
48 #define V_FL1_ENABLE(x) ((x) << S_FL1_ENABLE) argument
49 #define F_FL1_ENABLE V_FL1_ENABLE(1U)
52 #define V_CPL_ENABLE(x) ((x) << S_CPL_ENABLE) argument
[all …]
/linux/drivers/gpu/drm/imagination/
H A Dpvr_rogue_fwif_sf.h65 #define ROGUE_FW_SF_GID(x) (((u32)(x) >> 12) & 0xfU) argument
67 #define ROGUE_FW_SF_PARAMNUM(x) (((u32)(x) >> 16) & 0xfU) argument
79 { ROGUE_FW_LOG_CREATESFID(1, ROGUE_FW_GROUP_MAIN, 6),
80 "Kick 3D: FWCtx 0x%08.8x @ %d, RTD 0x%08x. Partial render:%d, CSW resume:%d, prio:%d" },
82 "3D finished, HWRTData0State=%x, HWRTData1State=%x" },
84 "Kick 3D TQ: FWCtx 0x%08.8x @ %d, CSW resume:%d, prio: %d" },
88 "Kick Compute: FWCtx 0x%08.8x @ %d, prio: %d" },
92 … "Kick TA: FWCtx 0x%08.8x @ %d, RTD 0x%08x. First kick:%d, Last kick:%d, CSW resume:%d, prio:%d" },
100 "Out of memory! Context 0x%08x, HWRTData 0x%x" },
102 "Kick TLA: FWCtx 0x%08.8x @ %d, prio:%d" },
[all …]
/linux/tools/memory-model/
H A Dlinux-kernel.def9 READ_ONCE(X) __load{ONCE}(X)
10 WRITE_ONCE(X,V) { __store{ONCE}(X,V); }
13 smp_store_release(X,V) { __store{RELEASE}(*X,V); }
14 smp_load_acquire(X) __load{ACQUIRE}(*X)
15 rcu_assign_pointer(X,V) { __store{RELEASE}(X,
[all...]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvid.h70 #define PIPEID(x) ((x) << 0) argument
71 #define MEID(x) ((x) << 2) argument
72 #define VMID(x) ((x) << 4) argument
73 #define QUEUEID(x) ((x) << 8) argument
88 #define PACKET_TYPE1 1
109 #define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 << 1)
114 #define PACKET3_BASE_INDEX(x) ((x) << 0) argument
142 #define WRITE_DATA_DST_SEL(x) ((x) << 8) argument
144 * 1 - memory (sync - via GRBM)
150 #define WR_ONE_ADDR (1 << 16)
[all …]
/linux/drivers/atm/
H A Dhe.h55 #define TPDRQ_MASK(x) (((unsigned long)(x))&((CONFIG_TPDRQ_SIZE<<3)-1)) argument
59 #define RBRQ_MASK(x) (((unsigned long)(x))&((CONFIG_RBRQ_SIZE<<3)-1)) argument
63 #define TBRQ_MASK(x) (((unsigned long)(x))&((CONFIG_TBRQ_SIZE<<2)-1)) argument
68 #define RBPL_MASK(x) (((unsigned long)(x))&((CONFIG_RBPL_SIZE<<3)-1)) argument
95 (((unsigned long)base)|(((unsigned long)(tail+1))&mask))
99 #define ITYPE_TPD_COMPLETE (1<<3)
109 #define ITYPE_GROUP(x) (x & 0x7) argument
110 #define ITYPE_TYPE(x) (x & 0xf8) argument
144 #define TPD_ADDR(x) ((x) & TPD_MASK) argument
145 #define TPD_INDEX(x) (TPD_ADDR(x) >> TPD_ADDR_SHIFT) argument
[all …]
/linux/drivers/gpu/drm/tegra/
H A Dsor.h14 #define SOR_SUPER_STATE_ATTACHED (1 << 3)
15 #define SOR_SUPER_STATE_MODE_NORMAL (1 << 2)
18 #define SOR_SUPER_STATE_HEAD_MODE_SNOOZE (1 << 0)
30 #define SOR_STATE_ASY_VSYNCPOL (1 << 13)
31 #define SOR_STATE_ASY_HSYNCPOL (1 << 12)
44 #define SOR_STATE_ASY_OWNER(x) (((x) & 0xf) << 0) argument
46 #define SOR_HEAD_STATE0(x) (0x05 + (x)) argument
50 #define SOR_HEAD_STATE_DYNRANGE_CEA (1 << 2)
53 #define SOR_HEAD_STATE1(x) (0x07 + (x)) argument
54 #define SOR_HEAD_STATE2(x) (0x09 + (x)) argument
[all …]
/linux/include/math-emu/
H A Dop-common.h27 #define _FP_DECL(wc, X) \ argument
28 _FP_I_TYPE X##_c=0, X##_s=0, X##_e=0; \
29 _FP_FRAC_DECL_##wc(X)
36 #define _FP_UNPACK_CANONICAL(fs, wc, X) \ argument
38 switch (X##_e) \
41 _FP_FRAC_HIGH_RAW_##fs(X) |= _FP_IMPLBIT_##fs; \
42 _FP_FRAC_SLL_##wc(X, _FP_WORKBITS); \
43 X##_e -= _FP_EXPBIAS_##fs; \
44 X##_c = FP_CLS_NORMAL; \
48 if (_FP_FRAC_ZEROP_##wc(X)) \
[all …]
H A Ddouble.h47 ((_FP_W_TYPE)1 << (_FP_FRACBITS_D-2) % _FP_W_TYPE_SIZE)
49 ((_FP_W_TYPE)1 << (_FP_FRACBITS_D-1) % _FP_W_TYPE_SIZE)
51 ((_FP_W_TYPE)1 << _FP_WFRACBITS_D % _FP_W_TYPE_SIZE)
60 unsigned sign : 1;
68 unsigned sign : 1;
73 #define FP_DECL_D(X) _FP_DECL(2,X) argument
74 #define FP_UNPACK_RAW_D(X,val) _FP_UNPACK_RAW_2(D,X,val) argument
75 #define FP_UNPACK_RAW_DP(X,val) _FP_UNPACK_RAW_2_P(D,X,val) argument
76 #define FP_PACK_RAW_D(val,X) _FP_PACK_RAW_2(D,val,X) argument
77 #define FP_PACK_RAW_DP(val,X) \ argument
[all …]
/linux/drivers/cpufreq/
H A Dlonghaul.h12 ESOFTBF:1, // 19
24 EnableSoftBusRatio:1, // 8
25 EnableSoftVID:1, // 9
26 EnableSoftBSEL:1, // 10
28 SoftBusRatio4:1, // 14
29 VRMRev:1, // 15
38 MaxMHzBR4:1, // 43
43 MinMHzBR4:1, // 59
56 * VIA C3 Samuel 1 & Samuel 2 (stepping 0)
59 -1, /* 0000 -> RESERVED */
[all …]

12345678910>>...51