Lines Matching +full:1 +full:x
53 #define HOST_SMC_MSG(x) ((x) << 0) argument
56 #define HOST_SMC_RESP(x) ((x) << 8) argument
59 #define SMC_HOST_MSG(x) ((x) << 16) argument
62 #define SMC_HOST_RESP(x) ((x) << 24) argument
67 #define DCCG_DISP1_SLOW_SELECT(x) ((x) << 0) argument
70 #define DCCG_DISP2_SLOW_SELECT(x) ((x) << 4) argument
75 #define SPLL_RESET (1 << 0)
76 #define SPLL_SLEEP (1 << 1)
77 #define SPLL_BYPASS_EN (1 << 3)
78 #define SPLL_REF_DIV(x) ((x) << 4) argument
80 #define SPLL_PDIV_A(x) ((x) << 20) argument
83 #define SCLK_MUX_SEL(x) ((x) << 0) argument
85 #define SCLK_MUX_UPDATE (1 << 26)
87 #define SPLL_FB_DIV(x) ((x) << 0) argument
89 #define SPLL_DITHEN (1 << 28)
91 #define SPLL_CHG_STATUS (1 << 1)
94 # define MPLL_MCLK_SEL (1 << 11)
95 # define SS_SSEN (1 << 24)
96 # define SS_DSMODE_EN (1 << 25)
99 #define CLKF(x) ((x) << 0) argument
101 #define CLKR(x) ((x) << 7) argument
103 #define CLKFRAC(x) ((x) << 12) argument
105 #define YCLK_POST_DIV(x) ((x) << 17) argument
107 #define IBIAS(x) ((x) << 20) argument
109 #define RESET (1 << 30)
110 #define PDNB (1 << 31)
112 #define BYPASS (1 << 19)
113 #define BIAS_GEN_PDNB (1 << 24)
114 #define RESET_EN (1 << 25)
115 #define VCO_MODE (1 << 29)
120 # define GLOBAL_PWRMGT_EN (1 << 0)
121 # define STATIC_PM_EN (1 << 1)
122 # define THERMAL_PROTECTION_DIS (1 << 2)
123 # define THERMAL_PROTECTION_TYPE (1 << 3)
124 # define ENABLE_GEN2PCIE (1 << 4)
125 # define ENABLE_GEN2XSP (1 << 5)
126 # define SW_SMIO_INDEX(x) ((x) << 6) argument
129 # define LOW_VOLT_D2_ACPI (1 << 8)
130 # define LOW_VOLT_D3_ACPI (1 << 9)
131 # define VOLT_PWRMGT_EN (1 << 10)
132 # define BACKBIAS_PAD_EN (1 << 18)
133 # define BACKBIAS_VALUE (1 << 19)
134 # define DYN_SPREAD_SPECTRUM_EN (1 << 23)
135 # define AC_DC_SW (1 << 24)
138 # define SCLK_PWRMGT_OFF (1 << 0)
139 # define SCLK_LOW_D1 (1 << 1)
140 # define FIR_RESET (1 << 4)
141 # define FIR_FORCE_TREND_SEL (1 << 5)
142 # define FIR_TREND_MODE (1 << 6)
143 # define DYN_GFX_CLK_OFF_EN (1 << 7)
144 # define GFX_CLK_FORCE_ON (1 << 8)
145 # define GFX_CLK_REQUEST_OFF (1 << 9)
146 # define GFX_CLK_FORCE_OFF (1 << 10)
147 # define GFX_CLK_OFF_ACPI_D1 (1 << 11)
148 # define GFX_CLK_OFF_ACPI_D2 (1 << 12)
149 # define GFX_CLK_OFF_ACPI_D3 (1 << 13)
150 # define DYN_LIGHT_SLEEP_EN (1 << 14)
152 # define DLL_SPEED(x) ((x) << 0) argument
154 # define MPLL_PWRMGT_OFF (1 << 5)
155 # define DLL_READY (1 << 6)
156 # define MC_INT_CNTL (1 << 7)
157 # define MRDCKA0_PDNB (1 << 8)
158 # define MRDCKA1_PDNB (1 << 9)
159 # define MRDCKB0_PDNB (1 << 10)
160 # define MRDCKB1_PDNB (1 << 11)
161 # define MRDCKC0_PDNB (1 << 12)
162 # define MRDCKC1_PDNB (1 << 13)
163 # define MRDCKD0_PDNB (1 << 14)
164 # define MRDCKD1_PDNB (1 << 15)
165 # define MRDCKA0_RESET (1 << 16)
166 # define MRDCKA1_RESET (1 << 17)
167 # define MRDCKB0_RESET (1 << 18)
168 # define MRDCKB1_RESET (1 << 19)
169 # define MRDCKC0_RESET (1 << 20)
170 # define MRDCKC1_RESET (1 << 21)
171 # define MRDCKD0_RESET (1 << 22)
172 # define MRDCKD1_RESET (1 << 23)
173 # define DLL_READY_READ (1 << 24)
174 # define USE_DISPLAY_GAP (1 << 25)
175 # define USE_DISPLAY_URGENT_NORMAL (1 << 26)
176 # define MPLL_TURNOFF_D2 (1 << 28)
178 # define MRDCKA0_BYPASS (1 << 24)
179 # define MRDCKA1_BYPASS (1 << 25)
180 # define MRDCKB0_BYPASS (1 << 26)
181 # define MRDCKB1_BYPASS (1 << 27)
182 # define MRDCKC0_BYPASS (1 << 28)
183 # define MRDCKC1_BYPASS (1 << 29)
184 # define MRDCKD0_BYPASS (1 << 30)
185 # define MRDCKD1_BYPASS (1 << 31)
188 # define CG_R(x) ((x) << 0) argument
190 # define CG_L(x) ((x) << 16) argument
194 # define DISP1_GAP(x) ((x) << 0) argument
196 # define DISP2_GAP(x) ((x) << 2) argument
198 # define VBI_TIMER_COUNT(x) ((x) << 4) argument
200 # define VBI_TIMER_UNIT(x) ((x) << 20) argument
202 # define DISP1_GAP_MCHG(x) ((x) << 24) argument
204 # define DISP2_GAP_MCHG(x) ((x) << 26) argument
208 #define CG_CLIENT_REQ(x) ((x) << 0) argument
211 #define CG_CLIENT_RESP(x) ((x) << 8) argument
214 #define CLIENT_CG_REQ(x) ((x) << 16) argument
217 #define CLIENT_CG_RESP(x) ((x) << 24) argument
222 #define SSEN (1 << 0)
226 #define CLKV(x) ((x) << 0) argument
229 #define CLKS(x) ((x) << 0) argument
258 #define MC_RD_ENABLE_MCD(x) ((x) << 8) argument
268 #define MC_RD_ENABLE(x) ((x) << 4) argument
274 # define MEM_LS_ENABLE (1 << 19)
277 #define STATE0(x) ((x) << 0) argument
279 #define STATE1(x) ((x) << 5) argument
281 #define STATE2(x) ((x) << 10) argument
283 #define STATE3(x) ((x) << 15) argument
297 # define PMG_PWRSTATE (1 << 16)
311 #define CG_SEQ_REQ(x) ((x) << 0) argument
314 #define CG_SEQ_RESP(x) ((x) << 8) argument
317 #define SEQ_CG_REQ(x) ((x) << 16) argument
320 #define SEQ_CG_RESP(x) ((x) << 24) argument
358 # define UPLL_PDIV_A(x) ((x) << 0) argument
360 # define UPLL_PDIV_B(x) ((x) << 8) argument
362 # define VCLK_SRC_SEL(x) ((x) << 20) argument
364 # define DCLK_SRC_SEL(x) ((x) << 25) argument
367 # define UPLL_FB_DIV(x) ((x) << 0) argument
377 # define DCLK_DIR_CNTL_EN (1 << 8)
379 # define DCLK_STATUS (1 << 0)
385 # define RLC_ENABLE (1 << 0)
386 # define GFX_POWER_GATING_ENABLE (1 << 7)
387 # define GFX_POWER_GATING_SRC (1 << 8)
388 # define DYN_PER_SIMD_PG_ENABLE (1 << 27)
389 # define LB_CNT_SPIM_ACTIVE (1 << 30)
390 # define LOAD_BALANCE_ENABLE (1 << 31)
413 #define INSTANCE_INDEX(x) ((x) << 0) argument
414 #define SE_INDEX(x) ((x) << 16) argument
415 #define INSTANCE_BROADCAST_WRITES (1 << 30)
416 #define SE_BROADCAST_WRITES (1 << 31)
419 #define WRITE_DIS (1 << 0)
421 #define BACKEND_DISABLE(x) ((x) << 16) argument
423 #define NUM_PIPES(x) ((x) << 0) argument
425 #define PIPE_INTERLEAVE_SIZE(x) ((x) << 4) argument
426 #define BANK_INTERLEAVE_SIZE(x) ((x) << 8) argument
427 #define NUM_SHADER_ENGINES(x) ((x) << 12) argument
428 #define SHADER_ENGINE_TILE_SIZE(x) ((x) << 16) argument
429 #define NUM_GPUS(x) ((x) << 20) argument
430 #define MULTI_GPU_TILE_SIZE(x) ((x) << 24) argument
431 #define ROW_SIZE(x) ((x) << 28) argument
436 #define HDP_FLUSH_INVALIDATE_CACHE (1 << 0)
449 #define FB_READ_EN (1 << 0)
450 #define FB_WRITE_EN (1 << 1)
462 #define CP_ME_HALT (1 << 28)
463 #define CP_PFP_HALT (1 << 26)
468 #define STQ_SPLIT(x) ((x) << 0) argument
473 #define ROQ_IB1_START(x) ((x) << 0) argument
474 #define ROQ_IB2_START(x) ((x) << 8) argument
477 #define RB_BUFSZ(x) ((x) << 0) argument
478 #define RB_BLKSZ(x) ((x) << 8) argument
479 #define RB_NO_UPDATE (1 << 27)
480 #define RB_RPTR_WR_ENA (1 << 31)
484 #define RB_RPTR_SWAP(x) ((x) << 0) argument
497 # define DCCG_AUDIO_DTO0_SOURCE_SEL(x) ((x) << 0) /* crtc0 - crtc5 */ argument
498 # define DCCG_AUDIO_DTO_SEL (1 << 4) /* 0=dto0 1=dto1 */
504 # define DCCG_AUDIO_DTO_WALLCLOCK_RATIO(x) (((x) & 7) << 0) argument
512 # define DCCG_AUDIO_DTO1_USE_512FBR_DTO (1 << 3)
515 # define DENTIST_DPREFCLK_WDIVIDER(x) (((x) & 0x7f) << 24) argument
521 # define HDMI_KEEPOUT_MODE (1 << 0)
522 # define HDMI_PACKET_GEN_VERSION (1 << 4) /* 0 = r6xx compat */
523 # define HDMI_ERROR_ACK (1 << 8)
524 # define HDMI_ERROR_MASK (1 << 9)
525 # define HDMI_DEEP_COLOR_ENABLE (1 << 24)
526 # define HDMI_DEEP_COLOR_DEPTH(x) (((x) & 3) << 28) argument
528 # define HDMI_30BIT_DEEP_COLOR 1
532 # define HDMI_ACTIVE_AVMUTE (1 << 0)
533 # define HDMI_AUDIO_PACKET_ERROR (1 << 16)
534 # define HDMI_VBI_PACKET_ERROR (1 << 20)
536 # define HDMI_AUDIO_DELAY_EN(x) (((x) & 3) << 4) argument
537 # define HDMI_AUDIO_PACKETS_PER_LINE(x) (((x) & 0x1f) << 16) argument
539 # define HDMI_ACR_SEND (1 << 0)
540 # define HDMI_ACR_CONT (1 << 1)
541 # define HDMI_ACR_SELECT(x) (((x) & 3) << 4) argument
543 # define HDMI_ACR_32 1
546 # define HDMI_ACR_SOURCE (1 << 8) /* 0 - hw; 1 - cts value */
547 # define HDMI_ACR_AUTO_SEND (1 << 12)
548 # define HDMI_ACR_N_MULTIPLE(x) (((x) & 7) << 16) argument
549 # define HDMI_ACR_X1 1
552 # define HDMI_ACR_AUDIO_PRIORITY (1 << 31)
554 # define HDMI_NULL_SEND (1 << 0)
555 # define HDMI_GC_SEND (1 << 4)
556 # define HDMI_GC_CONT (1 << 5) /* 0 - once; 1 - every frame */
558 # define HDMI_AVI_INFO_SEND (1 << 0)
559 # define HDMI_AVI_INFO_CONT (1 << 1)
560 # define HDMI_AUDIO_INFO_SEND (1 << 4)
561 # define HDMI_AUDIO_INFO_CONT (1 << 5)
562 # define HDMI_MPEG_INFO_SEND (1 << 8)
563 # define HDMI_MPEG_INFO_CONT (1 << 9)
565 # define HDMI_AVI_INFO_LINE(x) (((x) & 0x3f) << 0) argument
567 # define HDMI_AUDIO_INFO_LINE(x) (((x) & 0x3f) << 8) argument
568 # define HDMI_MPEG_INFO_LINE(x) (((x) & 0x3f) << 16) argument
570 # define HDMI_GENERIC0_SEND (1 << 0)
571 # define HDMI_GENERIC0_CONT (1 << 1)
572 # define HDMI_GENERIC1_SEND (1 << 4)
573 # define HDMI_GENERIC1_CONT (1 << 5)
574 # define HDMI_GENERIC0_LINE(x) (((x) & 0x3f) << 16) argument
575 # define HDMI_GENERIC1_LINE(x) (((x) & 0x3f) << 24) argument
577 # define HDMI_GC_AVMUTE (1 << 0)
578 # define HDMI_GC_AVMUTE_CONT (1 << 2)
580 # define AFMT_AUDIO_LAYOUT_OVRD (1 << 0)
581 # define AFMT_AUDIO_LAYOUT_SELECT (1 << 1)
582 # define AFMT_60958_CS_SOURCE (1 << 4)
583 # define AFMT_AUDIO_CHANNEL_ENABLE(x) (((x) & 0xff) << 8) argument
584 # define AFMT_DP_AUDIO_STREAM_ID(x) (((x) & 0xff) << 16) argument
586 # define AFMT_AVI_INFO_CHECKSUM(x) (((x) & 0xff) << 0) argument
587 # define AFMT_AVI_INFO_S(x) (((x) & 3) << 8) argument
588 # define AFMT_AVI_INFO_B(x) (((x) & 3) << 10) argument
589 # define AFMT_AVI_INFO_A(x) (((x) & 1) << 12) argument
590 # define AFMT_AVI_INFO_Y(x) (((x) & 3) << 13) argument
592 # define AFMT_AVI_INFO_Y_YCBCR422 1
594 # define AFMT_AVI_INFO_Y_A_B_S(x) (((x) & 0xff) << 8) argument
595 # define AFMT_AVI_INFO_R(x) (((x) & 0xf) << 16) argument
596 # define AFMT_AVI_INFO_M(x) (((x) & 0x3) << 20) argument
597 # define AFMT_AVI_INFO_C(x) (((x) & 0x3) << 22) argument
598 # define AFMT_AVI_INFO_C_M_R(x) (((x) & 0xff) << 16) argument
599 # define AFMT_AVI_INFO_SC(x) (((x) & 0x3) << 24) argument
600 # define AFMT_AVI_INFO_Q(x) (((x) & 0x3) << 26) argument
601 # define AFMT_AVI_INFO_EC(x) (((x) & 0x3) << 28) argument
602 # define AFMT_AVI_INFO_ITC(x) (((x) & 0x1) << 31) argument
603 # define AFMT_AVI_INFO_ITC_EC_Q_SC(x) (((x) & 0xff) << 24) argument
605 # define AFMT_AVI_INFO_VIC(x) (((x) & 0x7f) << 0) /* don't use avi infoframe v1 */ argument
606 # define AFMT_AVI_INFO_PR(x) (((x) & 0xf) << 8) /* don't use avi infoframe v1 */ argument
607 # define AFMT_AVI_INFO_CN(x) (((x) & 0x3) << 12) argument
608 # define AFMT_AVI_INFO_YQ(x) (((x) & 0x3) << 14) argument
609 # define AFMT_AVI_INFO_TOP(x) (((x) & 0xffff) << 16) argument
611 # define AFMT_AVI_INFO_BOTTOM(x) (((x) & 0xffff) << 0) argument
612 # define AFMT_AVI_INFO_LEFT(x) (((x) & 0xffff) << 16) argument
614 # define AFMT_AVI_INFO_RIGHT(x) (((x) & 0xffff) << 0) argument
615 # define AFMT_AVI_INFO_VERSION(x) (((x) & 3) << 24) argument
617 # define AFMT_MPEG_INFO_CHECKSUM(x) (((x) & 0xff) << 0) argument
618 # define AFMT_MPEG_INFO_MB0(x) (((x) & 0xff) << 8) argument
619 # define AFMT_MPEG_INFO_MB1(x) (((x) & 0xff) << 16) argument
620 # define AFMT_MPEG_INFO_MB2(x) (((x) & 0xff) << 24) argument
622 # define AFMT_MPEG_INFO_MB3(x) (((x) & 0xff) << 0) argument
623 # define AFMT_MPEG_INFO_MF(x) (((x) & 3) << 8) argument
624 # define AFMT_MPEG_INFO_FR(x) (((x) & 1) << 12) argument
642 # define HDMI_ACR_CTS_32(x) (((x) & 0xfffff) << 12) argument
644 # define HDMI_ACR_N_32(x) (((x) & 0xfffff) << 0) argument
646 # define HDMI_ACR_CTS_44(x) (((x) & 0xfffff) << 12) argument
648 # define HDMI_ACR_N_44(x) (((x) & 0xfffff) << 0) argument
650 # define HDMI_ACR_CTS_48(x) (((x) & 0xfffff) << 12) argument
652 # define HDMI_ACR_N_48(x) (((x) & 0xfffff) << 0) argument
656 # define AFMT_AUDIO_INFO_CHECKSUM(x) (((x) & 0xff) << 0) argument
657 # define AFMT_AUDIO_INFO_CC(x) (((x) & 7) << 8) argument
658 # define AFMT_AUDIO_INFO_CT(x) (((x) & 0xf) << 11) argument
659 # define AFMT_AUDIO_INFO_CHECKSUM_OFFSET(x) (((x) & 0xff) << 16) argument
660 # define AFMT_AUDIO_INFO_CXT(x) (((x) & 0x1f) << 24) argument
662 # define AFMT_AUDIO_INFO_CA(x) (((x) & 0xff) << 0) argument
663 # define AFMT_AUDIO_INFO_LSV(x) (((x) & 0xf) << 11) argument
664 # define AFMT_AUDIO_INFO_DM_INH(x) (((x) & 1) << 15) argument
665 # define AFMT_AUDIO_INFO_DM_INH_LSV(x) (((x) & 0xff) << 8) argument
666 # define AFMT_AUDIO_INFO_LFEBPL(x) (((x) & 3) << 16) argument
668 # define AFMT_60958_CS_A(x) (((x) & 1) << 0) argument
669 # define AFMT_60958_CS_B(x) (((x) & 1) << 1) argument
670 # define AFMT_60958_CS_C(x) (((x) & 1) << 2) argument
671 # define AFMT_60958_CS_D(x) (((x) & 3) << 3) argument
672 # define AFMT_60958_CS_MODE(x) (((x) & 3) << 6) argument
673 # define AFMT_60958_CS_CATEGORY_CODE(x) (((x) & 0xff) << 8) argument
674 # define AFMT_60958_CS_SOURCE_NUMBER(x) (((x) & 0xf) << 16) argument
675 # define AFMT_60958_CS_CHANNEL_NUMBER_L(x) (((x) & 0xf) << 20) argument
676 # define AFMT_60958_CS_SAMPLING_FREQUENCY(x) (((x) & 0xf) << 24) argument
677 # define AFMT_60958_CS_CLOCK_ACCURACY(x) (((x) & 3) << 28) argument
679 # define AFMT_60958_CS_WORD_LENGTH(x) (((x) & 0xf) << 0) argument
680 # define AFMT_60958_CS_ORIGINAL_SAMPLING_FREQUENCY(x) (((x) & 0xf) << 4) argument
681 # define AFMT_60958_CS_VALID_L(x) (((x) & 1) << 16) argument
682 # define AFMT_60958_CS_VALID_R(x) (((x) & 1) << 18) argument
683 # define AFMT_60958_CS_CHANNEL_NUMBER_R(x) (((x) & 0xf) << 20) argument
685 # define AFMT_AUDIO_CRC_EN (1 << 0)
687 # define AFMT_RAMP_MAX_COUNT(x) (((x) & 0xffffff) << 0) argument
688 # define AFMT_RAMP_DATA_SIGN (1 << 31)
690 # define AFMT_RAMP_MIN_COUNT(x) (((x) & 0xffffff) << 0) argument
691 # define AFMT_AUDIO_TEST_CH_DISABLE(x) (((x) & 0xff) << 24) argument
693 # define AFMT_RAMP_INC_COUNT(x) (((x) & 0xffffff) << 0) argument
695 # define AFMT_RAMP_DEC_COUNT(x) (((x) & 0xffffff) << 0) argument
697 # define AFMT_60958_CS_CHANNEL_NUMBER_2(x) (((x) & 0xf) << 0) argument
698 # define AFMT_60958_CS_CHANNEL_NUMBER_3(x) (((x) & 0xf) << 4) argument
699 # define AFMT_60958_CS_CHANNEL_NUMBER_4(x) (((x) & 0xf) << 8) argument
700 # define AFMT_60958_CS_CHANNEL_NUMBER_5(x) (((x) & 0xf) << 12) argument
701 # define AFMT_60958_CS_CHANNEL_NUMBER_6(x) (((x) & 0xf) << 16) argument
702 # define AFMT_60958_CS_CHANNEL_NUMBER_7(x) (((x) & 0xf) << 20) argument
704 # define AFMT_AUDIO_ENABLE (1 << 4)
705 # define AFMT_AUDIO_HBR_ENABLE (1 << 8)
706 # define AFMT_AZ_FORMAT_WTRIG (1 << 28)
707 # define AFMT_AZ_FORMAT_WTRIG_INT (1 << 29)
708 # define AFMT_AZ_AUDIO_ENABLE_CHG (1 << 30)
710 # define AFMT_AUDIO_SAMPLE_SEND (1 << 0)
711 # define AFMT_RESET_FIFO_WHEN_AUDIO_DIS (1 << 11) /* set to 1 */
712 # define AFMT_AUDIO_TEST_EN (1 << 12)
713 # define AFMT_AUDIO_CHANNEL_SWAP (1 << 24)
714 # define AFMT_60958_CS_UPDATE (1 << 26)
715 # define AFMT_AZ_AUDIO_ENABLE_CHG_MASK (1 << 27)
716 # define AFMT_AZ_FORMAT_WTRIG_MASK (1 << 28)
717 # define AFMT_AZ_FORMAT_WTRIG_ACK (1 << 29)
718 # define AFMT_AZ_AUDIO_ENABLE_CHG_ACK (1 << 30)
720 # define AFMT_GENERIC0_UPDATE (1 << 2)
722 # define AFMT_AUDIO_INFO_SOURCE (1 << 6) /* 0 - sound block; 1 - afmt regs */
723 # define AFMT_AUDIO_INFO_UPDATE (1 << 7)
724 # define AFMT_MPEG_INFO_UPDATE (1 << 10)
729 #define SPEAKER_ALLOCATION(x) (((x) & 0x7f) << 0) argument
732 #define HDMI_CONNECTION (1 << 16)
733 #define DP_CONNECTION (1 << 17)
749 # define MAX_CHANNELS(x) (((x) & 0x7) << 0) argument
751 # define SUPPORTED_FREQUENCIES(x) (((x) & 0xff) << 8) argument
752 # define DESCRIPTOR_BYTE_2(x) (((x) & 0xff) << 16) argument
753 # define SUPPORTED_FREQUENCIES_STEREO(x) (((x) & 0xff) << 24) /* LPCM only */ argument
765 # define HBR_CHANNEL_COUNT(x) (((x) & 0x7) << 0) argument
766 # define COMPRESSED_CHANNEL_COUNT(x) (((x) & 0x7) << 4) argument
769 * 1-7 = channel count - 1
772 # define VIDEO_LIPSYNC(x) (((x) & 0xff) << 0) argument
773 # define AUDIO_LIPSYNC(x) (((x) & 0xff) << 8) argument
776 * x = legal delay value
780 # define HBR_CAPABLE (1 << 0) /* enabled by default */
783 # define DISPLAY0_TYPE(x) (((x) & 0x3) << 0) argument
785 # define DISPLAY_TYPE_HDMI 1
787 # define DISPLAY0_ID(x) (((x) & 0x3f) << 2) argument
788 # define DISPLAY1_TYPE(x) (((x) & 0x3) << 8) argument
789 # define DISPLAY1_ID(x) (((x) & 0x3f) << 10) argument
790 # define DISPLAY2_TYPE(x) (((x) & 0x3) << 16) argument
791 # define DISPLAY2_ID(x) (((x) & 0x3f) << 18) argument
792 # define DISPLAY3_TYPE(x) (((x) & 0x3) << 24) argument
793 # define DISPLAY3_ID(x) (((x) & 0x3f) << 26) argument
795 # define DISPLAY4_TYPE(x) (((x) & 0x3) << 0) argument
796 # define DISPLAY4_ID(x) (((x) & 0x3f) << 2) argument
797 # define DISPLAY5_TYPE(x) (((x) & 0x3) << 8) argument
798 # define DISPLAY5_ID(x) (((x) & 0x3f) << 10) argument
800 # define NUMBER_OF_DISPLAY_ID(x) (((x) & 0x7) << 0) argument
803 # define AZ_FORCE_CODEC_WAKE (1 << 0)
804 # define PIN0_JACK_DETECTION_ENABLE (1 << 4)
805 # define PIN1_JACK_DETECTION_ENABLE (1 << 5)
806 # define PIN2_JACK_DETECTION_ENABLE (1 << 6)
807 # define PIN3_JACK_DETECTION_ENABLE (1 << 7)
808 # define PIN0_UNSOLICITED_RESPONSE_ENABLE (1 << 8)
809 # define PIN1_UNSOLICITED_RESPONSE_ENABLE (1 << 9)
810 # define PIN2_UNSOLICITED_RESPONSE_ENABLE (1 << 10)
811 # define PIN3_UNSOLICITED_RESPONSE_ENABLE (1 << 11)
812 # define CODEC_HOT_PLUG_ENABLE (1 << 12)
813 # define PIN0_AUDIO_ENABLED (1 << 24)
814 # define PIN1_AUDIO_ENABLED (1 << 25)
815 # define PIN2_AUDIO_ENABLED (1 << 26)
816 # define PIN3_AUDIO_ENABLED (1 << 27)
817 # define AUDIO_ENABLED (1 << 31)
821 #define INACTIVE_QD_PIPES(x) ((x) << 8) argument
823 #define INACTIVE_SIMDS(x) ((x) << 16) argument
827 #define GRBM_READ_TIMEOUT(x) ((x) << 0) argument
829 #define SOFT_RESET_CP (1 << 0)
830 #define SOFT_RESET_CB (1 << 1)
831 #define SOFT_RESET_DB (1 << 3)
832 #define SOFT_RESET_PA (1 << 5)
833 #define SOFT_RESET_SC (1 << 6)
834 #define SOFT_RESET_SPI (1 << 8)
835 #define SOFT_RESET_SH (1 << 9)
836 #define SOFT_RESET_SX (1 << 10)
837 #define SOFT_RESET_TC (1 << 11)
838 #define SOFT_RESET_TA (1 << 12)
839 #define SOFT_RESET_VC (1 << 13)
840 #define SOFT_RESET_VGT (1 << 14)
844 #define SRBM_RQ_PENDING (1 << 5)
845 #define CF_RQ_PENDING (1 << 7)
846 #define PF_RQ_PENDING (1 << 8)
847 #define GRBM_EE_BUSY (1 << 10)
848 #define SX_CLEAN (1 << 11)
849 #define DB_CLEAN (1 << 12)
850 #define CB_CLEAN (1 << 13)
851 #define TA_BUSY (1 << 14)
852 #define VGT_BUSY_NO_DMA (1 << 16)
853 #define VGT_BUSY (1 << 17)
854 #define SX_BUSY (1 << 20)
855 #define SH_BUSY (1 << 21)
856 #define SPI_BUSY (1 << 22)
857 #define SC_BUSY (1 << 24)
858 #define PA_BUSY (1 << 25)
859 #define DB_BUSY (1 << 26)
860 #define CP_COHERENCY_BUSY (1 << 28)
861 #define CP_BUSY (1 << 29)
862 #define CB_BUSY (1 << 30)
863 #define GUI_ACTIVE (1 << 31)
866 #define SE_SX_CLEAN (1 << 0)
867 #define SE_DB_CLEAN (1 << 1)
868 #define SE_CB_CLEAN (1 << 2)
869 #define SE_TA_BUSY (1 << 25)
870 #define SE_SX_BUSY (1 << 26)
871 #define SE_SPI_BUSY (1 << 27)
872 #define SE_SH_BUSY (1 << 28)
873 #define SE_SC_BUSY (1 << 29)
874 #define SE_DB_BUSY (1 << 30)
875 #define SE_CB_BUSY (1 << 31)
880 #define DIG_THERM_DPM(x) ((x) << 14) argument
885 #define DIG_THERM_INTH(x) ((x) << 8) argument
888 #define DIG_THERM_INTL(x) ((x) << 16) argument
891 #define THERM_INT_MASK_HIGH (1 << 24)
892 #define THERM_INT_MASK_LOW (1 << 25)
895 #define TN_DIG_THERM_INTH(x) ((x) << 0) argument
898 #define TN_DIG_THERM_INTL(x) ((x) << 8) argument
901 #define TN_THERM_INT_MASK_HIGH (1 << 24)
902 #define TN_THERM_INT_MASK_LOW (1 << 25)
905 #define ASIC_T(x) ((x) << 16) argument
944 #define CHANSIZE_OVERRIDE (1 << 11)
955 #define ENABLE_L1_TLB (1 << 0)
956 #define ENABLE_L1_FRAGMENT_PROCESSING (1 << 1)
958 #define SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 3)
962 #define EFFECTIVE_L1_TLB_SIZE(x) ((x)<<15) argument
963 #define EFFECTIVE_L1_QUEUE_SIZE(x) ((x)<<18) argument
978 #define CLIP_VTX_REORDER_ENA (1 << 0)
979 #define NUM_CLIP_SEQ(x) ((x) << 1) argument
987 #define SC_PRIM_FIFO_SIZE(x) ((x) << 0) argument
988 #define SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 12) argument
989 #define SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 20) argument
991 #define FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) argument
992 #define FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16) argument
1010 #define USE_HASH_FUNCTION (1 << 0)
1011 #define NUMBER_OF_SETS(x) ((x) << 1) argument
1012 #define FLUSH_ALL_ON_EVENT (1 << 10)
1013 #define STALL_ON_EVENT (1 << 11)
1015 #define ES_FLUSH_CTL(x) ((x) << 0) argument
1016 #define GS_FLUSH_CTL(x) ((x) << 3) argument
1017 #define ACK_FLUSH_CTL(x) ((x) << 6) argument
1018 #define SYNC_FLUSH_CTL (1 << 8)
1021 #define GPR_WRITE_PRIORITY(x) ((x) << 0) argument
1023 #define VTX_DONE_DELAY(x) ((x) << 0) argument
1024 #define INTERP_ONE_PRIM_PER_ROW (1 << 4)
1027 #define NUM_INTERP(x) ((x)<<0) argument
1028 #define POSITION_ENA (1<<8)
1029 #define POSITION_CENTROID (1<<9)
1030 #define POSITION_ADDR(x) ((x)<<10) argument
1031 #define PARAM_GEN(x) ((x)<<15) argument
1032 #define PARAM_GEN_ADDR(x) ((x)<<19) argument
1033 #define BARYC_SAMPLE_CNTL(x) ((x)<<26) argument
1034 #define PERSP_GRADIENT_ENA (1<<28)
1035 #define LINEAR_GRADIENT_ENA (1<<29)
1036 #define POSITION_SAMPLE (1<<30)
1037 #define BARYC_AT_SAMPLE_ENA (1<<31)
1040 #define VC_ENABLE (1 << 0)
1041 #define EXPORT_SRC_C (1 << 1)
1042 #define CS_PRIO(x) ((x) << 18) argument
1043 #define LS_PRIO(x) ((x) << 20) argument
1044 #define HS_PRIO(x) ((x) << 22) argument
1045 #define PS_PRIO(x) ((x) << 24) argument
1046 #define VS_PRIO(x) ((x) << 26) argument
1047 #define GS_PRIO(x) ((x) << 28) argument
1048 #define ES_PRIO(x) ((x) << 30) argument
1050 #define NUM_PS_GPRS(x) ((x) << 0) argument
1051 #define NUM_VS_GPRS(x) ((x) << 16) argument
1052 #define NUM_CLAUSE_TEMP_GPRS(x) ((x) << 28) argument
1054 #define NUM_GS_GPRS(x) ((x) << 0) argument
1055 #define NUM_ES_GPRS(x) ((x) << 16) argument
1057 #define NUM_HS_GPRS(x) ((x) << 0) argument
1058 #define NUM_LS_GPRS(x) ((x) << 16) argument
1062 #define NUM_PS_THREADS(x) ((x) << 0) argument
1063 #define NUM_VS_THREADS(x) ((x) << 8) argument
1064 #define NUM_GS_THREADS(x) ((x) << 16) argument
1065 #define NUM_ES_THREADS(x) ((x) << 24) argument
1067 #define NUM_HS_THREADS(x) ((x) << 0) argument
1068 #define NUM_LS_THREADS(x) ((x) << 8) argument
1070 #define NUM_PS_STACK_ENTRIES(x) ((x) << 0) argument
1071 #define NUM_VS_STACK_ENTRIES(x) ((x) << 16) argument
1073 #define NUM_GS_STACK_ENTRIES(x) ((x) << 0) argument
1074 #define NUM_ES_STACK_ENTRIES(x) ((x) << 16) argument
1076 #define NUM_HS_STACK_ENTRIES(x) ((x) << 0) argument
1077 #define NUM_LS_STACK_ENTRIES(x) ((x) << 16) argument
1086 #define CACHE_FIFO_SIZE(x) ((x) << 0) argument
1087 #define FETCH_FIFO_HIWATER(x) ((x) << 8) argument
1088 #define DONE_FIFO_HIWATER(x) ((x) << 16) argument
1089 #define ALU_UPDATE_FIFO_HIWATER(x) ((x) << 24) argument
1092 #define ENABLE_NEW_SMX_ADDRESS (1 << 16)
1094 #define COLOR_BUFFER_SIZE(x) ((x) << 0) argument
1095 #define POSITION_BUFFER_SIZE(x) ((x) << 8) argument
1096 #define SMX_BUFFER_SIZE(x) ((x) << 16) argument
1110 #define DISABLE_CUBE_WRAP (1 << 0)
1111 #define DISABLE_CUBE_ANISO (1 << 1)
1112 #define SYNC_GRADIENT (1 << 24)
1113 #define SYNC_WALKER (1 << 25)
1114 #define SYNC_ALIGNER (1 << 26)
1120 #define CACHE_INVALIDATION(x) ((x) << 0) argument
1122 #define TC_ONLY 1
1124 #define AUTO_INVLD_EN(x) ((x) << 6) argument
1126 #define ES_AUTO 1
1137 #define ENABLE_CONTEXT (1 << 0)
1138 #define PAGE_TABLE_DEPTH(x) (((x) & 3) << 1) argument
1139 #define RANGE_PROTECTION_FAULT_ENABLE_DEFAULT (1 << 4)
1147 #define REQUEST_TYPE(x) (((x) & 0xf) << 0) argument
1151 #define ENABLE_L2_CACHE (1 << 0)
1152 #define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1)
1153 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9)
1154 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 14) argument
1156 #define INVALIDATE_ALL_L1_TLBS (1 << 0)
1157 #define INVALIDATE_L2_CACHE (1 << 1)
1159 #define BANK_SELECT(x) ((x) << 0) argument
1160 #define CACHE_UPDATE_MODE(x) ((x) << 6) argument
1162 #define L2_BUSY (1 << 0)
1169 #define RLC_RQ_PENDING (1 << 3)
1170 #define GRBM_RQ_PENDING (1 << 5)
1171 #define VMC_BUSY (1 << 8)
1172 #define MCB_BUSY (1 << 9)
1173 #define MCB_NON_DISPLAY_BUSY (1 << 10)
1174 #define MCC_BUSY (1 << 11)
1175 #define MCD_BUSY (1 << 12)
1176 #define SEM_BUSY (1 << 14)
1177 #define RLC_BUSY (1 << 15)
1178 #define IH_BUSY (1 << 17)
1180 #define DMA_BUSY (1 << 5)
1183 #define SOFT_RESET_BIF (1 << 1)
1184 #define SOFT_RESET_CG (1 << 2)
1185 #define SOFT_RESET_DC (1 << 5)
1186 #define SOFT_RESET_GRBM (1 << 8)
1187 #define SOFT_RESET_HDP (1 << 9)
1188 #define SOFT_RESET_IH (1 << 10)
1189 #define SOFT_RESET_MC (1 << 11)
1190 #define SOFT_RESET_RLC (1 << 13)
1191 #define SOFT_RESET_ROM (1 << 14)
1192 #define SOFT_RESET_SEM (1 << 15)
1193 #define SOFT_RESET_VMC (1 << 17)
1194 #define SOFT_RESET_DMA (1 << 20)
1195 #define SOFT_RESET_TST (1 << 21)
1196 #define SOFT_RESET_REGBB (1 << 22)
1197 #define SOFT_RESET_ORB (1 << 23)
1207 #define PRIORITY_OFF (1 << 16)
1208 #define PRIORITY_ALWAYS_ON (1 << 20)
1211 # define LATENCY_WATERMARK_MASK(x) ((x) << 16) argument
1213 # define LATENCY_LOW_WATERMARK(x) ((x) << 0) argument
1214 # define LATENCY_HIGH_WATERMARK(x) ((x) << 16) argument
1217 # define DMIF_BUFFERS_ALLOCATED(x) ((x) << 0) argument
1218 # define DMIF_BUFFERS_ALLOCATED_COMPLETED (1 << 4)
1221 # define IH_RB_ENABLE (1 << 0)
1222 # define IH_IB_SIZE(x) ((x) << 1) /* log2 */ argument
1223 # define IH_RB_FULL_DRAIN_ENABLE (1 << 6)
1224 # define IH_WPTR_WRITEBACK_ENABLE (1 << 8)
1225 # define IH_WPTR_WRITEBACK_TIMER(x) ((x) << 9) /* log2 */ argument
1226 # define IH_WPTR_OVERFLOW_ENABLE (1 << 16)
1227 # define IH_WPTR_OVERFLOW_CLEAR (1 << 31)
1231 # define RB_OVERFLOW (1 << 0)
1236 # define ENABLE_INTR (1 << 0)
1237 # define IH_MC_SWAP(x) ((x) << 1) argument
1239 # define IH_MC_SWAP_16BIT 1
1242 # define RPTR_REARM (1 << 4)
1243 # define MC_WRREQ_CREDIT(x) ((x) << 15) argument
1244 # define MC_WR_CLEAN_CNT(x) ((x) << 20) argument
1247 # define CNTX_BUSY_INT_ENABLE (1 << 19)
1248 # define CNTX_EMPTY_INT_ENABLE (1 << 20)
1249 # define SCRATCH_INT_ENABLE (1 << 25)
1250 # define TIME_STAMP_INT_ENABLE (1 << 26)
1251 # define IB2_INT_ENABLE (1 << 29)
1252 # define IB1_INT_ENABLE (1 << 30)
1253 # define RB_INT_ENABLE (1 << 31)
1255 # define SCRATCH_INT_STAT (1 << 25)
1256 # define TIME_STAMP_INT_STAT (1 << 26)
1257 # define IB2_INT_STAT (1 << 29)
1258 # define IB1_INT_STAT (1 << 30)
1259 # define RB_INT_STAT (1 << 31)
1262 # define RDERR_INT_ENABLE (1 << 0)
1263 # define GUI_IDLE_INT_ENABLE (1 << 19)
1270 # define VLINE_OCCURRED (1 << 0)
1271 # define VLINE_ACK (1 << 4)
1272 # define VLINE_STAT (1 << 12)
1273 # define VLINE_INTERRUPT (1 << 16)
1274 # define VLINE_INTERRUPT_TYPE (1 << 17)
1277 # define VBLANK_OCCURRED (1 << 0)
1278 # define VBLANK_ACK (1 << 4)
1279 # define VBLANK_STAT (1 << 12)
1280 # define VBLANK_INTERRUPT (1 << 16)
1281 # define VBLANK_INTERRUPT_TYPE (1 << 17)
1285 # define VBLANK_INT_MASK (1 << 0)
1286 # define VLINE_INT_MASK (1 << 4)
1289 # define LB_D1_VLINE_INTERRUPT (1 << 2)
1290 # define LB_D1_VBLANK_INTERRUPT (1 << 3)
1291 # define DC_HPD1_INTERRUPT (1 << 17)
1292 # define DC_HPD1_RX_INTERRUPT (1 << 18)
1293 # define DACA_AUTODETECT_INTERRUPT (1 << 22)
1294 # define DACB_AUTODETECT_INTERRUPT (1 << 23)
1295 # define DC_I2C_SW_DONE_INTERRUPT (1 << 24)
1296 # define DC_I2C_HW_DONE_INTERRUPT (1 << 25)
1298 # define LB_D2_VLINE_INTERRUPT (1 << 2)
1299 # define LB_D2_VBLANK_INTERRUPT (1 << 3)
1300 # define DC_HPD2_INTERRUPT (1 << 17)
1301 # define DC_HPD2_RX_INTERRUPT (1 << 18)
1302 # define DISP_TIMER_INTERRUPT (1 << 24)
1304 # define LB_D3_VLINE_INTERRUPT (1 << 2)
1305 # define LB_D3_VBLANK_INTERRUPT (1 << 3)
1306 # define DC_HPD3_INTERRUPT (1 << 17)
1307 # define DC_HPD3_RX_INTERRUPT (1 << 18)
1309 # define LB_D4_VLINE_INTERRUPT (1 << 2)
1310 # define LB_D4_VBLANK_INTERRUPT (1 << 3)
1311 # define DC_HPD4_INTERRUPT (1 << 17)
1312 # define DC_HPD4_RX_INTERRUPT (1 << 18)
1314 # define LB_D5_VLINE_INTERRUPT (1 << 2)
1315 # define LB_D5_VBLANK_INTERRUPT (1 << 3)
1316 # define DC_HPD5_INTERRUPT (1 << 17)
1317 # define DC_HPD5_RX_INTERRUPT (1 << 18)
1319 # define LB_D6_VLINE_INTERRUPT (1 << 2)
1320 # define LB_D6_VBLANK_INTERRUPT (1 << 3)
1321 # define DC_HPD6_INTERRUPT (1 << 17)
1322 # define DC_HPD6_RX_INTERRUPT (1 << 18)
1326 # define GRPH_PFLIP_INT_OCCURRED (1 << 0)
1327 # define GRPH_PFLIP_INT_CLEAR (1 << 8)
1330 # define GRPH_PFLIP_INT_MASK (1 << 0)
1331 # define GRPH_PFLIP_INT_TYPE (1 << 8)
1342 # define DC_HPDx_INT_STATUS (1 << 0)
1343 # define DC_HPDx_SENSE (1 << 1)
1344 # define DC_HPDx_RX_INT_STATUS (1 << 8)
1352 # define DC_HPDx_INT_ACK (1 << 0)
1353 # define DC_HPDx_INT_POLARITY (1 << 8)
1354 # define DC_HPDx_INT_EN (1 << 16)
1355 # define DC_HPDx_RX_INT_ACK (1 << 20)
1356 # define DC_HPDx_RX_INT_EN (1 << 24)
1364 # define DC_HPDx_CONNECTION_TIMER(x) ((x) << 0) argument
1365 # define DC_HPDx_RX_INT_TIMER(x) ((x) << 16) argument
1366 # define DC_HPDx_EN (1 << 28)
1370 # define FMT_DYNAMIC_EXP_EN (1 << 0)
1371 # define FMT_DYNAMIC_EXP_MODE (1 << 4)
1372 /* 0 = 10bit -> 12bit, 1 = 8bit -> 12bit */
1374 # define FMT_PIXEL_ENCODING (1 << 16)
1375 /* 0 = RGB 4:4:4 or YCbCr 4:4:4, 1 = YCbCr 4:2:2 */
1377 # define FMT_TRUNCATE_EN (1 << 0)
1378 # define FMT_TRUNCATE_DEPTH (1 << 4)
1379 # define FMT_SPATIAL_DITHER_EN (1 << 8)
1380 # define FMT_SPATIAL_DITHER_MODE(x) ((x) << 9) argument
1381 # define FMT_SPATIAL_DITHER_DEPTH (1 << 12)
1382 # define FMT_FRAME_RANDOM_ENABLE (1 << 13)
1383 # define FMT_RGB_RANDOM_ENABLE (1 << 14)
1384 # define FMT_HIGHPASS_RANDOM_ENABLE (1 << 15)
1385 # define FMT_TEMPORAL_DITHER_EN (1 << 16)
1386 # define FMT_TEMPORAL_DITHER_DEPTH (1 << 20)
1387 # define FMT_TEMPORAL_DITHER_OFFSET(x) ((x) << 21) argument
1388 # define FMT_TEMPORAL_LEVEL (1 << 24)
1389 # define FMT_TEMPORAL_DITHER_RESET (1 << 25)
1390 # define FMT_25FRC_SEL(x) ((x) << 26) argument
1391 # define FMT_50FRC_SEL(x) ((x) << 28) argument
1392 # define FMT_75FRC_SEL(x) ((x) << 30) argument
1394 # define FMT_CLAMP_DATA_EN (1 << 0)
1395 # define FMT_CLAMP_COLOR_FORMAT(x) ((x) << 16) argument
1397 # define FMT_CLAMP_8BPC 1
1405 # define TRAP_ENABLE (1 << 0)
1406 # define SEM_INCOMPLETE_INT_ENABLE (1 << 1)
1407 # define SEM_WAIT_INT_ENABLE (1 << 2)
1408 # define DATA_SWAP_ENABLE (1 << 3)
1409 # define FENCE_SWAP_ENABLE (1 << 4)
1410 # define CTXEMPTY_INT_ENABLE (1 << 28)
1436 # define LS2_EXIT_TIME(x) ((x) << 17) argument
1440 # define MULTI_PIF (1 << 25)
1442 # define PLL_POWER_STATE_IN_TXS2_0(x) ((x) << 7) argument
1445 # define PLL_POWER_STATE_IN_OFF_0(x) ((x) << 10) argument
1448 # define PLL_RAMP_UP_TIME_0(x) ((x) << 24) argument
1452 # define PLL_POWER_STATE_IN_TXS2_1(x) ((x) << 7) argument
1455 # define PLL_POWER_STATE_IN_OFF_1(x) ((x) << 10) argument
1458 # define PLL_RAMP_UP_TIME_1(x) ((x) << 24) argument
1468 # define LC_L0S_INACTIVITY(x) ((x) << 8) argument
1471 # define LC_L1_INACTIVITY(x) ((x) << 12) argument
1474 # define LC_PMI_TO_L1_DIS (1 << 16)
1475 # define LC_ASPM_TO_L1_DIS (1 << 24)
1481 # define LC_LINK_WIDTH_X1 1
1488 # define LC_RECONFIG_ARC_MISSING_ESCAPE (1 << 7)
1489 # define LC_RECONFIG_NOW (1 << 8)
1490 # define LC_RENEGOTIATION_SUPPORT (1 << 9)
1491 # define LC_RENEGOTIATE_EN (1 << 10)
1492 # define LC_SHORT_RECONFIG_EN (1 << 11)
1493 # define LC_UPCONFIGURE_SUPPORT (1 << 12)
1494 # define LC_UPCONFIGURE_DIS (1 << 13)
1495 # define LC_DYN_LANES_PWR_STATE(x) ((x) << 21) argument
1499 # define LC_GEN2_EN_STRAP (1 << 0)
1500 # define LC_TARGET_LINK_SPEED_OVERRIDE_EN (1 << 1)
1501 # define LC_FORCE_EN_HW_SPEED_CHANGE (1 << 5)
1502 # define LC_FORCE_DIS_HW_SPEED_CHANGE (1 << 6)
1505 # define LC_CURRENT_DATA_RATE (1 << 11)
1506 # define LC_HW_VOLTAGE_IF_CONTROL(x) ((x) << 12) argument
1510 # define LC_CLR_FAILED_SPD_CHANGE_CNT (1 << 21)
1511 # define LC_OTHER_SIDE_EVER_SENT_GEN2 (1 << 23)
1512 # define LC_OTHER_SIDE_SUPPORTS_GEN2 (1 << 24)
1514 # define MM_WR_TO_CFG_EN (1 << 3)
1517 # define SELECTABLE_DEEMPHASIS (1 << 6)
1582 /* 1. header
1590 # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) argument
1592 * 1 - GDS
1594 # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) argument
1596 * 1 - PFP
1598 # define PACKET3_CP_DMA_SRC_SEL(x) ((x) << 29) argument
1600 * 1 - GDS
1603 # define PACKET3_CP_DMA_CP_SYNC (1 << 31)
1605 # define PACKET3_CP_DMA_DIS_WC (1 << 21)
1606 # define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) argument
1608 * 1 - 8 in 16
1612 # define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24) argument
1614 * 1 - 8 in 16
1618 # define PACKET3_CP_DMA_CMD_SAS (1 << 26)
1620 * 1 - register
1622 # define PACKET3_CP_DMA_CMD_DAS (1 << 27)
1624 * 1 - register
1626 # define PACKET3_CP_DMA_CMD_SAIC (1 << 28)
1627 # define PACKET3_CP_DMA_CMD_DAIC (1 << 29)
1630 # define PACKET3_CB0_DEST_BASE_ENA (1 << 6)
1631 # define PACKET3_CB1_DEST_BASE_ENA (1 << 7)
1632 # define PACKET3_CB2_DEST_BASE_ENA (1 << 8)
1633 # define PACKET3_CB3_DEST_BASE_ENA (1 << 9)
1634 # define PACKET3_CB4_DEST_BASE_ENA (1 << 10)
1635 # define PACKET3_CB5_DEST_BASE_ENA (1 << 11)
1636 # define PACKET3_CB6_DEST_BASE_ENA (1 << 12)
1637 # define PACKET3_CB7_DEST_BASE_ENA (1 << 13)
1638 # define PACKET3_DB_DEST_BASE_ENA (1 << 14)
1639 # define PACKET3_CB8_DEST_BASE_ENA (1 << 15)
1640 # define PACKET3_CB9_DEST_BASE_ENA (1 << 16)
1641 # define PACKET3_CB10_DEST_BASE_ENA (1 << 17)
1642 # define PACKET3_CB11_DEST_BASE_ENA (1 << 18)
1643 # define PACKET3_FULL_CACHE_ENA (1 << 20)
1644 # define PACKET3_TC_ACTION_ENA (1 << 23)
1645 # define PACKET3_VC_ACTION_ENA (1 << 24)
1646 # define PACKET3_CB_ACTION_ENA (1 << 25)
1647 # define PACKET3_DB_ACTION_ENA (1 << 26)
1648 # define PACKET3_SH_ACTION_ENA (1 << 27)
1649 # define PACKET3_SX_ACTION_ENA (1 << 28)
1651 #define PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16) argument
1695 * 1. header
1697 * 1:0 - SOURCE SEL
1704 * 0:1 SWAP
1714 #define PACKET3_SET_APPEND_CNT_SRC_SELECT(x) ((x) << 0) argument
1715 #define G_PACKET3_SET_APPEND_CNT_SRC_SELECT(x) ((x & 0x3) >> 0) argument
1726 #define S__SQ_CONSTANT_TYPE(x) (((x) & 3) << 30) argument
1727 #define G__SQ_CONSTANT_TYPE(x) (((x) >> 30) & 3) argument
1882 #define S_028800_STENCIL_ENABLE(x) (((x) & 0x1) << 0) argument
1883 #define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1) argument
1885 #define S_028800_Z_ENABLE(x) (((x) & 0x1) << 1) argument
1886 #define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1) argument
1888 #define S_028800_Z_WRITE_ENABLE(x) (((x) & 0x1) << 2) argument
1889 #define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1) argument
1891 #define S_028800_ZFUNC(x) (((x) & 0x7) << 4) argument
1892 #define G_028800_ZFUNC(x) (((x) >> 4) & 0x7) argument
1894 #define S_028800_BACKFACE_ENABLE(x) (((x) & 0x1) << 7) argument
1895 #define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1) argument
1897 #define S_028800_STENCILFUNC(x) (((x) & 0x7) << 8) argument
1898 #define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x7) argument
1908 #define S_028800_STENCILFAIL(x) (((x) & 0x7) << 11) argument
1909 #define G_028800_STENCILFAIL(x) (((x) >> 11) & 0x7) argument
1919 #define S_028800_STENCILZPASS(x) (((x) & 0x7) << 14) argument
1920 #define G_028800_STENCILZPASS(x) (((x) >> 14) & 0x7) argument
1922 #define S_028800_STENCILZFAIL(x) (((x) & 0x7) << 17) argument
1923 #define G_028800_STENCILZFAIL(x) (((x) >> 17) & 0x7) argument
1925 #define S_028800_STENCILFUNC_BF(x) (((x) & 0x7) << 20) argument
1926 #define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x7) argument
1928 #define S_028800_STENCILFAIL_BF(x) (((x) & 0x7) << 23) argument
1929 #define G_028800_STENCILFAIL_BF(x) (((x) >> 23) & 0x7) argument
1931 #define S_028800_STENCILZPASS_BF(x) (((x) & 0x7) << 26) argument
1932 #define G_028800_STENCILZPASS_BF(x) (((x) >> 26) & 0x7) argument
1934 #define S_028800_STENCILZFAIL_BF(x) (((x) & 0x7) << 29) argument
1935 #define G_028800_STENCILZFAIL_BF(x) (((x) >> 29) & 0x7) argument
1939 #define S_028008_SLICE_START(x) (((x) & 0x7FF) << 0) argument
1940 #define G_028008_SLICE_START(x) (((x) >> 0) & 0x7FF) argument
1942 #define S_028008_SLICE_MAX(x) (((x) & 0x7FF) << 13) argument
1943 #define G_028008_SLICE_MAX(x) (((x) >> 13) & 0x7FF) argument
1947 #define S_028ABC_HTILE_WIDTH(x) (((x) & 0x1) << 0) argument
1948 #define G_028ABC_HTILE_WIDTH(x) (((x) >> 0) & 0x1) argument
1950 #define S_028ABC_HTILE_HEIGHT(x) (((x) & 0x1) << 1) argument
1951 #define G_028ABC_HTILE_HEIGHT(x) (((x) >> 1) & 0x1) argument
1953 #define G_028ABC_LINEAR(x) (((x) >> 2) & 0x1) argument
1955 # define Z_ARRAY_MODE(x) ((x) << 4) argument
1956 # define DB_TILE_SPLIT(x) (((x) & 0x7) << 8) argument
1957 # define DB_NUM_BANKS(x) (((x) & 0x3) << 12) argument
1958 # define DB_BANK_WIDTH(x) (((x) & 0x3) << 16) argument
1959 # define DB_BANK_HEIGHT(x) (((x) & 0x3) << 20) argument
1960 # define DB_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 24) argument
1962 #define S_028040_FORMAT(x) (((x) & 0x3) << 0) argument
1963 #define G_028040_FORMAT(x) (((x) >> 0) & 0x3) argument
1969 #define S_028040_ARRAY_MODE(x) (((x) & 0xF) << 4) argument
1970 #define G_028040_ARRAY_MODE(x) (((x) >> 4) & 0xF) argument
1972 #define S_028040_READ_SIZE(x) (((x) & 0x1) << 28) argument
1973 #define G_028040_READ_SIZE(x) (((x) >> 28) & 0x1) argument
1975 #define S_028040_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 29) argument
1976 #define G_028040_TILE_SURFACE_ENABLE(x) (((x) >> 29) & 0x1) argument
1978 #define S_028040_ZRANGE_PRECISION(x) (((x) & 0x1) << 31) argument
1979 #define G_028040_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) argument
1981 #define S_028040_TILE_SPLIT(x) (((x) & 0x7) << 8) argument
1982 #define G_028040_TILE_SPLIT(x) (((x) >> 8) & 0x7) argument
1983 #define S_028040_NUM_BANKS(x) (((x) & 0x3) << 12) argument
1984 #define G_028040_NUM_BANKS(x) (((x) >> 12) & 0x3) argument
1985 #define S_028040_BANK_WIDTH(x) (((x) & 0x3) << 16) argument
1986 #define G_028040_BANK_WIDTH(x) (((x) >> 16) & 0x3) argument
1987 #define S_028040_BANK_HEIGHT(x) (((x) & 0x3) << 20) argument
1988 #define G_028040_BANK_HEIGHT(x) (((x) >> 20) & 0x3) argument
1989 #define S_028040_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 24) argument
1990 #define G_028040_MACRO_TILE_ASPECT(x) (((x) >> 24) & 0x3) argument
1993 #define S_028044_FORMAT(x) (((x) & 0x1) << 0) argument
1994 #define G_028044_FORMAT(x) (((x) >> 0) & 0x1) argument
1997 #define V_028044_STENCIL_8 1
1998 #define G_028044_TILE_SPLIT(x) (((x) >> 8) & 0x7) argument
2005 #define S_028058_PITCH_TILE_MAX(x) (((x) & 0x7FF) << 0) argument
2006 #define G_028058_PITCH_TILE_MAX(x) (((x) >> 0) & 0x7FF) argument
2008 #define S_028058_HEIGHT_TILE_MAX(x) (((x) & 0x7FF) << 11) argument
2009 #define G_028058_HEIGHT_TILE_MAX(x) (((x) >> 11) & 0x7FF) argument
2012 #define S_02805C_SLICE_TILE_MAX(x) (((x) & 0x3FFFFF) << 0) argument
2013 #define G_02805C_SLICE_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) argument
2072 #define S_028C6C_SLICE_START(x) (((x) & 0x7FF) << 0) argument
2073 #define G_028C6C_SLICE_START(x) (((x) >> 0) & 0x7FF) argument
2075 #define S_028C6C_SLICE_MAX(x) (((x) & 0x7FF) << 13) argument
2076 #define G_028C6C_SLICE_MAX(x) (((x) >> 13) & 0x7FF) argument
2079 #define S_028C70_ENDIAN(x) (((x) & 0x3) << 0) argument
2080 #define G_028C70_ENDIAN(x) (((x) >> 0) & 0x3) argument
2082 #define S_028C70_FORMAT(x) (((x) & 0x3F) << 2) argument
2083 #define G_028C70_FORMAT(x) (((x) >> 2) & 0x3F) argument
2120 #define S_028C70_ARRAY_MODE(x) (((x) & 0xF) << 8) argument
2121 #define G_028C70_ARRAY_MODE(x) (((x) >> 8) & 0xF) argument
2127 #define S_028C70_NUMBER_TYPE(x) (((x) & 0x7) << 12) argument
2128 #define G_028C70_NUMBER_TYPE(x) (((x) >> 12) & 0x7) argument
2138 #define S_028C70_COMP_SWAP(x) (((x) & 0x3) << 15) argument
2139 #define G_028C70_COMP_SWAP(x) (((x) >> 15) & 0x3) argument
2145 #define S_028C70_FAST_CLEAR(x) (((x) & 0x1) << 17) argument
2146 #define G_028C70_FAST_CLEAR(x) (((x) >> 17) & 0x1) argument
2148 #define S_028C70_COMPRESSION(x) (((x) & 0x3) << 18) argument
2149 #define G_028C70_COMPRESSION(x) (((x) >> 18) & 0x3) argument
2151 #define S_028C70_BLEND_CLAMP(x) (((x) & 0x1) << 19) argument
2152 #define G_028C70_BLEND_CLAMP(x) (((x) >> 19) & 0x1) argument
2154 #define S_028C70_BLEND_BYPASS(x) (((x) & 0x1) << 20) argument
2155 #define G_028C70_BLEND_BYPASS(x) (((x) >> 20) & 0x1) argument
2157 #define S_028C70_SIMPLE_FLOAT(x) (((x) & 0x1) << 21) argument
2158 #define G_028C70_SIMPLE_FLOAT(x) (((x) >> 21) & 0x1) argument
2160 #define S_028C70_ROUND_MODE(x) (((x) & 0x1) << 22) argument
2161 #define G_028C70_ROUND_MODE(x) (((x) >> 22) & 0x1) argument
2163 #define S_028C70_TILE_COMPACT(x) (((x) & 0x1) << 23) argument
2164 #define G_028C70_TILE_COMPACT(x) (((x) >> 23) & 0x1) argument
2166 #define S_028C70_SOURCE_FORMAT(x) (((x) & 0x3) << 24) argument
2167 #define G_028C70_SOURCE_FORMAT(x) (((x) >> 24) & 0x3) argument
2172 #define S_028C70_RAT(x) (((x) & 0x1) << 26) argument
2173 #define G_028C70_RAT(x) (((x) >> 26) & 0x1) argument
2175 #define S_028C70_RESOURCE_TYPE(x) (((x) & 0x7) << 27) argument
2176 #define G_028C70_RESOURCE_TYPE(x) (((x) >> 27) & 0x7) argument
2180 # define CB_FORMAT(x) ((x) << 2) argument
2181 # define CB_ARRAY_MODE(x) ((x) << 8) argument
2183 # define ARRAY_LINEAR_ALIGNED 1
2186 # define CB_SOURCE_FORMAT(x) ((x) << 24) argument
2188 # define CB_SF_EXPORT_NORM 1
2190 #define S_028C74_NON_DISP_TILING_ORDER(x) (((x) & 0x1) << 4) argument
2191 #define G_028C74_NON_DISP_TILING_ORDER(x) (((x) >> 4) & 0x1) argument
2193 #define S_028C74_TILE_SPLIT(x) (((x) & 0xf) << 5) argument
2194 #define G_028C74_TILE_SPLIT(x) (((x) >> 5) & 0xf) argument
2195 #define S_028C74_NUM_BANKS(x) (((x) & 0x3) << 10) argument
2196 #define G_028C74_NUM_BANKS(x) (((x) >> 10) & 0x3) argument
2197 #define S_028C74_BANK_WIDTH(x) (((x) & 0x3) << 13) argument
2198 #define G_028C74_BANK_WIDTH(x) (((x) >> 13) & 0x3) argument
2199 #define S_028C74_BANK_HEIGHT(x) (((x) & 0x3) << 16) argument
2200 #define G_028C74_BANK_HEIGHT(x) (((x) >> 16) & 0x3) argument
2201 #define S_028C74_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 19) argument
2202 #define G_028C74_MACRO_TILE_ASPECT(x) (((x) >> 19) & 0x3) argument
2204 # define CB_TILE_SPLIT(x) (((x) & 0x7) << 5) argument
2206 # define ADDR_SURF_TILE_SPLIT_128B 1
2212 # define CB_NUM_BANKS(x) (((x) & 0x3) << 10) argument
2214 # define ADDR_SURF_4_BANK 1
2217 # define CB_BANK_WIDTH(x) (((x) & 0x3) << 13) argument
2219 # define ADDR_SURF_BANK_WIDTH_2 1
2222 # define CB_BANK_HEIGHT(x) (((x) & 0x3) << 16) argument
2224 # define ADDR_SURF_BANK_HEIGHT_2 1
2227 # define CB_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 19) argument
2388 # define TEX_DIM(x) ((x) << 0) argument
2390 # define SQ_TEX_DIM_2D 1
2398 # define TEX_ARRAY_MODE(x) ((x) << 28) argument
2402 # define TEX_DST_SEL_X(x) ((x) << 16) argument
2403 # define TEX_DST_SEL_Y(x) ((x) << 19) argument
2404 # define TEX_DST_SEL_Z(x) ((x) << 22) argument
2405 # define TEX_DST_SEL_W(x) ((x) << 25) argument
2407 # define SQ_SEL_Y 1
2414 # define TEX_TILE_SPLIT(x) (((x) & 0x7) << 29) argument
2416 # define MACRO_TILE_ASPECT(x) (((x) & 0x3) << 6) argument
2417 # define TEX_BANK_WIDTH(x) (((x) & 0x3) << 8) argument
2418 # define TEX_BANK_HEIGHT(x) (((x) & 0x3) << 10) argument
2419 # define TEX_NUM_BANKS(x) (((x) & 0x3) << 16) argument
2421 #define S_030000_DIM(x) (((x) & 0x7) << 0) argument
2422 #define G_030000_DIM(x) (((x) >> 0) & 0x7) argument
2432 #define S_030000_NON_DISP_TILING_ORDER(x) (((x) & 0x1) << 5) argument
2433 #define G_030000_NON_DISP_TILING_ORDER(x) (((x) >> 5) & 0x1) argument
2435 #define S_030000_PITCH(x) (((x) & 0xFFF) << 6) argument
2436 #define G_030000_PITCH(x) (((x) >> 6) & 0xFFF) argument
2438 #define S_030000_TEX_WIDTH(x) (((x) & 0x3FFF) << 18) argument
2439 #define G_030000_TEX_WIDTH(x) (((x) >> 18) & 0x3FFF) argument
2442 #define S_030004_TEX_HEIGHT(x) (((x) & 0x3FFF) << 0) argument
2443 #define G_030004_TEX_HEIGHT(x) (((x) >> 0) & 0x3FFF) argument
2445 #define S_030004_TEX_DEPTH(x) (((x) & 0x1FFF) << 14) argument
2446 #define G_030004_TEX_DEPTH(x) (((x) >> 14) & 0x1FFF) argument
2448 #define S_030004_ARRAY_MODE(x) (((x) & 0xF) << 28) argument
2449 #define G_030004_ARRAY_MODE(x) (((x) >> 28) & 0xF) argument
2452 #define S_030008_BASE_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) argument
2453 #define G_030008_BASE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) argument
2456 #define S_03000C_MIP_ADDRESS(x) (((x) & 0xFFFFFFFF) << 0) argument
2457 #define G_03000C_MIP_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) argument
2460 #define S_030010_FORMAT_COMP_X(x) (((x) & 0x3) << 0) argument
2461 #define G_030010_FORMAT_COMP_X(x) (((x) >> 0) & 0x3) argument
2466 #define S_030010_FORMAT_COMP_Y(x) (((x) & 0x3) << 2) argument
2467 #define G_030010_FORMAT_COMP_Y(x) (((x) >> 2) & 0x3) argument
2469 #define S_030010_FORMAT_COMP_Z(x) (((x) & 0x3) << 4) argument
2470 #define G_030010_FORMAT_COMP_Z(x) (((x) >> 4) & 0x3) argument
2472 #define S_030010_FORMAT_COMP_W(x) (((x) & 0x3) << 6) argument
2473 #define G_030010_FORMAT_COMP_W(x) (((x) >> 6) & 0x3) argument
2475 #define S_030010_NUM_FORMAT_ALL(x) (((x) & 0x3) << 8) argument
2476 #define G_030010_NUM_FORMAT_ALL(x) (((x) >> 8) & 0x3) argument
2481 #define S_030010_SRF_MODE_ALL(x) (((x) & 0x1) << 10) argument
2482 #define G_030010_SRF_MODE_ALL(x) (((x) >> 10) & 0x1) argument
2486 #define S_030010_FORCE_DEGAMMA(x) (((x) & 0x1) << 11) argument
2487 #define G_030010_FORCE_DEGAMMA(x) (((x) >> 11) & 0x1) argument
2489 #define S_030010_ENDIAN_SWAP(x) (((x) & 0x3) << 12) argument
2490 #define G_030010_ENDIAN_SWAP(x) (((x) >> 12) & 0x3) argument
2492 #define S_030010_DST_SEL_X(x) (((x) & 0x7) << 16) argument
2493 #define G_030010_DST_SEL_X(x) (((x) >> 16) & 0x7) argument
2501 #define S_030010_DST_SEL_Y(x) (((x) & 0x7) << 19) argument
2502 #define G_030010_DST_SEL_Y(x) (((x) >> 19) & 0x7) argument
2504 #define S_030010_DST_SEL_Z(x) (((x) & 0x7) << 22) argument
2505 #define G_030010_DST_SEL_Z(x) (((x) >> 22) & 0x7) argument
2507 #define S_030010_DST_SEL_W(x) (((x) & 0x7) << 25) argument
2508 #define G_030010_DST_SEL_W(x) (((x) >> 25) & 0x7) argument
2510 #define S_030010_BASE_LEVEL(x) (((x) & 0xF) << 28) argument
2511 #define G_030010_BASE_LEVEL(x) (((x) >> 28) & 0xF) argument
2514 #define S_030014_LAST_LEVEL(x) (((x) & 0xF) << 0) argument
2515 #define G_030014_LAST_LEVEL(x) (((x) >> 0) & 0xF) argument
2517 #define S_030014_BASE_ARRAY(x) (((x) & 0x1FFF) << 4) argument
2518 #define G_030014_BASE_ARRAY(x) (((x) >> 4) & 0x1FFF) argument
2520 #define S_030014_LAST_ARRAY(x) (((x) & 0x1FFF) << 17) argument
2521 #define G_030014_LAST_ARRAY(x) (((x) >> 17) & 0x1FFF) argument
2524 #define S_030018_MAX_ANISO(x) (((x) & 0x7) << 0) argument
2525 #define G_030018_MAX_ANISO(x) (((x) >> 0) & 0x7) argument
2527 #define S_030018_PERF_MODULATION(x) (((x) & 0x7) << 3) argument
2528 #define G_030018_PERF_MODULATION(x) (((x) >> 3) & 0x7) argument
2530 #define S_030018_INTERLACED(x) (((x) & 0x1) << 6) argument
2531 #define G_030018_INTERLACED(x) (((x) >> 6) & 0x1) argument
2533 #define S_030018_TILE_SPLIT(x) (((x) & 0x7) << 29) argument
2534 #define G_030018_TILE_SPLIT(x) (((x) >> 29) & 0x7) argument
2536 #define S_03001C_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 6) argument
2537 #define G_03001C_MACRO_TILE_ASPECT(x) (((x) >> 6) & 0x3) argument
2538 #define S_03001C_BANK_WIDTH(x) (((x) & 0x3) << 8) argument
2539 #define G_03001C_BANK_WIDTH(x) (((x) >> 8) & 0x3) argument
2540 #define S_03001C_BANK_HEIGHT(x) (((x) & 0x3) << 10) argument
2541 #define G_03001C_BANK_HEIGHT(x) (((x) >> 10) & 0x3) argument
2542 #define S_03001C_NUM_BANKS(x) (((x) & 0x3) << 16) argument
2543 #define G_03001C_NUM_BANKS(x) (((x) >> 16) & 0x3) argument
2544 #define S_03001C_TYPE(x) (((x) & 0x3) << 30) argument
2545 #define G_03001C_TYPE(x) (((x) >> 30) & 0x3) argument
2551 #define S_03001C_DATA_FORMAT(x) (((x) & 0x3F) << 0) argument
2552 #define G_03001C_DATA_FORMAT(x) (((x) >> 0) & 0x3F) argument
2558 # define SQ_VTXC_BASE_ADDR_HI(x) ((x) << 0) argument
2559 # define SQ_VTXC_STRIDE(x) ((x) << 8) argument
2560 # define SQ_VTXC_ENDIAN_SWAP(x) ((x) << 30) argument
2562 # define SQ_ENDIAN_8IN16 1
2565 # define SQ_VTCX_SEL_X(x) ((x) << 3) argument
2566 # define SQ_VTCX_SEL_Y(x) ((x) << 6) argument
2567 # define SQ_VTCX_SEL_Z(x) ((x) << 9) argument
2568 # define SQ_VTCX_SEL_W(x) ((x) << 12) argument
2619 # define DMA_RB_ENABLE (1 << 0)
2620 # define DMA_RB_SIZE(x) ((x) << 1) /* log2 */ argument
2621 # define DMA_RB_SWAP_ENABLE (1 << 9) /* 8IN32 */
2622 # define DMA_RPTR_WRITEBACK_ENABLE (1 << 12)
2623 # define DMA_RPTR_WRITEBACK_SWAP_ENABLE (1 << 13) /* 8IN32 */
2624 # define DMA_RPTR_WRITEBACK_TIMER(x) ((x) << 16) /* log2 */ argument
2626 # define DMA_IDLE (1 << 0)