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Searched +full:0 +full:xfffb0000 (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/sti/
H A Dsti_hqvdp_lut.h24 0x0000ffff, 0x00010000, 0x000100ff, 0x00000000,
25 0x00000000, 0x00050000, 0xfffc00ff, 0x00000000,
26 0x00000000, 0x00090000, 0xfff900fe, 0x00000000,
27 0x00000000, 0x0010ffff, 0xfff600fb, 0x00000000,
28 0x00000000, 0x0017fffe, 0xfff400f7, 0x00000000,
29 0x00000000, 0x001ffffd, 0xfff200f2, 0x00000000,
30 0x00000000, 0x0027fffc, 0xfff100ec, 0x00000000,
31 0x00000000, 0x0030fffb, 0xfff000e5, 0x00000000,
32 0x00000000, 0x003afffa, 0xffee00de, 0x00000000,
33 0x00000000, 0x0044fff9, 0xffed00d6, 0x00000000,
[all …]
/linux/arch/arm/mach-omap1/
H A Diomap.h31 #define OMAP1_IO_PHYS 0xFFFB0000
32 #define OMAP1_IO_SIZE 0x40000
/linux/Documentation/devicetree/bindings/iio/adc/
H A Datmel,sama9260-adc.yaml110 reg = <0xfffb0000 0x100>;
111 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
114 atmel,adc-channels-used = <0xff>;
/linux/drivers/net/ethernet/ti/icssg/
H A Dicssg_config.h21 #define PRUETH_PKT_TYPE_CMD 0x10
27 #define PRUETH_RX_FLOW_DATA 0
54 #define ICSSG_FW_MGMT_CMD_HEADER 0x81
55 #define ICSSG_FW_MGMT_FDB_CMD_TYPE 0x03
56 #define ICSSG_FW_MGMT_CMD_TYPE 0x04
57 #define ICSSG_FW_MGMT_PKT 0x80000000
64 ICSSG_EMAC_PORT_DISABLE = 0,
88 #define EMAC_NONE 0xffff0000
89 #define EMAC_PRU0_P_DI 0xffff0004
90 #define EMAC_PRU1_P_DI 0xffff0040
[all …]
/linux/arch/parisc/kernel/
H A Dsetup.c49 /* boot_args[0] is free-mem start, boot_args[1] is ptr to command line */ in setup_cmdline()
50 if (boot_args[0] < 64) in setup_cmdline()
73 if (boot_args[2] != 0) { in setup_cmdline()
157 * 0, signaling EOF perhaps. This could be used to sequence in c_start()
185 .start = F_EXTEND(0xfff80000),
186 .end = F_EXTEND(0xfffaffff),
192 .start = F_EXTEND(0xfffb0000),
193 .end = F_EXTEND(0xfffdffff),
199 .start = F_EXTEND(0xfffe0000),
200 .end = F_EXTEND(0xffffffff),
[all …]
/linux/arch/m68k/include/asm/
H A Dio_mm.h45 #define q40_isa_io_base 0xff400000
46 #define q40_isa_mem_base 0xff800000
53 #define MULTI_ISA 0
63 #define MULTI_ISA 0
72 #define enec_isa_read_base 0xfffa0000
73 #define enec_isa_write_base 0xfffb0000
75 #define ENEC_ISA_IO_B(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9))
76 #define ENEC_ISA_IO_W(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9))
77 #define ENEC_ISA_MEM_B(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9))
78 #define ENEC_ISA_MEM_W(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9))
[all …]
/linux/include/uapi/linux/
H A Dserial_reg.h19 * DLAB=0
21 #define UART_RX 0 /* In: Receive buffer */
22 #define UART_TX 0 /* Out: Transmit buffer */
25 #define UART_IER_MSI 0x08 /* Enable Modem status interrupt */
26 #define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */
27 #define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */
28 #define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
32 #define UART_IERX_SLEEP 0x10 /* Enable sleep mode */
35 #define UART_IIR_NO_INT 0x01 /* No interrupts pending */
36 #define UART_IIR_ID 0x0e /* Mask for the interrupt ID */
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91sam9261.dtsi38 #size-cells = <0>;
40 cpu@0 {
43 reg = <0>;
49 reg = <0x20000000 0x08000000>;
55 #clock-cells = <0>;
56 clock-frequency = <0>;
61 #clock-cells = <0>;
62 clock-frequency = <0>;
68 reg = <0x00300000 0x28000>;
71 ranges = <0 0x00300000 0x28000>;
[all …]
H A Dat91rm9200.dtsi44 #size-cells = <0>;
46 cpu@0 {
49 reg = <0>;
55 reg = <0x20000000 0x04000000>;
61 #clock-cells = <0>;
62 clock-frequency = <0>;
67 #clock-cells = <0>;
68 clock-frequency = <0>;
74 reg = <0x00200000 0x4000>;
77 ranges = <0 0x00200000 0x4000>;
[all …]
H A Dat91sam9rl.dtsi43 #size-cells = <0>;
45 cpu@0 {
48 reg = <0>;
54 reg = <0x20000000 0x04000000>;
60 #clock-cells = <0>;
61 clock-frequency = <0>;
66 #clock-cells = <0>;
67 clock-frequency = <0>;
72 #clock-cells = <0>;
79 reg = <0x00300000 0x10000>;
[all …]
H A Dat91sam9260.dtsi41 #size-cells = <0>;
43 cpu@0 {
46 reg = <0>;
52 reg = <0x20000000 0x04000000>;
58 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #clock-cells = <0>;
65 clock-frequency = <0>;
70 #clock-cells = <0>;
77 reg = <0x002ff000 0x2000>;
[all …]
H A Dat91sam9g45.dtsi46 #size-cells = <0>;
48 cpu@0 {
51 reg = <0>;
57 reg = <0x70000000 0x10000000>;
63 #clock-cells = <0>;
64 clock-frequency = <0>;
69 #clock-cells = <0>;
70 clock-frequency = <0>;
75 #clock-cells = <0>;
82 reg = <0x00300000 0x10000>;
[all …]
/linux/drivers/net/wan/
H A Dwanxlfw.S2 .psize 0
14 0x000 - 0x050 TX#0 0x050 - 0x140 RX#0
15 0x140 - 0x190 TX#1 0x190 - 0x280 RX#1
16 0x280 - 0x2D0 TX#2 0x2D0 - 0x3C0 RX#2
17 0x3C0 - 0x410 TX#3 0x410 - 0x500 RX#3
43 PCI9060_VECTOR = 0x0000006C
44 CPM_IRQ_BASE = 0x40
46 SCC1_VECTOR = (CPM_IRQ_BASE + 0x1E) * 4
47 SCC2_VECTOR = (CPM_IRQ_BASE + 0x1D) * 4
48 SCC3_VECTOR = (CPM_IRQ_BASE + 0x1C) * 4
[all …]
/linux/arch/arm/
H A DKconfig.debug146 0x80000000 | 0xf0000000 | UART0
147 0x80004000 | 0xf0004000 | UART1
148 0x80008000 | 0xf0008000 | UART2
149 0x8000c000 | 0xf000c000 | UART3
150 0x80010000 | 0xf0010000 | UART4
151 0x80014000 | 0xf0014000 | UART5
152 0x80018000 | 0xf0018000 | UART6
153 0x8001c000 | 0xf001c000 | UART7
154 0x80020000 | 0xf0020000 | UART8
155 0x80024000 | 0xf0024000 | UART9
[all …]