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/freebsd/sys/dev/bxe/
H A Dbxe_dump.h33 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
34 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
35 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
36 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
56 #define BNX2X_DUMP_VERSION 0x61111111
76 static const uint32_t page_vals_e2[] = {0, 128};
79 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
85 static const uint32_t page_vals_e3[] = {0, 128};
88 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
92 { 0x2000, 1, 0x1f, 0xfff},
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/i386/
H A Dfloatundisf.S1 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
25 .quad 0x43f0000000000000
26 twop64: .quad 0x0000000000000000
28 #define TWOp64 twop64-0b(%ecx,%eax,8)
37 calll 0f
38 0: popl %ecx
60 .quad 0x4330000000000000
61 .quad 0x0000000000000fff
65 .quad 0x0000000000000000
66 .long 0x00000012
[all …]
/freebsd/sys/dev/etherswitch/mtkswitch/
H A Dmtkswitch_mt7620.h30 #define MTKSWITCH_ATC 0x0080
33 #define ATC_AC_CMD_CLEAN (2u<<0)
35 #define MTKSWITCH_VTCR 0x0090
37 #define VTCR_FUNC_VID_READ (0u<<12)
42 #define VTCR_VID_MASK 0xfff
44 #define MTKSWITCH_VAWD1 0x0094
49 #define VAWD1_MEMBER_MASK 0xff
51 #define VAWD1_VALID (1u<<0)
53 #define MTKSWITCH_VAWD2 0x0098
54 #define VAWD2_PORT_UNTAGGED(p) (0u<<((p)*2))
[all …]
H A Dmtkswitch_rt3050.h30 #define MTKSWITCH_PVID(p) ((((p) >> 1) * 4) + 0x40)
31 #define PVID_OFF(p) (((p) & 1) ? 12 : 0)
32 #define PVID_MASK 0xfff
34 #define MTKSWITCH_VLANI(v) ((((v) >> 1) * 4) + 0x50)
35 #define VLANI_OFF(v) (((v) & 1) ? 12 : 0)
36 #define VLANI_MASK 0xfff
38 #define MTKSWITCH_VMSC(x) ((((x) >> 2) * 4) + 0x70)
40 #define VMSC_MASK 0xff
42 #define MTKSWITCH_POA 0x0080
44 #define POA_FE_SPEED(x) ((1<<0)<<(x))
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dairoha,en7581-pcie-phy.yaml38 const: 0
58 #phy-cells = <0>;
59 reg = <0x0 0x1fa5a000 0x0 0xfff>,
60 <0x0 0x1fa5b000 0x0 0xfff>,
61 <0x0 0x1fa5c000 0x0 0xfff>,
62 <0x0 0x1fc10044 0x0 0x4>,
63 <0x0 0x1fc30044 0x0 0x4>,
64 <0x0 0x1fc15030 0x0 0x104>;
/freebsd/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/JITLink/
H A Driscv.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
76 /// Fixup <- (Target - Fixup + Addend + 0x800) >> 12
82 /// Fixup <- (Target - Fixup + Addend) & 0xFFF
88 /// Fixup <- (Target - Fixup + Addend) & 0xFFF
94 /// Fixup <- (Target + Addend + 0x800) >> 12
100 /// Fixup <- (Target + Addend) & 0xFFF
107 /// Fixup <- (Target + Addend) & 0xFF
[all...]
H A Dloongarch.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
105 /// Fixup <- (((Target + Addend + ((Target + Addend) & 0x800)) & ~0xfff)
106 // - (Fixup & ~0xfff)) >> 12 : int20
122 /// Fixup <- ((Target + Addend) >> Shift) & 0xfff : int12
204 uint32_t Imm15_0 = extractBits(Imm, /*Hi=*/15, /*Lo=*/0) << 10; in applyFixup()
230 (Target + (Target & 0x80 in applyFixup()
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/freebsd/sys/dev/usb/controller/
H A Dohci.h47 #define OHCI_PAGE_SIZE 0x1000
48 #define OHCI_PAGE(x) ((x) &~ 0xfff)
49 #define OHCI_PAGE_OFFSET(x) ((x) & 0xfff)
50 #define OHCI_PAGE_MASK(x) ((x) & 0xfff)
52 #if ((USB_PAGE_SIZE < OHCI_ED_ALIGN) || (OHCI_ED_ALIGN == 0) || \
53 (USB_PAGE_SIZE < OHCI_TD_ALIGN) || (OHCI_TD_ALIGN == 0) || \
54 (USB_PAGE_SIZE < OHCI_ITD_ALIGN) || (OHCI_ITD_ALIGN == 0) || \
55 (USB_PAGE_SIZE < OHCI_PAGE_SIZE) || (OHCI_PAGE_SIZE == 0))
76 #define OHCI_ED_GET_FA(s) ((s) & 0x7f)
77 #define OHCI_ED_ADDRMASK 0x0000007f
[all …]
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
H A DRuntimeDyldCOFFAArch64.h4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
32 INTERNAL_REL_ARM64_LONG_BRANCH26 = 0x111,
40 orig &= ~(0xFFF << 10); in write32AArch64Imm()
41 write32le(T, orig | ((imm & (0xFFF >> rangeLimit)) << 10)); in write32AArch64Imm()
47 // 0x04000000 indicates SIMD/FP registers in write32AArch64Ldr()
48 // 0x00800000 indicates 128 bit in write32AArch64Ldr()
49 if ((orig & 0x04800000) == 0x0480000 in write32AArch64Ldr()
[all...]
/freebsd/sys/contrib/device-tree/Bindings/input/touchscreen/
H A Dfsl,imx6ul-tsc.yaml48 default: 0xffff
49 minimum: 0
50 maximum: 0xffffff
56 default: 0xfff
57 minimum: 0
58 maximum: 0xffffffff
85 reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
92 pinctrl-0 = <&pinctrl_tsc>;
94 measure-delay-time = <0xfff>;
95 pre-charge-time = <0xffff>;
/freebsd/contrib/bionic-x86_64-string/
H A Dssse3-strcmp-slm.S33 if the new counter > the old one or is 0. */
92 and $0x3f, %rcx /* rsi alignment in cache line */
93 and $0x3f, %rax /* rdi alignment in cache line */
94 cmp $0x30, %ecx
96 cmp $0x30, %eax
107 sub $0xffff, %edx /* if first 16 bytes are same, edx == 0xffff */
123 and $0xfffffffffffffff0, %rsi /* force %rsi is 16 byte aligned */
124 and $0xfffffffffffffff0, %rdi /* force %rdi is 16 byte aligned */
125 mov $0xffff, %edx /* for equivalent offset */
127 and $0xf, %ecx /* offset of rsi */
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/xray/
H A Dxray_loongarch64.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
65 // jirl ra, t0, 0 ; call the tracing hook in patchSled()
79 uint32_t LoTracingHookAddr = reinterpret_cast<int64_t>(TracingHook) & 0xfff; in patchSled()
81 (reinterpret_cast<int64_t>(TracingHook) >> 12) & 0xfffff; in patchSled()
83 (reinterpret_cast<int64_t>(TracingHook) >> 32) & 0xfffff; in patchSled()
85 (reinterpret_cast<int64_t>(TracingHook) >> 52) & 0xfff; in patchSled()
86 uint32_t LoFunctionID = FuncId & 0xfff; in patchSled()
87 uint32_t HiFunctionID = (FuncId >> 12) & 0xfffff; in patchSled()
88 Address[1] = encodeInstruction2RIx(0x29c00000, RegNum::RN_RA, RegNum::RN_SP, in patchSled()
89 0x8); // st.d ra, sp, 8 in patchSled()
[all …]
/freebsd/sys/dev/qcom_ess_edma/
H A Dqcom_ess_edma_reg.h63 #define EDMA_REG_MAS_CTRL 0x0
64 #define EDMA_REG_TIMEOUT_CTRL 0x004
65 #define EDMA_REG_DBG0 0x008
66 #define EDMA_REG_DBG1 0x00C
67 #define EDMA_REG_SW_CTRL0 0x100
68 #define EDMA_REG_SW_CTRL1 0x104
71 #define EDMA_REG_RX_ISR 0x200
72 #define EDMA_REG_TX_ISR 0x208
73 #define EDMA_REG_MISC_ISR 0x210
74 #define EDMA_REG_WOL_ISR 0x218
[all …]
/freebsd/sys/dev/sound/pcm/
H A Dvchan.h59 #define VCHAN_DEFAULT_FORMAT SND_FORMAT(AFMT_S16_LE, 2, 0)
62 #define VCHAN_PLAY 0
69 ((void *)((intptr_t)(((((x) + 1) & 0xfff) << 2) | \
70 (((VCHAN_##y) + 1) & 0x3))))
73 #define VCHAN_SYSCTL_UNIT(x) ((int)(((intptr_t)(x) >> 2) & 0xfff) - 1)
74 #define VCHAN_SYSCTL_DIR(x) ((int)((intptr_t)(x) & 0x3) - 1)
/freebsd/sys/dev/le/
H A Dam79900.c145 if (error != 0) in am79900_config()
148 mem = 0; in am79900_config()
165 return (0); in am79900_config()
198 init.init_padr[0] = LE_HTOLE32(sc->sc_enaddr[0] | in am79900_meminit()
205 sc->sc_last_rd = 0; in am79900_meminit()
206 sc->sc_first_td = sc->sc_last_td = sc->sc_no_td = 0; in am79900_meminit()
208 a = sc->sc_addr + LE_RMDADDR(sc, 0); in am79900_meminit()
211 a = sc->sc_addr + LE_TMDADDR(sc, 0); in am79900_meminit()
219 for (bix = 0; bix < sc->sc_nrbuf; bix++) { in am79900_meminit()
223 (-LEBLEN & 0xfff)); in am79900_meminit()
[all …]
/freebsd/sys/dev/mii/
H A Drgephy.c82 DRIVER_MODULE(rgephy, miibus, rgephy_driver, 0, 0);
120 flags = 0; in rgephy_attach()
125 mii_phy_dev_attach(dev, flags, &rgephy_funcs, 0); in rgephy_attach()
146 return (0); in rgephy_attach()
174 return (0); in rgephy_service()
189 if ((ife->ifm_media & IFM_FLOW) != 0 && in rgephy_service()
190 (mii->mii_media.ifm_media & IFM_FLAG0) != 0) in rgephy_service()
193 if ((ife->ifm_media & IFM_FDX) != 0) { in rgephy_service()
197 if ((ife->ifm_media & IFM_FLOW) != 0 || in rgephy_service()
198 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) in rgephy_service()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/
H A DLoongArchMatInt.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
21 // 63 52 51 32 31 12 11 0 in generateInstSeq()
23 const int64_t Highest12 = Val >> 52 & 0xFFF; in generateInstSeq()
24 const int64_t Higher20 = Val >> 32 & 0xFFFFF; in generateInstSeq()
25 const int64_t Hi20 = Val >> 12 & 0xFFFFF; in generateInstSeq()
26 const int64_t Lo12 = Val & 0xFFF; in generateInstSeq()
29 if (Highest12 != 0 && SignExtend64<52>(Val) == 0) { in generateInstSeq()
34 if (Hi20 == 0) in generateInstSeq()
40 if (Lo12 != 0) in generateInstSeq()
/freebsd/sys/arm/ti/
H A Dti_spireg.h32 #define MCSPI_REVISION 0x0
34 #define MCSPI_REVISION_SCHEME_MSK 0x3
36 #define MCSPI_REVISION_FUNC_MSK 0xfff
38 #define MCSPI_REVISION_RTL_MSK 0x1f
40 #define MCSPI_REVISION_MAJOR_MSK 0x7
42 #define MCSPI_REVISION_CUSTOM_MSK 0x3
43 #define MCSPI_REVISION_MINOR_SHIFT 0
44 #define MCSPI_REVISION_MINOR_MSK 0x3f
45 #define MCSPI_SYSCONFIG 0x110
47 #define MCSPI_SYSSTATUS 0x114
[all …]
/freebsd/sys/dev/etherswitch/e6000sw/
H A De6000swreg.h44 #define MV88E6141 0x3400
45 #define MV88E6341 0x3410
46 #define MV88E6352 0x3520
47 #define MV88E6172 0x1720
48 #define MV88E6176 0x1760
49 #define MV88E6190 0x1900
52 #define MVSWITCH_MULTICHIP(_sc) ((_sc)->sw_addr != 0)
57 #define REG_GLOBAL 0x1b
58 #define REG_GLOBAL2 0x1c
59 #define REG_PORT(_sc, p) ((MVSWITCH((_sc), MV88E6190) ? 0 : 0x10) + (p))
[all …]
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/
H A DELF_riscv.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
52 orc::ExecutorAddr(), G.getPointerSize(), 0); in createGOTEntry()
53 GOTBlock.addEdge(isRV64() ? R_RISCV_64 : R_RISCV_32, 0, Target, 0); in createGOTEntry()
54 return G.addAnonymousSymbol(GOTBlock, 0, G.getPointerSize(), false, false); in createGOTEntry()
59 getStubsSection(), getStubBlockContent(), orc::ExecutorAddr(), 4, 0); in createPLTStub()
61 StubContentBlock.addEdge(R_RISCV_CALL, 0, GOTEntrySymbol, 0); in createPLTStub()
62 return G.addAnonymousSymbol(StubContentBlock, 0, StubEntrySize, true, in createPLTStub()
117 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
121 0x17, 0x0e, 0x00, 0x00, // auipc t3, literal
122 0x03, 0x3e, 0x0e, 0x00, // ld t3, literal(t3)
[all …]
/freebsd/contrib/llvm-project/lld/COFF/
H A DChunks.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
102 assert(numOutputSections <= 0xffff && "size of outputSections is too big"); in applySecIdx()
135 error("unsupported relocation type 0x" + Twine::utohexstr(type) + " in " + in applyRelX64()
155 error("unsupported relocation type 0x" + Twine::utohexstr(type) + " in " + in applyRelX86()
161 write16le(off, (read16le(off) & 0xfbf0) | ((v & 0x800) >> 1) | ((v >> 12) & 0xf)); in applyMOV()
162 write16le(off + 2, (read16le(off + 2) & 0x8f00) | ((v & 0x700) << 4) | (v & 0xff)); in applyMOV()
167 if ((op1 & 0xfbf0) != (movt ? 0xf2c0 : 0xf240)) in readMOV()
171 if ((op2 & 0x8000) != 0) in readMOV()
174 return (op2 & 0x00ff) | ((op2 >> 4) & 0x0700) | ((op1 << 1) & 0x0800) | in readMOV()
175 ((op1 & 0x000f) << 12); in readMOV()
[all …]
/freebsd/sys/crypto/openssl/amd64/
H A De_padlock-x86_64.S11 cmpl $0x746e6543,%ebx
13 cmpl $0x48727561,%edx
15 cmpl $0x736c7561,%ecx
19 cmpl $0x68532020,%ebx
21 cmpl $0x68676e61,%edx
23 cmpl $0x20206961,%ecx
26 movl $0xC0000000,%eax
30 cmpl $0xC0000001,%edx
32 movl $0xC0000001,%eax
35 andl $0xffffffef,%eax
[all …]
/freebsd/sys/arm64/include/
H A Dcpu.h59 /* Extract CPU affinity levels 0-3 */
60 #define CPU_AFF0(mpidr) (u_int)(((mpidr) >> 0) & 0xff)
61 #define CPU_AFF1(mpidr) (u_int)(((mpidr) >> 8) & 0xff)
62 #define CPU_AFF2(mpidr) (u_int)(((mpidr) >> 16) & 0xff)
63 #define CPU_AFF3(mpidr) (u_int)(((mpidr) >> 32) & 0xff)
64 #define CPU_AFF0_MASK 0xffUL
65 #define CPU_AFF1_MASK 0xff00UL
66 #define CPU_AFF2_MASK 0xff0000UL
67 #define CPU_AFF3_MASK 0xff00000000UL
73 #define CPU_IMPL_ARM 0x41
[all …]
/freebsd/sys/arm/freescale/vybrid/
H A Dvf_adc.c53 #define ADC_HC0 0x00 /* Ctrl reg for hardware triggers */
54 #define ADC_HC1 0x04 /* Ctrl reg for hardware triggers */
56 #define HC_ADCH_M 0x1f /* Input Channel Select Mask */
57 #define HC_ADCH_S 0 /* Input Channel Select Shift */
58 #define ADC_HS 0x08 /* Status register for HW triggers */
59 #define HS_COCO0 (1 << 0) /* Conversion Complete Flag */
61 #define ADC_R0 0x0C /* Data result reg for HW triggers */
62 #define ADC_R1 0x10 /* Data result reg for HW triggers */
63 #define ADC_CFG 0x14 /* Configuration register */
65 #define CFG_AVGS_M 0x3 /* Hardware Average select Mask */
[all …]
/freebsd/contrib/ntp/sntp/tests/
H A DkodFile.c29 kod_db_cnt = 0; in setUp()
39 TEST_ASSERT_EQUAL(0, kod_db_cnt); in test_ReadEmptyFile()
54 TEST_ASSERT_EQUAL(0x12345678, res->timestamp); in test_ReadCorrectFile()
59 TEST_ASSERT_EQUAL(0xfff, res->timestamp); in test_ReadCorrectFile()
74 TEST_ASSERT_EQUAL(0x12345678, res->timestamp); in test_ReadFileWithBlankLines()
79 TEST_ASSERT_EQUAL(0xfff, res->timestamp); in test_ReadFileWithBlankLines()
84 TEST_ASSERT_EQUAL(0xabcd, res->timestamp); in test_ReadFileWithBlankLines()
93 // Open file and ensure that the filesize is 0 bytes. in test_WriteEmptyFile()
97 TEST_ASSERT_EQUAL(0, GetFileSize(is)); in test_WriteEmptyFile()
111 kod_db[0]->timestamp = 1; in test_WriteFileWithSingleEntry()
[all …]

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