Lines Matching +full:0 +full:xfff
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
52 orc::ExecutorAddr(), G.getPointerSize(), 0); in createGOTEntry()
53 GOTBlock.addEdge(isRV64() ? R_RISCV_64 : R_RISCV_32, 0, Target, 0); in createGOTEntry()
54 return G.addAnonymousSymbol(GOTBlock, 0, G.getPointerSize(), false, false); in createGOTEntry()
59 getStubsSection(), getStubBlockContent(), orc::ExecutorAddr(), 4, 0); in createPLTStub()
61 StubContentBlock.addEdge(R_RISCV_CALL, 0, GOTEntrySymbol, 0); in createPLTStub()
62 return G.addAnonymousSymbol(StubContentBlock, 0, StubEntrySize, true, in createPLTStub()
117 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
121 0x17, 0x0e, 0x00, 0x00, // auipc t3, literal
122 0x03, 0x3e, 0x0e, 0x00, // ld t3, literal(t3)
123 0x67, 0x00, 0x0e, 0x00, // jr t3
124 0x13, 0x00, 0x00, 0x00}; // nop
128 0x17, 0x0e, 0x00, 0x00, // auipc t3, literal
129 0x03, 0x2e, 0x0e, 0x00, // lw t3, literal(t3)
130 0x67, 0x00, 0x0e, 0x00, // jr t3
131 0x13, 0x00, 0x00, 0x00}; // nop
144 // Requires 0 < N <= 64.
222 (RawInstr & 0x1FFF07F) | Imm12 | Imm10_5 | Imm4_1 | Imm11; in applyFixup()
237 (RawInstr & 0xFFF) | Imm20 | Imm10_1 | Imm11 | Imm19_12; in applyFixup()
245 int64_t Hi = Value + 0x800; in applyFixup()
248 int32_t Lo = Value & 0xFFF; in applyFixup()
252 RawInstrAuipc | (static_cast<uint32_t>(Hi & 0xFFFFF000)); in applyFixup()
262 int64_t Hi = Value + 0x800; in applyFixup()
267 (RawInstr & 0xFFF) | (static_cast<uint32_t>(Hi & 0xFFFFF000)); in applyFixup()
279 int64_t Lo = Value & 0xFFF; in applyFixup()
282 (RawInstr & 0xFFFFF) | (static_cast<uint32_t>(Lo & 0xFFF) << 20); in applyFixup()
294 int64_t Lo = Value & 0xFFF; in applyFixup()
296 uint32_t Imm4_0 = extractBits(Lo, 0, 5) << 7; in applyFixup()
299 *(little32_t *)FixupPtr = (RawInstr & 0x1FFF07F) | Imm11_5 | Imm4_0; in applyFixup()
304 int64_t Hi = Value + 0x800; in applyFixup()
309 (RawInstr & 0xFFF) | (static_cast<uint32_t>(Hi & 0xFFFFF000)); in applyFixup()
316 int32_t Lo = Value & 0xFFF; in applyFixup()
319 (RawInstr & 0xFFFFF) | (static_cast<uint32_t>(Lo & 0xFFF) << 20); in applyFixup()
326 int64_t Lo = Value & 0xFFF; in applyFixup()
328 uint32_t Imm4_0 = extractBits(Lo, 0, 5) << 7; in applyFixup()
330 *(little32_t *)FixupPtr = (RawInstr & 0x1FFF07F) | Imm11_5 | Imm4_0; in applyFixup()
399 (RawInstr & 0xE383) | Imm8 | Imm4_3 | Imm7_6 | Imm2_1 | Imm5; in applyFixup()
417 *(little16_t *)FixupPtr = (RawInstr & 0xE003) | Imm11 | Imm4 | Imm9_8 | in applyFixup()
422 int64_t Value = *(reinterpret_cast<const uint8_t *>(FixupPtr)) & 0x3f; in applyFixup()
424 *FixupPtr = (*FixupPtr & 0xc0) | (static_cast<uint8_t>(Value) & 0x3f); in applyFixup()
430 int64_t Word6 = Value & 0x3f; in applyFixup()
431 *(little32_t *)FixupPtr = (RawData & 0xffffffc0) | Word6; in applyFixup()
437 int64_t Word8 = Value & 0xff; in applyFixup()
438 *(little32_t *)FixupPtr = (RawData & 0xffffff00) | Word8; in applyFixup()
444 int64_t Word16 = Value & 0xffff; in applyFixup()
445 *(little32_t *)FixupPtr = (RawData & 0xffff0000) | Word16; in applyFixup()
450 int64_t Word32 = Value & 0xffffffff; in applyFixup()
456 int64_t Word32 = Value & 0xffffffff; in applyFixup()
486 SmallVector<SymbolAnchor, 0> Anchors;
489 SmallVector<Edge *, 0> RelaxEdges;
491 // RelocDeltas[I - 1] : 0).
492 SmallVector<uint32_t, 0> RelocDeltas;
494 SmallVector<Edge::Kind, 0> EdgeKinds;
497 SmallVector<uint32_t, 0> Writes;
551 BlockAux.RelocDeltas.resize(NumEdges, 0); in initRelaxAux()
588 assert(static_cast<int32_t>(Remove) >= 0 && in relaxAlign()
603 if (Config.HasRVC && isInt<12>(Displace) && RD == 0) { in relaxCall()
605 Aux.Writes.push_back(0xa001); // c.j in relaxCall()
609 Aux.Writes.push_back(0x2001); // c.jal in relaxCall()
613 Aux.Writes.push_back(0x6f | RD << 7); // jal in relaxCall()
618 Remove = 0; in relaxCall()
627 uint32_t Delta = 0; in relaxBlock()
635 uint32_t Remove = 0; in relaxBlock()
650 for (; SA.size() && SA[0].Offset <= E->getOffset(); SA = SA.slice(1)) { in relaxBlock()
651 if (SA[0].End) in relaxBlock()
652 SA[0].Sym->setSize(SA[0].Offset - Delta - SA[0].Sym->getOffset()); in relaxBlock()
654 SA[0].Sym->setOffset(SA[0].Offset - Delta); in relaxBlock()
687 uint32_t Offset = 0; in finalizeBlockRelax()
688 uint32_t Delta = 0; in finalizeBlockRelax()
695 if (Remove == 0 && Aux.EdgeKinds[I] == Edge::Invalid) in finalizeBlockRelax()
703 uint32_t Skip = 0; in finalizeBlockRelax()
715 uint32_t J = 0; in finalizeBlockRelax()
717 support::endian::write32le(Dest + J, 0x00000013); // nop in finalizeBlockRelax()
720 support::endian::write16le(Dest + J, 0x0001); // c.nop in finalizeBlockRelax()
741 Delta = 0; in finalizeBlockRelax()
742 size_t I = 0; in finalizeBlockRelax()
849 "Unsupported riscv relocation:" + formatv("{0:d}: ", Type) + in getRelocationKind()
910 "JITSymbolTable? index: {0}, shndx: {1} Size of table: {2}", in addSingleRelocation()