Home
last modified time | relevance | path

Searched +full:0 +full:xa010 (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/media/usb/dvb-usb/
H A Daf9005-script.h19 {0xa180, 0x0, 0x8, 0xa},
20 {0xa181, 0x0, 0x8, 0xd7},
21 {0xa182, 0x0, 0x8, 0xa3},
22 {0xa0a0, 0x0, 0x8, 0x0},
23 {0xa0a1, 0x0, 0x5, 0x0},
24 {0xa0a1, 0x5, 0x1, 0x1},
25 {0xa0c0, 0x0, 0x4, 0x1},
26 {0xa20e, 0x4, 0x4, 0xa},
27 {0xa20f, 0x0, 0x8, 0x40},
28 {0xa210, 0x0, 0x8, 0x8},
[all …]
H A Daf9005.h18 #define deb_info(args...) dprintk(dvb_usb_af9005_debug,0x01,args)
19 #define deb_xfer(args...) dprintk(dvb_usb_af9005_debug,0x02,args)
20 #define deb_rc(args...) dprintk(dvb_usb_af9005_debug,0x04,args)
21 #define deb_reg(args...) dprintk(dvb_usb_af9005_debug,0x08,args)
22 #define deb_i2c(args...) dprintk(dvb_usb_af9005_debug,0x10,args)
23 #define deb_fw(args...) dprintk(dvb_usb_af9005_debug,0x20,args)
36 #define AF9005_OFDM_REG 0
39 #define AF9005_REGISTER_RW 0x20
40 #define AF9005_REGISTER_RW_ACK 0x21
42 #define AF9005_CMD_OFDM_REG 0x00
[all …]
/linux/drivers/char/agp/
H A Dintel-agp.h9 #define INTEL_APSIZE 0xb4
10 #define INTEL_ATTBASE 0xb8
11 #define INTEL_AGPCTRL 0xb0
12 #define INTEL_NBXCFG 0x50
13 #define INTEL_ERRSTS 0x91
16 #define I830_GMCH_CTRL 0x52
17 #define I830_GMCH_ENABLED 0x4
18 #define I830_GMCH_MEM_MASK 0x1
19 #define I830_GMCH_MEM_64M 0x1
20 #define I830_GMCH_MEM_128M 0
[all …]
/linux/drivers/mmc/host/
H A Dcavium-thunderx.c43 if (nvec < 0) in thunder_mmc_register_interrupts()
47 for (i = 0; i < nvec; i++) { in thunder_mmc_register_interrupts()
50 0, cvm_mmc_irq_names[i], host); in thunder_mmc_register_interrupts()
54 return 0; in thunder_mmc_register_interrupts()
64 int ret, i = 0; in thunder_mmc_probe()
79 host->base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0)); in thunder_mmc_probe()
88 host->reg_off = 0x2000; in thunder_mmc_probe()
89 host->reg_off_dma = 0x160; in thunder_mmc_probe()
154 return 0; in thunder_mmc_probe()
157 for (i = 0; i < CAVIUM_MAX_MMC; i++) { in thunder_mmc_probe()
[all …]
/linux/drivers/clk/qcom/
H A Ddispcc-milos.c41 #define DISP_CC_MISC_CMD 0xF000
56 { 249600000, 2300000000, 0 },
61 .l = 0xd,
62 .alpha = 0x6492,
63 .config_ctl_val = 0x20485699,
64 .config_ctl_hi_val = 0x00182261,
65 .config_ctl_hi1_val = 0x82aa299c,
66 .test_ctl_val = 0x00000000,
67 .test_ctl_hi_val = 0x00000003,
68 .test_ctl_hi1_val = 0x00009000,
[all …]
H A Ddispcc-x1e80100.c49 #define DISP_CC_MISC_CMD 0xF000
73 { 249600000, 2300000000, 0 },
77 .l = 0xd,
78 .alpha = 0x6492,
79 .config_ctl_val = 0x20485699,
80 .config_ctl_hi_val = 0x00182261,
81 .config_ctl_hi1_val = 0x82aa299c,
82 .test_ctl_val = 0x00000000,
83 .test_ctl_hi_val = 0x00000003,
84 .test_ctl_hi1_val = 0x00009000,
[all …]
H A Dcamcc-sm6350.c37 { 249600000, 2000000000, 0 },
42 .l = 0x1f,
43 .alpha = 0x4000,
44 .config_ctl_val = 0x20485699,
45 .config_ctl_hi_val = 0x00002067,
46 .test_ctl_val = 0x40000000,
47 .test_ctl_hi_val = 0x00000002,
48 .user_ctl_val = 0x00000101,
49 .user_ctl_hi_val = 0x00004805,
53 .offset = 0x0,
[all …]
H A Dcamcc-sm7150.c44 { 249600000, 2000000000, 0 },
49 .l = 0x3e,
50 .alpha = 0x8000,
51 .post_div_mask = 0xff << 8,
52 .post_div_val = 0x31 << 8,
53 .test_ctl_val = 0x40000000,
57 .offset = 0x0,
101 .l = 0x23,
102 .alpha = 0x6aaa,
103 .post_div_mask = 0xf << 8,
[all …]
H A Dcamcc-sm8250.c36 { 249600000, 2000000000, 0 },
40 { 595200000UL, 3600000000UL, 0 },
44 .l = 0x3e,
45 .alpha = 0x8000,
46 .config_ctl_val = 0x20485699,
47 .config_ctl_hi_val = 0x00002261,
48 .config_ctl_hi1_val = 0x329A699c,
49 .user_ctl_val = 0x00003100,
50 .user_ctl_hi_val = 0x00000805,
51 .user_ctl_hi1_val = 0x00000000,
[all …]
/linux/drivers/usb/serial/
H A Dqcserial.c21 #define QUECTEL_EC20_PID 0x9215
25 QCSERIAL_G2K = 0, /* Gobi 2000 */
40 {DEVICE_G1K(0x05c6, 0x9211)}, /* Acer Gobi QDL device */
41 {DEVICE_G1K(0x05c6, 0x9212)}, /* Acer Gobi Modem Device */
42 {DEVICE_G1K(0x03f0, 0x1f1d)}, /* HP un2400 Gobi Modem Device */
43 {DEVICE_G1K(0x03f0, 0x201d)}, /* HP un2400 Gobi QDL Device */
44 {DEVICE_G1K(0x04da, 0x250d)}, /* Panasonic Gobi Modem device */
45 {DEVICE_G1K(0x04da, 0x250c)}, /* Panasonic Gobi QDL device */
46 {DEVICE_G1K(0x413c, 0x8172)}, /* Dell Gobi Modem device */
47 {DEVICE_G1K(0x413c, 0x8171)}, /* Dell Gobi QDL device */
[all …]
H A Doption.c51 #define OPTION_VENDOR_ID 0x0AF0
52 #define OPTION_PRODUCT_COLT 0x5000
53 #define OPTION_PRODUCT_RICOLA 0x6000
54 #define OPTION_PRODUCT_RICOLA_LIGHT 0x6100
55 #define OPTION_PRODUCT_RICOLA_QUAD 0x6200
56 #define OPTION_PRODUCT_RICOLA_QUAD_LIGHT 0x6300
57 #define OPTION_PRODUCT_RICOLA_NDIS 0x6050
58 #define OPTION_PRODUCT_RICOLA_NDIS_LIGHT 0x6150
59 #define OPTION_PRODUCT_RICOLA_NDIS_QUAD 0x6250
60 #define OPTION_PRODUCT_RICOLA_NDIS_QUAD_LIGHT 0x6350
[all …]
/linux/drivers/gpu/drm/vc4/
H A Dvc4_hvs.c217 for (i = 0; i < 64; i += 4) { in vc4_hvs_dump_state()
218 DRM_INFO("0x%08x (%s): 0x%08x 0x%08x 0x%08x 0x%08x\n", in vc4_hvs_dump_state()
220 readl((u32 __iomem *)hvs->dlist + i + 0), in vc4_hvs_dump_state()
238 return 0; in vc4_hvs_debugfs_underrun()
253 for (i = 0; i < SCALER_CHANNELS_COUNT; i++) { in vc4_hvs_debugfs_dlist()
263 next_entry_start = 0; in vc4_hvs_debugfs_dlist()
[all...]
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Dmbox.h25 #define MBOX_DOWN_RX_START 0
39 #define INTR_MASK(pfvfs) ((pfvfs < 64) ? (BIT_ULL(pfvfs) - 1) : (~0ull))
46 #define MBOX_DIR_AFPF 0 /* AF replies to PF */
96 #define OTX2_MBOX_REQ_SIG (0xdead)
97 #define OTX2_MBOX_RSP_SIG (0xbeef)
99 #define OTX2_MBOX_VERSION (0x000a)
131 return otx2_mbox_alloc_msg_rsp(mbox, devid, size, 0); in otx2_mbox_alloc_msg()
137 #define MBOX_MSG_MASK 0xFFFF
138 #define MBOX_MSG_INVALID 0xFFFE
139 #define MBOX_MSG_MAX 0xFFF
[all...]
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h27 #define mmCB_BLEND_RED 0xa105
28 #define mmCB_BLEND_GREEN 0xa106
29 #define mmCB_BLEND_BLUE 0xa107
30 #define mmCB_BLEND_ALPHA 0xa108
31 #define mmCB_COLOR_CONTROL 0xa202
32 #define mmCB_BLEND0_CONTROL 0xa1e0
33 #define mmCB_BLEND1_CONTROL 0xa1e1
34 #define mmCB_BLEND2_CONTROL 0xa1e2
35 #define mmCB_BLEND3_CONTROL 0xa1e3
36 #define mmCB_BLEND4_CONTROL 0xa1e4
[all …]
H A Dgfx_7_0_d.h27 #define mmCB_BLEND_RED 0xa105
28 #define mmCB_BLEND_GREEN 0xa106
29 #define mmCB_BLEND_BLUE 0xa107
30 #define mmCB_BLEND_ALPHA 0xa108
31 #define mmCB_COLOR_CONTROL 0xa202
32 #define mmCB_BLEND0_CONTROL 0xa1e0
33 #define mmCB_BLEND1_CONTROL 0xa1e1
34 #define mmCB_BLEND2_CONTROL 0xa1e2
35 #define mmCB_BLEND3_CONTROL 0xa1e3
36 #define mmCB_BLEND4_CONTROL 0xa1e4
[all …]
H A Dgfx_8_0_d.h27 #define mmCB_BLEND_RED 0xa105
28 #define mmCB_BLEND_GREEN 0xa106
29 #define mmCB_BLEND_BLUE 0xa107
30 #define mmCB_BLEND_ALPHA 0xa108
31 #define mmCB_DCC_CONTROL 0xa109
32 #define mmCB_COLOR_CONTROL 0xa202
33 #define mmCB_BLEND0_CONTROL 0xa1e0
34 #define mmCB_BLEND1_CONTROL 0xa1e1
35 #define mmCB_BLEND2_CONTROL 0xa1e2
36 #define mmCB_BLEND3_CONTROL 0xa1e3
[all …]
H A Dgfx_8_1_d.h27 #define mmCB_BLEND_RED 0xa105
28 #define mmCB_BLEND_GREEN 0xa106
29 #define mmCB_BLEND_BLUE 0xa107
30 #define mmCB_BLEND_ALPHA 0xa108
31 #define mmCB_DCC_CONTROL 0xa109
32 #define mmCB_COLOR_CONTROL 0xa202
33 #define mmCB_BLEND0_CONTROL 0xa1e0
34 #define mmCB_BLEND1_CONTROL 0xa1e1
35 #define mmCB_BLEND2_CONTROL 0xa1e2
36 #define mmCB_BLEND3_CONTROL 0xa1e3
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsdm630.dtsi36 #clock-cells = <0>;
43 #clock-cells = <0>;
51 #size-cells = <0>;
56 reg = <0x0 0x100>;
76 reg = <0x0 0x101>;
91 reg = <0x0 0x102>;
106 reg = <0x0 0x103>;
118 cpu4: cpu@0 {
121 reg = <0x0 0x0>;
141 reg = <0x0 0x1>;
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap4-l4.dtsi2 &l4_cfg { /* 0x4a000000 */
5 clocks = <&l4_cfg_clkctrl OMAP4_L4_CFG_CLKCTRL 0>;
7 reg = <0x4a000000 0x800>,
8 <0x4a000800 0x800>,
9 <0x4a001000 0x1000>;
13 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
14 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
15 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
16 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
17 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra194.c1333 .mux_bit = 0, \
1348 …efine drive_soc_gpio33_pt0 DRV_PINGROUP_ENTRY_Y(0x1004, 12, 5, 20, 5, -1, -1, -1, -1, 0)
1349 …efine drive_soc_gpio32_ps7 DRV_PINGROUP_ENTRY_Y(0x100c, 12, 5, 20, 5, -1, -1, -1, -1, 0)
1350 …efine drive_soc_gpio31_ps6 DRV_PINGROUP_ENTRY_Y(0x1014, 12, 5, 20, 5, -1, -1, -1, -1, 0)
1351 …efine drive_soc_gpio30_ps5 DRV_PINGROUP_ENTRY_Y(0x101c, 12, 5, 20, 5, -1, -1, -1, -1, 0)
1352 …efine drive_aud_mclk_ps4 DRV_PINGROUP_ENTRY_Y(0x1024, 12, 5, 20, 5, -1, -1, -1, -1, 0)
1353 …efine drive_dap1_fs_ps3 DRV_PINGROUP_ENTRY_Y(0x102c, 12, 5, 20, 5, -1, -1, -1, -1, 0)
1354 …efine drive_dap1_din_ps2 DRV_PINGROUP_ENTRY_Y(0x1034, 12, 5, 20, 5, -1, -1, -1, -1, 0)
1355 …efine drive_dap1_dout_ps1 DRV_PINGROUP_ENTRY_Y(0x103c, 12, 5, 20, 5, -1, -1, -1, -1, 0)
1356 …efine drive_dap1_sclk_ps0 DRV_PINGROUP_ENTRY_Y(0x1044, 12, 5, 20, 5, -1, -1, -1, -1, 0)
[all …]
/linux/drivers/tty/serial/8250/
H A D8250_pci.c30 #define PCI_VENDOR_ID_SBSMODULARIO 0x124B
31 #define PCI_SUBVENDOR_ID_SBSMODULARIO 0x124B
32 #define PCI_DEVICE_ID_OCTPRO 0x0001
33 #define PCI_SUBDEVICE_ID_OCTPRO232 0x0108
34 #define PCI_SUBDEVICE_ID_OCTPRO422 0x0208
35 #define PCI_SUBDEVICE_ID_POCTAL232 0x0308
36 #define PCI_SUBDEVICE_ID_POCTAL422 0x0408
37 #define PCI_SUBDEVICE_ID_SIIG_DUAL_00 0x2500
38 #define PCI_SUBDEVICE_ID_SIIG_DUAL_30 0x2530
39 #define PCI_VENDOR_ID_ADVANTECH 0x13fe
[all …]
/linux/drivers/gpu/drm/msm/registers/adreno/
H A Da6xx.xml32 <bitfield name="RBBM_GPU_IDLE" pos="0" type="boolean"/>
70 <bitfield name="CP_OPCODE_ERROR" pos="0" type="boolean"/>
90 <bitfield name="HWFAULTBR" pos="0" type="boolean"/>
107 <bitfield name="CSFRBWRAP" pos="0" type="boolean"/>
130 <bitfield name="CSFRBFAULT" pos="0" type="boolean"/>
142 <reg64 offset="0x0800" name="CP_RB_BASE"/>
143 <reg32 offset="0x0802" name="CP_RB_CNTL"/>
144 <reg32 offset="0x0803" name="CP_RB_RPTR_WR" variants="A7XX-"/>
145 <reg64 offset="0x0804" name="CP_RB_RPTR_ADDR"/>
146 <reg32 offset="0x0806" name="CP_RB_RPTR"/>
[all …]
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_reg.h26 #define ATC_ATC_INT_STS_REG_ADDRESS_ERROR (0x1<<0)
27 #define ATC_ATC_INT_STS_REG_ATC_GPA_MULTIPLE_HITS (0x1<<2)
28 #define ATC_ATC_INT_STS_REG_ATC_IREQ_LESS_THAN_STU (0x1<<5)
29 #define ATC_ATC_INT_STS_REG_ATC_RCPL_TO_EMPTY_CNT (0x1<<3)
30 #define ATC_ATC_INT_STS_REG_ATC_TCPL_ERROR (0x1<<4)
31 #define ATC_ATC_INT_STS_REG_ATC_TCPL_TO_NOT_PEND (0x1<<1)
33 #define ATC_REG_ATC_INIT_ARRAY 0x1100b8
35 #define ATC_REG_ATC_INIT_DONE 0x1100bc
36 /* [RC 6] Interrupt register #0 read clear */
37 #define ATC_REG_ATC_INT_STS_CLR 0x1101c0
[all …]
/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852c_table.c10 {0xF0FF0000, 0x00000000},
11 {0xF03300FF, 0x00000001},
12 {0xF03400FF, 0x00000002},
13 {0xF03500FF, 0x00000003},
14 {0xF03600FF, 0x00000004},
15 {0x70C, 0x00000020},
16 {0x704, 0x601E0100},
17 {0x4000, 0x00000000},
18 {0x4004, 0xCA014000},
19 {0x4008, 0xC751D4F0},
[all …]