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/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1028a-kontron-sl28.dts85 reg = <0x5>;
95 nvmem-cells = <&base_mac_address 0>;
118 flash@0 {
122 reg = <0>;
132 partition@0 {
133 reg = <0x000000 0x010000>;
139 reg = <0x010000 0x1d0000>;
145 reg = <0x200000 0x010000>;
150 reg = <0x210000 0x1d0000>;
155 reg = <0x3e0000 0x020000>;
[all …]
H A Dimx8qm-ss-audio.dtsi80 reg = <0x59080000 0x10000>;
89 dmas = <&edma0 18 0 1>;
90 fsl,dataline = <0 0xf 0x0>;
97 reg = <0x59090000 0x10000>;
106 dmas = <&edma0 19 0 0>;
107 fsl,dataline = <0 0x0 0xf>;
114 reg = <0x59480000 0x10000>;
126 reg = <0x59490000 0x10000>;
138 reg = <0x59810000 0x10000>;
145 dmas = <&edma1 6 0 1>, <&edma1 7 0 0>;
[all …]
H A Dimx8-ss-audio.dtsi14 #clock-cells = <0>;
21 #clock-cells = <0>;
22 clock-frequency = <0>;
28 #clock-cells = <0>;
29 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
42 #clock-cells = <0>;
43 clock-frequency = <0>;
49 #clock-cells = <0>;
[all …]
H A Dimx8mq-librem5.dtsi29 #clock-cells = <0>;
41 pinctrl-0 = <&pinctrl_keys>;
66 led-0 {
68 pwms = <&pwm2 0 50000 0>;
73 pwms = <&pwm4 0 50000 0>;
78 pwms = <&pwm3 0 50000 0>;
86 pinctrl-0 = <&pinctrl_audiopwr>;
113 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
133 gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
140 pinctrl-0 = <&pinctrl_gnsspwr>;
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,imx8-acm.yaml227 reg = <0x59e00000 0x1d0000>;
/linux/arch/arm64/boot/dts/arm/
H A Djuno-motherboard.dtsi13 #clock-cells = <0>;
20 #clock-cells = <0>;
27 #clock-cells = <0>;
34 #clock-cells = <0>;
55 gpios = <&iofpga_gpio0 0 0x4>;
62 gpios = <&iofpga_gpio0 1 0x4>;
69 gpios = <&iofpga_gpio0 2 0x4>;
76 gpios = <&iofpga_gpio0 3 0x4>;
83 gpios = <&iofpga_gpio0 4 0x4>;
90 gpios = <&iofpga_gpio0 5 0x4>;
[all …]
/linux/drivers/media/common/saa7146/
H A Dsaa7146_vbi.c13 int count = 0; in vbi_workaround()
34 saa7146_write(dev, BASE_PAGE3, 0x0); in vbi_workaround()
35 saa7146_write(dev, NUM_LINE_BYTE3, (2<<16)|((vbi_pixel_to_capture)<<0)); in vbi_workaround()
41 WRITE_RPS1(0xc000008c); in vbi_workaround()
43 if ( 0 != (SAA7146_USE_PORT_B_FOR_VBI & dev->ext_vv_data->flags)) { in vbi_workaround()
86 for(i = 0; i < 2; i++) { in vbi_workaround()
91 saa7146_write(dev, NUM_LINE_BYTE3, (1<<16)|(2<<0)); in vbi_workaround()
120 DEB_VBI("aborted (rps:0x%08x)\n", in vbi_workaround()
132 return 0; in vbi_workaround()
141 int count = 0; in saa7146_set_vbi_capture()
[all …]
/linux/drivers/net/wireless/ath/carl9170/
H A Dhw.h43 #define AR9170_UART_REG_BASE 0x1c0000
46 #define AR9170_UART_REG_RX_BUFFER (AR9170_UART_REG_BASE + 0x000)
47 #define AR9170_UART_REG_TX_HOLDING (AR9170_UART_REG_BASE + 0x004)
48 #define AR9170_UART_REG_FIFO_CONTROL (AR9170_UART_REG_BASE + 0x010)
49 #define AR9170_UART_FIFO_CTRL_RESET_RX_FIFO 0x02
50 #define AR9170_UART_FIFO_CTRL_RESET_TX_FIFO 0x04
52 #define AR9170_UART_REG_LINE_CONTROL (AR9170_UART_REG_BASE + 0x014)
53 #define AR9170_UART_REG_MODEM_CONTROL (AR9170_UART_REG_BASE + 0x018)
54 #define AR9170_UART_MODEM_CTRL_DTR_BIT 0x01
55 #define AR9170_UART_MODEM_CTRL_RTS_BIT 0x02
[all …]
/linux/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_hw.c15 #define OCM_WIN_P3P(addr) (addr & 0xffc0000)
19 #define CRB_BLK(off) ((off >> 20) & 0x3f)
20 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
21 #define CRB_WINDOW_2M (0x130060)
22 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
23 #define CRB_INDIRECT_2M (0x1e0000UL)
52 {{{0, 0, 0, 0} } }, /* 0: PCI */
53 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
54 {1, 0x0110000, 0x0120000, 0x130000},
55 {1, 0x0120000, 0x0122000, 0x124000},
[all …]
/linux/drivers/net/ethernet/qlogic/netxen/
H A Dnetxen_nic_hw.c16 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
18 #define MS_WIN(addr) (addr & 0x0ffc0000)
22 #define CRB_BLK(off) ((off >> 20) & 0x3f)
23 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
24 #define CRB_WINDOW_2M (0x130060)
25 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
26 #define CRB_INDIRECT_2M (0x1e0000UL)
57 {{{0, 0, 0, 0} } }, /* 0: PCI */
58 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
[all …]
/linux/drivers/scsi/qla2xxx/
H A Dqla_nx.c15 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | \
16 ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | \
18 ((addr >> 25) & 0x3ff))
19 #define MS_WIN(addr) (addr & 0x0ffc0000)
20 #define QLA82XX_PCI_MN_2M (0)
21 #define QLA82XX_PCI_MS_2M (0x80000)
22 #define QLA82XX_PCI_OCM0_2M (0xc0000)
23 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
25 #define BLOCK_PROTECT_BITS 0x0F
[all …]
/linux/drivers/scsi/qla4xxx/
H A Dql4_nx.c18 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
19 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
20 #define MS_WIN(addr) (addr & 0x0ffc0000)
21 #define QLA82XX_PCI_MN_2M (0)
22 #define QLA82XX_PCI_MS_2M (0x80000)
23 #define QLA82XX_PCI_OCM0_2M (0xc0000)
24 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
28 #define CRB_BLK(off) ((off >> 20) & 0x3f)
29 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
30 #define CRB_WINDOW_2M (0x130060)
[all …]