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/linux/drivers/net/wireless/marvell/mwifiex/
H A Dcfp.c28 static u8 adhoc_rates_b[B_SUPPORTED_RATES] = { 0x82, 0x84, 0x8b, 0x96, 0 };
30 static u8 adhoc_rates_g[G_SUPPORTED_RATES] = { 0x8c, 0x12, 0x98, 0x24,
31 0xb0, 0x48, 0x60, 0x6c, 0 };
33 static u8 adhoc_rates_bg[BG_SUPPORTED_RATES] = { 0x82, 0x84, 0x8b, 0x96,
34 0x0c, 0x12, 0x18, 0x24,
35 0x30, 0x48, 0x60, 0x6c, 0 };
37 static u8 adhoc_rates_a[A_SUPPORTED_RATES] = { 0x8c, 0x12, 0x98, 0x24,
38 0xb0, 0x48, 0x60, 0x6c, 0 };
39 static u8 supported_rates_a[A_SUPPORTED_RATES] = { 0x0c, 0x12, 0x18, 0x24,
40 0xb0, 0x48, 0x60, 0x6c, 0 };
[all …]
/linux/tools/perf/pmu-events/arch/arm64/ampere/emag/
H A Dpipeline.json4 "EventCode": "0x108",
10 "EventCode": "0x109",
16 "EventCode": "0x10a",
22 "EventCode": "0x10b",
28 "EventCode": "0x10c",
34 "EventCode": "0x10d",
40 "EventCode": "0x10e",
46 "EventCode": "0x10f",
/linux/arch/arm/boot/dts/ti/omap/
H A Domap4-mcpdm.dtsi12 /* 0x4a100106 abe_pdm_ul_data.abe_pdm_ul_data ag25 */
13 OMAP4_IOPAD(0x106, PIN_INPUT_PULLDOWN | MUX_MODE0)
15 /* 0x4a100108 abe_pdm_dl_data.abe_pdm_dl_data af25 */
16 OMAP4_IOPAD(0x108, PIN_INPUT_PULLDOWN | MUX_MODE0)
18 /* 0x4a10010a abe_pdm_frame.abe_pdm_frame ae25 */
19 OMAP4_IOPAD(0x10a, PIN_INPUT_PULLUP | MUX_MODE0)
21 /* 0x4a10010c abe_pdm_lb_clk.abe_pdm_lb_clk af26 */
22 OMAP4_IOPAD(0x10c, PIN_INPUT_PULLDOWN | MUX_MODE0)
24 /* 0x4a10010e abe_clks.abe_clks ah26 */
25 OMAP4_IOPAD(0x10e, PIN_INPUT_PULLDOWN | MUX_MODE0)
[all …]
/linux/sound/soc/qcom/qdsp6/
H A Dq6prm.h7 #define Q6PRM_LPASS_CLK_ID_PRI_MI2S_IBIT 0x100
9 #define Q6PRM_LPASS_CLK_ID_PRI_MI2S_EBIT 0x101
11 #define Q6PRM_LPASS_CLK_ID_SEC_MI2S_IBIT 0x102
13 #define Q6PRM_LPASS_CLK_ID_SEC_MI2S_EBIT 0x103
15 #define Q6PRM_LPASS_CLK_ID_TER_MI2S_IBIT 0x104
17 #define Q6PRM_LPASS_CLK_ID_TER_MI2S_EBIT 0x105
19 #define Q6PRM_LPASS_CLK_ID_QUAD_MI2S_IBIT 0x106
21 #define Q6PRM_LPASS_CLK_ID_QUAD_MI2S_EBIT 0x107
23 #define Q6PRM_LPASS_CLK_ID_SPEAKER_I2S_IBIT 0x108
25 #define Q6PRM_LPASS_CLK_ID_SPEAKER_I2S_EBIT 0x109
[all …]
H A Dq6afe.h8 #define MSM_AFE_PORT_TYPE_RX 0
15 #define AFE_PORT_MAX_AUDIO_CHAN_CNT 0x8
18 #define Q6AFE_LPASS_CLK_ROOT_DEFAULT 0
25 #define Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT 0x100
27 #define Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT 0x101
29 #define Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT 0x102
31 #define Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT 0x103
33 #define Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT 0x104
35 #define Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT 0x105
37 #define Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT 0x106
[all …]
/linux/drivers/media/i2c/
H A Dsaa717x.c36 MODULE_PARM_DESC(debug, "Debug level (0-1)");
76 #define TUNER_AUDIO_MONO 0 /* LL */
90 int fw_addr = reg == 0x454 || (reg >= 0x464 && reg <= 0x478) || reg == 0x480 || reg == 0x488; in saa717x_write()
94 msg.flags = 0; in saa717x_write()
96 mm1[0] = (reg >> 8) & 0xff; in saa717x_write()
97 mm1[1] = reg & 0xff; in saa717x_write()
100 mm1[4] = (value >> 16) & 0xff; in saa717x_write()
101 mm1[3] = (value >> 8) & 0xff; in saa717x_write()
102 mm1[2] = value & 0xff; in saa717x_write()
104 mm1[2] = value & 0xff; in saa717x_write()
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-mpic4.3.dtsi2 * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
37 #address-cells = <0>;
39 reg = <0x40000 0x40000>;
42 clock-frequency = <0x0>;
47 reg = <0x41100 0x100 0x41300 4>;
48 interrupts = <0 0 3 0
49 1 0 3 0
50 2 0 3 0
51 3 0 3 0>;
56 reg = <0x41600 0x200 0x44148 4>;
[all …]
/linux/drivers/media/pci/tw686x/
H A Dtw686x-regs.h6 a0 + 8, a0 + 0xa, a0 + 0xc, a0 + 0xe})
7 #define REG8_8(a0) ((const u16[8]) { a0, a0 + 8, a0 + 0x10, a0 + 0x18, \
8 a0 + 0x20, a0 + 0x28, a0 + 0x30, \
9 a0 + 0x38})
10 #define INT_STATUS 0x00
11 #define PB_STATUS 0x01
12 #define DMA_CMD 0x02
13 #define VIDEO_FIFO_STATUS 0x03
14 #define VIDEO_CHANNEL_ID 0x04
15 #define VIDEO_PARSER_STATUS 0x05
[all …]
/linux/tools/perf/pmu-events/arch/nds32/n13/
H A Datcpmu.json4 "EventCode": "0x102",
10 "EventCode": "0x103",
16 "EventCode": "0x104",
22 "EventCode": "0x105",
28 "EventCode": "0x106",
34 "EventCode": "0x107",
40 "EventCode": "0x108",
46 "EventCode": "0x109",
52 "EventCode": "0x10a",
58 "EventCode": "0x10b",
[all …]
/linux/drivers/scsi/qla2xxx/
H A Dqla_devtbl.h2 #define QLA_MODEL_NAMES 0x5C
8 "QLA2340", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x100 */
9 "QLA2342", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x101 */
10 "QLA2344", "133MHz PCI-X to 2Gb FC, Quad Channel", /* 0x102 */
11 "QCP2342", "cPCI to 2Gb FC, Dual Channel", /* 0x103 */
12 "QSB2340", "SBUS to 2Gb FC, Single Channel", /* 0x104 */
13 "QSB2342", "SBUS to 2Gb FC, Dual Channel", /* 0x105 */
14 "QLA2310", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x106 */
15 "QLA2332", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x107 */
16 "QCP2332", "Sun cPCI to 2Gb FC, Dual Channel", /* 0x108 */
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dppsmc.h28 #define PPSMC_SWSTATE_FLAG_DC 0x01
29 #define PPSMC_SWSTATE_FLAG_UVD 0x02
30 #define PPSMC_SWSTATE_FLAG_VCE 0x04
31 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
33 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
34 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
35 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
37 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
38 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
39 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sdm670-mdss.yaml42 "^display-controller@[0-9a-f]+$":
50 "^displayport-controller@[0-9a-f]+$":
58 "^dsi@[0-9a-f]+$":
67 "^phy@[0-9a-f]+$":
91 reg = <0x0ae00000 0x1000>;
103 interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mem_noc SLAVE_EBI_CH0 0>,
104 <&mmss_noc MASTER_MDP_PORT1 0 &mem_noc SLAVE_EBI_CH0 0>;
107 iommus = <&apps_smmu 0x880 0x8>,
108 <&apps_smmu 0xc80 0x8>;
116 reg = <0x0ae01000 0x8f000>,
[all …]
H A Dqcom,msm8998-mdss.yaml39 "^display-controller@[0-9a-f]+$":
47 "^dsi@[0-9a-f]+$":
57 "^phy@[0-9a-f]+$":
79 reg = <0x0c900000 0x1000>;
93 iommus = <&mmss_smmu 0>;
100 reg = <0x0c901000 0x8f000>,
101 <0x0c9a8e00 0xf0>,
102 <0x0c9b0000 0x2008>,
103 <0x0c9b8000 0x1040>;
114 interrupts = <0>;
[all …]
H A Dqcom,sdm845-mdss.yaml43 "^display-controller@[0-9a-f]+$":
51 "^displayport-controller@[0-9a-f]+$":
59 "^dsi@[0-9a-f]+$":
69 "^phy@[0-9a-f]+$":
94 reg = <0x0ae00000 0x1000>;
106 iommus = <&apps_smmu 0x880 0x8>,
107 <&apps_smmu 0xc80 0x8>;
112 reg = <0x0ae01000 0x8f000>,
113 <0x0aeb0000 0x2008>;
124 interrupts = <0>;
[all …]
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dppsmc.h28 #define PPSMC_SWSTATE_FLAG_DC 0x01
29 #define PPSMC_SWSTATE_FLAG_UVD 0x02
30 #define PPSMC_SWSTATE_FLAG_VCE 0x04
31 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
33 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
34 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
35 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
37 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
38 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
39 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
/linux/drivers/edac/
H A Di82975x_edac.c28 #define PCI_DEVICE_ID_INTEL_82975_0 0x277c
34 /* Intel 82975X register addresses - device 0 function 0 - DRAM Controller */
35 #define I82975X_EAP 0x58 /* Dram Error Address Pointer (32b)
39 * 0 0: CH0; 1: CH1
42 #define I82975X_DERRSYN 0x5c /* Dram Error SYNdrome (8b)
44 * 7:0 DRAM ECC Syndrome
47 #define I82975X_DES 0x5d /* Dram ERRor DeSTination (8b)
48 * 0h: Processor Memory Reads
53 #define I82975X_ERRSTS 0xc8 /* Error Status Register (16b)
62 * 0 ECC CE (singlebit DRAM error)
[all …]
/linux/drivers/net/ethernet/broadcom/
H A Dcnic_if.h21 #define CNIC_ULP_RDMA 0
42 #define KWQE_OPCODE_MASK 0x00ff0000
45 #define KWQE_LAYER_MASK 0x70000000
79 #define KCQE_RAMROD_COMPLETION (0x1<<27) /* Everest */
80 #define KCQE_FLAGS_LAYER_MASK (0x7<<28)
81 #define KCQE_FLAGS_LAYER_MASK_MISC (0<<28)
89 #define KCQE_FLAGS_OPCODE_MASK (0xff<<16)
105 #define DRV_CTL_IO_WR_CMD 0x101
106 #define DRV_CTL_IO_RD_CMD 0x102
107 #define DRV_CTL_CTX_WR_CMD 0x103
[all …]
/linux/drivers/gpu/ipu-v3/
H A Dipu-dp.c17 #define DP_SYNC 0
18 #define DP_ASYNC0 0x60
19 #define DP_ASYNC1 0xBC
21 #define DP_COM_CONF 0x0
22 #define DP_GRAPH_WIND_CTRL 0x0004
23 #define DP_FG_POS 0x0008
24 #define DP_CSC_A_0 0x0044
25 #define DP_CSC_A_1 0x0048
26 #define DP_CSC_A_2 0x004C
27 #define DP_CSC_A_3 0x0050
[all …]
/linux/drivers/i2c/busses/
H A Di2c-nvidia-gpu.c24 #define I2C_MST_CNTL 0x00
25 #define I2C_MST_CNTL_GEN_START BIT(0)
32 #define I2C_MST_CNTL_STATUS_OKAY (0 << 29)
38 #define I2C_MST_ADDR 0x04
40 #define I2C_MST_I2C0_TIMING 0x08
41 #define I2C_MST_I2C0_TIMING_SCL_PERIOD_100KHZ 0x10e
46 #define I2C_MST_DATA 0x0c
48 #define I2C_MST_HYBRID_PADCTL 0x20
49 #define I2C_MST_HYBRID_PADCTL_MODE_I2C BIT(0)
98 return 0; in gpu_i2c_check_status()
[all …]
/linux/include/linux/mfd/da9062/
H A Dregisters.h9 #define DA9062_PMIC_DEVICE_ID 0x62
10 #define DA9062_PMIC_VARIANT_MRC_AA 0x01
11 #define DA9062_PMIC_VARIANT_VRC_DA9061 0x01
12 #define DA9062_PMIC_VARIANT_VRC_DA9062 0x02
20 #define DA9062AA_PAGE_CON 0x000
21 #define DA9062AA_STATUS_A 0x001
22 #define DA9062AA_STATUS_B 0x002
23 #define DA9062AA_STATUS_D 0x004
24 #define DA9062AA_FAULT_LOG 0x005
25 #define DA9062AA_EVENT_A 0x006
[all …]
/linux/drivers/net/wireless/broadcom/b43/
H A Dradio_2057.h9 #define R2057_DACBUF_VINCM_CORE0 0x000
10 #define R2057_IDCODE 0x001
11 #define R2057_RCCAL_MASTER 0x002
12 #define R2057_RCCAL_CAP_SIZE 0x003
13 #define R2057_RCAL_CONFIG 0x004
14 #define R2057_GPAIO_CONFIG 0x005
15 #define R2057_GPAIO_SEL1 0x006
16 #define R2057_GPAIO_SEL0 0x007
17 #define R2057_CLPO_CONFIG 0x008
18 #define R2057_BANDGAP_CONFIG 0x009
[all …]
/linux/arch/arm64/boot/dts/cavium/
H A Dthunder-88xx.dtsi63 #size-cells = <0>;
65 cpu@0 {
68 reg = <0x0 0x000>;
74 reg = <0x0 0x001>;
80 reg = <0x0 0x002>;
86 reg = <0x0 0x003>;
92 reg = <0x0 0x004>;
98 reg = <0x0 0x005>;
104 reg = <0x0 0x006>;
110 reg = <0x0 0x007>;
[all …]
/linux/include/linux/mfd/da9063/
H A Dregisters.h18 /* Page 0 : I2C access 0x000 - 0x0FF SPI access 0x000 - 0x07F */
19 /* Page 1 : SPI access 0x080 - 0x0FF */
20 /* Page 2 : I2C access 0x100 - 0x1FF SPI access 0x100 - 0x17F */
21 /* Page 3 : SPI access 0x180 - 0x1FF */
22 #define DA9063_REG_PAGE_CON 0x00
25 #define DA9063_REG_STATUS_A 0x01
26 #define DA9063_REG_STATUS_B 0x02
27 #define DA9063_REG_STATUS_C 0x03
28 #define DA9063_REG_STATUS_D 0x04
29 #define DA9063_REG_FAULT_LOG 0x05
[all …]
/linux/arch/sparc/kernel/
H A Dttable_64.S17 tl0_resv000: BOOT_KERNEL BTRAP(0x1) BTRAP(0x2) BTRAP(0x3)
18 tl0_resv004: BTRAP(0x4) BTRAP(0x5) BTRAP(0x6) BTRAP(0x7)
24 tl0_resv00b: BTRAP(0xb) BTRAP(0xc) BTRAP(0xd) BTRAP(0xe) BTRAP(0xf)
28 tl0_resv012: BTRAP(0x12) BTRAP(0x13) BTRAP(0x14) BTRAP(0x15) BTRAP(0x16) BTRAP(0x17)
29 tl0_resv018: BTRAP(0x18) BTRAP(0x19)
31 tl0_resv01b: BTRAP(0x1b)
32 tl0_resv01c: BTRAP(0x1c) BTRAP(0x1d) BTRAP(0x1e) BTRAP(0x1f)
39 tl0_resv029: BTRAP(0x29) BTRAP(0x2a) BTRAP(0x2b) BTRAP(0x2c) BTRAP(0x2d) BTRAP(0x2e)
40 tl0_resv02f: BTRAP(0x2f)
45 tl0_resv033: BTRAP(0x33)
[all …]
/linux/drivers/mfd/
H A Drz-mtu3.c28 /******* MTU3 registers (original offset is +0x1200) *******/
30 [RZ_MTU3_CHAN_0] = MTU_8BIT_CH_0(0x104, 0x090, 0x100, 0x128, 0x101, 0x102, 0x103, 0x126),
31 [RZ_MTU3_CHAN_1] = MTU_8BIT_CH_1_2(0x184, 0x091, 0x185, 0x180, 0x194, 0x181, 0x182),
32 [RZ_MTU3_CHAN_2] = MTU_8BIT_CH_1_2(0x204, 0x092, 0x205, 0x200, 0x20c, 0x201, 0x202),
33 …[RZ_MTU3_CHAN_3] = MTU_8BIT_CH_3_4_6_7(0x008, 0x093, 0x02c, 0x000, 0x04c, 0x002, 0x004, 0x005, 0x0…
34 …[RZ_MTU3_CHAN_4] = MTU_8BIT_CH_3_4_6_7(0x009, 0x094, 0x02d, 0x001, 0x04d, 0x003, 0x006, 0x007, 0x0…
35 …[RZ_MTU3_CHAN_5] = MTU_8BIT_CH_5(0xab2, 0x1eb, 0xab4, 0xab6, 0xa84, 0xa85, 0xa86, 0xa94, 0xa95, 0x…
36 …[RZ_MTU3_CHAN_6] = MTU_8BIT_CH_3_4_6_7(0x808, 0x893, 0x82c, 0x800, 0x84c, 0x802, 0x804, 0x805, 0x8…
37 …[RZ_MTU3_CHAN_7] = MTU_8BIT_CH_3_4_6_7(0x809, 0x894, 0x82d, 0x801, 0x84d, 0x803, 0x806, 0x807, 0x8…
38 [RZ_MTU3_CHAN_8] = MTU_8BIT_CH_8(0x404, 0x098, 0x400, 0x406, 0x401, 0x402, 0x403)
[all …]

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