17 #define DP_SYNC 0
18 #define DP_ASYNC0 0x60
19 #define DP_ASYNC1 0xBC
21 #define DP_COM_CONF		0x0
22 #define DP_GRAPH_WIND_CTRL	0x0004
23 #define DP_FG_POS		0x0008
24 #define DP_CSC_A_0		0x0044
25 #define DP_CSC_A_1		0x0048
26 #define DP_CSC_A_2		0x004C
27 #define DP_CSC_A_3		0x0050
28 #define DP_CSC_0		0x0054
29 #define DP_CSC_1		0x0058
31 #define DP_COM_CONF_FG_EN		(1 << 0)
96 		reg = readl(flow->base + DP_GRAPH_WIND_CTRL) & 0x00FFFFFFL;  in ipu_dp_set_global_alpha()
111 	return 0;  in ipu_dp_set_global_alpha()
124 	return 0;  in ipu_dp_set_window_pos()
146 		writel(0x099 | (0x12d << 16), flow->base + DP_CSC_A_0);  in ipu_dp_csc_init()
147 		writel(0x03a | (0x3a9 << 16), flow->base + DP_CSC_A_1);  in ipu_dp_csc_init()
148 		writel(0x356 | (0x100 << 16), flow->base + DP_CSC_A_2);  in ipu_dp_csc_init()
149 		writel(0x100 | (0x329 << 16), flow->base + DP_CSC_A_3);  in ipu_dp_csc_init()
150 		writel(0x3d6 | (0x0000 << 16) | (2 << 30),  in ipu_dp_csc_init()
152 		writel(0x200 | (2 << 14) | (0x200 << 16) | (2 << 30),  in ipu_dp_csc_init()
156 		writel(0x095 | (0x000 << 16), flow->base + DP_CSC_A_0);  in ipu_dp_csc_init()
157 		writel(0x0e5 | (0x095 << 16), flow->base + DP_CSC_A_1);  in ipu_dp_csc_init()
158 		writel(0x3e5 | (0x3bc << 16), flow->base + DP_CSC_A_2);  in ipu_dp_csc_init()
159 		writel(0x095 | (0x10e << 16), flow->base + DP_CSC_A_3);  in ipu_dp_csc_init()
160 		writel(0x000 | (0x3e10 << 16) | (1 << 30),  in ipu_dp_csc_init()
162 		writel(0x09a | (1 << 14) | (0x3dbe << 16) | (1 << 30),  in ipu_dp_csc_init()
166 		writel(0x095 | (0x000 << 16), flow->base + DP_CSC_A_0);  in ipu_dp_csc_init()
167 		writel(0x0cc | (0x095 << 16), flow->base + DP_CSC_A_1);  in ipu_dp_csc_init()
168 		writel(0x3ce | (0x398 << 16), flow->base + DP_CSC_A_2);  in ipu_dp_csc_init()
169 		writel(0x095 | (0x0ff << 16), flow->base + DP_CSC_A_3);  in ipu_dp_csc_init()
170 		writel(0x000 | (0x3e42 << 16) | (1 << 30),  in ipu_dp_csc_init()
172 		writel(0x10a | (1 << 14) | (0x3dd6 << 16) | (1 << 30),  in ipu_dp_csc_init()
225 	return 0;  in ipu_dp_setup_channel()
242 	return 0;  in ipu_dp_enable()
253 		return 0;  in ipu_dp_enable_channel()
265 	return 0;  in ipu_dp_enable_channel()
291 	writel(0, flow->base + DP_FG_POS);  in ipu_dp_disable_channel()
309 	if (priv->use_count < 0)  in ipu_dp_disable()
310 		priv->use_count = 0;  in ipu_dp_disable()
363 	for (i = 0; i < IPUV3_NUM_FLOWS; i++) {  in ipu_dp_init()
371 	return 0;  in ipu_dp_init()