Lines Matching +full:0 +full:x10e
28 #define PPSMC_SWSTATE_FLAG_DC 0x01
29 #define PPSMC_SWSTATE_FLAG_UVD 0x02
30 #define PPSMC_SWSTATE_FLAG_VCE 0x04
31 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
33 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
34 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
35 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
37 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
38 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
39 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
40 #define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08
41 #define PPSMC_SYSTEMFLAG_REGULATOR_HOT 0x10
42 #define PPSMC_SYSTEMFLAG_REGULATOR_HOT_ANALOG 0x20
43 #define PPSMC_SYSTEMFLAG_REGULATOR_HOT_PROG_GPIO 0x40
45 #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_MASK 0x07
46 #define PPSMC_EXTRAFLAGS_AC2DC_DONT_WAIT_FOR_VBLANK 0x08
47 #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTODPMLOWSTATE 0x00
48 #define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTOINITIALSTATE 0x01
49 #define PPSMC_EXTRAFLAGS_AC2DC_GPIO5_POLARITY_HIGH 0x02
51 #define PPSMC_DISPLAY_WATERMARK_LOW 0
54 #define PPSMC_STATEFLAG_AUTO_PULSE_SKIP 0x01
55 #define PPSMC_STATEFLAG_POWERBOOST 0x02
56 #define PPSMC_STATEFLAG_DEEPSLEEP_THROTTLE 0x20
57 #define PPSMC_STATEFLAG_DEEPSLEEP_BYPASS 0x40
59 #define FDO_MODE_HARDWARE 0
67 #define PPSMC_Result_OK ((uint8_t)0x01)
68 #define PPSMC_Result_Failed ((uint8_t)0xFF)
72 #define PPSMC_MSG_Halt ((uint8_t)0x10)
73 #define PPSMC_MSG_Resume ((uint8_t)0x11)
74 #define PPSMC_MSG_ZeroLevelsDisabled ((uint8_t)0x13)
75 #define PPSMC_MSG_OneLevelsDisabled ((uint8_t)0x14)
76 #define PPSMC_MSG_TwoLevelsDisabled ((uint8_t)0x15)
77 #define PPSMC_MSG_EnableThermalInterrupt ((uint8_t)0x16)
78 #define PPSMC_MSG_RunningOnAC ((uint8_t)0x17)
79 #define PPSMC_MSG_SwitchToSwState ((uint8_t)0x20)
80 #define PPSMC_MSG_SwitchToInitialState ((uint8_t)0x40)
81 #define PPSMC_MSG_NoForcedLevel ((uint8_t)0x41)
82 #define PPSMC_MSG_ForceHigh ((uint8_t)0x42)
83 #define PPSMC_MSG_ForceMediumOrHigh ((uint8_t)0x43)
84 #define PPSMC_MSG_SwitchToMinimumPower ((uint8_t)0x51)
85 #define PPSMC_MSG_ResumeFromMinimumPower ((uint8_t)0x52)
86 #define PPSMC_MSG_EnableCac ((uint8_t)0x53)
87 #define PPSMC_MSG_DisableCac ((uint8_t)0x54)
88 #define PPSMC_TDPClampingActive ((uint8_t)0x59)
89 #define PPSMC_TDPClampingInactive ((uint8_t)0x5A)
90 #define PPSMC_StartFanControl ((uint8_t)0x5B)
91 #define PPSMC_StopFanControl ((uint8_t)0x5C)
92 #define PPSMC_MSG_NoDisplay ((uint8_t)0x5D)
93 #define PPSMC_NoDisplay ((uint8_t)0x5D)
94 #define PPSMC_MSG_HasDisplay ((uint8_t)0x5E)
95 #define PPSMC_HasDisplay ((uint8_t)0x5E)
96 #define PPSMC_MSG_UVDPowerOFF ((uint8_t)0x60)
97 #define PPSMC_MSG_UVDPowerON ((uint8_t)0x61)
98 #define PPSMC_MSG_EnableULV ((uint8_t)0x62)
99 #define PPSMC_MSG_DisableULV ((uint8_t)0x63)
100 #define PPSMC_MSG_EnterULV ((uint8_t)0x64)
101 #define PPSMC_MSG_ExitULV ((uint8_t)0x65)
102 #define PPSMC_CACLongTermAvgEnable ((uint8_t)0x6E)
103 #define PPSMC_CACLongTermAvgDisable ((uint8_t)0x6F)
104 #define PPSMC_MSG_CollectCAC_PowerCorreln ((uint8_t)0x7A)
105 #define PPSMC_FlushDataCache ((uint8_t)0x80)
106 #define PPSMC_MSG_SetEnabledLevels ((uint8_t)0x82)
107 #define PPSMC_MSG_SetForcedLevels ((uint8_t)0x83)
108 #define PPSMC_MSG_ResetToDefaults ((uint8_t)0x84)
109 #define PPSMC_MSG_EnableDTE ((uint8_t)0x87)
110 #define PPSMC_MSG_DisableDTE ((uint8_t)0x88)
111 #define PPSMC_MSG_ThrottleOVRDSCLKDS ((uint8_t)0x96)
112 #define PPSMC_MSG_CancelThrottleOVRDSCLKDS ((uint8_t)0x97)
113 #define PPSMC_MSG_EnableACDCGPIOInterrupt ((uint16_t) 0x149)
116 #define PPSMC_MSG_UVDDPM_SetEnabledMask ((uint16_t) 0x12D)
117 #define PPSMC_MSG_VCEDPM_SetEnabledMask ((uint16_t) 0x12E)
118 #define PPSMC_MSG_ACPDPM_SetEnabledMask ((uint16_t) 0x12F)
119 #define PPSMC_MSG_SAMUDPM_SetEnabledMask ((uint16_t) 0x130)
120 #define PPSMC_MSG_MCLKDPM_ForceState ((uint16_t) 0x131)
121 #define PPSMC_MSG_MCLKDPM_NoForcedLevel ((uint16_t) 0x132)
122 #define PPSMC_MSG_Thermal_Cntl_Disable ((uint16_t) 0x133)
123 #define PPSMC_MSG_Voltage_Cntl_Disable ((uint16_t) 0x135)
124 #define PPSMC_MSG_PCIeDPM_Enable ((uint16_t) 0x136)
125 #define PPSMC_MSG_PCIeDPM_Disable ((uint16_t) 0x13d)
126 #define PPSMC_MSG_ACPPowerOFF ((uint16_t) 0x137)
127 #define PPSMC_MSG_ACPPowerON ((uint16_t) 0x138)
128 #define PPSMC_MSG_SAMPowerOFF ((uint16_t) 0x139)
129 #define PPSMC_MSG_SAMPowerON ((uint16_t) 0x13a)
130 #define PPSMC_MSG_PCIeDPM_Disable ((uint16_t) 0x13d)
131 #define PPSMC_MSG_NBDPM_Enable ((uint16_t) 0x140)
132 #define PPSMC_MSG_NBDPM_Disable ((uint16_t) 0x141)
133 #define PPSMC_MSG_SCLKDPM_SetEnabledMask ((uint16_t) 0x145)
134 #define PPSMC_MSG_MCLKDPM_SetEnabledMask ((uint16_t) 0x146)
135 #define PPSMC_MSG_PCIeDPM_ForceLevel ((uint16_t) 0x147)
136 #define PPSMC_MSG_PCIeDPM_UnForceLevel ((uint16_t) 0x148)
137 #define PPSMC_MSG_EnableVRHotGPIOInterrupt ((uint16_t) 0x14a)
138 #define PPSMC_MSG_DPM_Enable ((uint16_t) 0x14e)
139 #define PPSMC_MSG_DPM_Disable ((uint16_t) 0x14f)
140 #define PPSMC_MSG_MCLKDPM_Enable ((uint16_t) 0x150)
141 #define PPSMC_MSG_MCLKDPM_Disable ((uint16_t) 0x151)
142 #define PPSMC_MSG_UVDDPM_Enable ((uint16_t) 0x154)
143 #define PPSMC_MSG_UVDDPM_Disable ((uint16_t) 0x155)
144 #define PPSMC_MSG_SAMUDPM_Enable ((uint16_t) 0x156)
145 #define PPSMC_MSG_SAMUDPM_Disable ((uint16_t) 0x157)
146 #define PPSMC_MSG_ACPDPM_Enable ((uint16_t) 0x158)
147 #define PPSMC_MSG_ACPDPM_Disable ((uint16_t) 0x159)
148 #define PPSMC_MSG_VCEDPM_Enable ((uint16_t) 0x15a)
149 #define PPSMC_MSG_VCEDPM_Disable ((uint16_t) 0x15b)
150 #define PPSMC_MSG_VddC_Request ((uint16_t) 0x15f)
151 #define PPSMC_MSG_SCLKDPM_GetEnabledMask ((uint16_t) 0x162)
152 #define PPSMC_MSG_PCIeDPM_SetEnabledMask ((uint16_t) 0x167)
153 #define PPSMC_MSG_TDCLimitEnable ((uint16_t) 0x169)
154 #define PPSMC_MSG_TDCLimitDisable ((uint16_t) 0x16a)
155 #define PPSMC_MSG_PkgPwrLimitEnable ((uint16_t) 0x185)
156 #define PPSMC_MSG_PkgPwrLimitDisable ((uint16_t) 0x186)
157 #define PPSMC_MSG_PkgPwrSetLimit ((uint16_t) 0x187)
158 #define PPSMC_MSG_OverDriveSetTargetTdp ((uint16_t) 0x188)
159 #define PPSMC_MSG_SCLKDPM_FreezeLevel ((uint16_t) 0x189)
160 #define PPSMC_MSG_SCLKDPM_UnfreezeLevel ((uint16_t) 0x18A)
161 #define PPSMC_MSG_MCLKDPM_FreezeLevel ((uint16_t) 0x18B)
162 #define PPSMC_MSG_MCLKDPM_UnfreezeLevel ((uint16_t) 0x18C)
163 #define PPSMC_MSG_MASTER_DeepSleep_ON ((uint16_t) 0x18F)
164 #define PPSMC_MSG_MASTER_DeepSleep_OFF ((uint16_t) 0x190)
165 #define PPSMC_MSG_Remove_DC_Clamp ((uint16_t) 0x191)
166 #define PPSMC_MSG_SetFanPwmMax ((uint16_t) 0x19A)
167 #define PPSMC_MSG_SetFanRpmMax ((uint16_t) 0x205)
169 #define PPSMC_MSG_ENABLE_THERMAL_DPM ((uint16_t) 0x19C)
170 #define PPSMC_MSG_DISABLE_THERMAL_DPM ((uint16_t) 0x19D)
172 #define PPSMC_MSG_API_GetSclkFrequency ((uint16_t) 0x200)
173 #define PPSMC_MSG_API_GetMclkFrequency ((uint16_t) 0x201)
176 #define PPSMC_MSG_DPM_Config ((uint32_t) 0x102)
177 #define PPSMC_MSG_DPM_ForceState ((uint32_t) 0x104)
178 #define PPSMC_MSG_PG_SIMD_Config ((uint32_t) 0x108)
179 #define PPSMC_MSG_Voltage_Cntl_Enable ((uint32_t) 0x109)
180 #define PPSMC_MSG_Thermal_Cntl_Enable ((uint32_t) 0x10a)
181 #define PPSMC_MSG_VCEPowerOFF ((uint32_t) 0x10e)
182 #define PPSMC_MSG_VCEPowerON ((uint32_t) 0x10f)
183 #define PPSMC_MSG_DPM_N_LevelsDisabled ((uint32_t) 0x112)
184 #define PPSMC_MSG_DCE_RemoveVoltageAdjustment ((uint32_t) 0x11d)
185 #define PPSMC_MSG_DCE_AllowVoltageAdjustment ((uint32_t) 0x11e)
186 #define PPSMC_MSG_EnableBAPM ((uint32_t) 0x120)
187 #define PPSMC_MSG_DisableBAPM ((uint32_t) 0x121)
188 #define PPSMC_MSG_UVD_DPM_Config ((uint32_t) 0x124)
190 #define PPSMC_MSG_DRV_DRAM_ADDR_HI ((uint16_t) 0x250)
191 #define PPSMC_MSG_DRV_DRAM_ADDR_LO ((uint16_t) 0x251)
192 #define PPSMC_MSG_SMU_DRAM_ADDR_HI ((uint16_t) 0x252)
193 #define PPSMC_MSG_SMU_DRAM_ADDR_LO ((uint16_t) 0x253)
194 #define PPSMC_MSG_LoadUcodes ((uint16_t) 0x254)