Searched +full:0 +full:x00580000 (Results 1 – 8 of 8) sorted by relevance
70 reg = <0x00580000 0x14000>;
26 ranges = <0 0xf0000000 0x0000c000>;27 reg = <0xf0000000 0x00000100>;28 bus-frequency = <0>; /* From boot loader */29 system-frequency = <0>; /* From boot loader */41 reg = <0x2000 0x100>;42 interrupts = <2 1 0>;63 reg = <0x2c00 0x100>;64 interrupts = <2 4 0>;73 reg = <0x03>;94 ranges = <0 0 0xfc000000 0x02000000[all …]
46 reg = <0xf 0xffe1e000 0 0x2000>;47 ranges = <0x0 0x0 0xf 0xec000000 0x0400000048 0x1 0x0 0xf 0xff800000 0x0001000049 0x2 0x0 0xf 0xffdf0000 0x00010000>;54 ranges = <0x0 0xf 0xffe00000 0x100000>;58 reg = <0xf 0xffe0a000 0 0x1000>;59 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x2000000060 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;61 pcie@0 {62 ranges = <0x2000000 0x0 0x80000000[all …]
36 nor@0,0 {40 reg = <0x0 0x0 0x2000000>;46 reg = <0x00040000 0x00040000>;52 reg = <0x00080000 0x00700000>;58 reg = <0x00800000 0x01400000>;66 reg = <0x01f00000 0x00100000>;72 ifc_nand: nand@1,0 {76 reg = <0x1 0x0 0x10000>;79 cpld@3,0 {83 reg = <0x3 0x0 0x0000020>;[all …]
43 nor@0,0 {47 reg = <0x0 0x0 0x4000000>;51 partition@0 {54 reg = <0x0 0x00040000>;61 reg = <0x00040000 0x00040000>;67 reg = <0x00080000 0x00580000>;73 reg = <0x00600000 0x038c0000>;80 reg = <0x03ec0000 0x00040000>;89 reg = <0x03f00000 0x00100000>;96 display@2,0 {[all …]
68 reg = <0 0x40000000 0 0x40000000>;73 reg = <2 0x00000000 0 0x40000000>;79 pinctrl-0 = <&keyboard_pins>;83 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;111 gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;215 states = <3300000 1>, <1800000 0>;238 states = <3300000 1>, <1800000 0>;261 states = <3300000 1>, <1800000 0>;266 #clock-cells = <0>;300 #clock-cells = <0>;[all …]
24 #define DFLT_FQ_ID 0x00FFFFFF27 #define PORT_BMI_FIFO_UNITS 0x10034 #define PORT_IC_OFFSET_UNITS 0x1038 #define BMI_PORT_REGS_OFFSET 039 #define QMI_PORT_REGS_OFFSET 0x40040 #define HWP_PORT_REGS_OFFSET 0x80059 #define DFLT_PORT_EXTRA_NUM_OF_FIFO_BUFS 062 #define QMI_DEQ_CFG_SUBPORTAL_MASK 0x1f64 #define QMI_PORT_CFG_EN 0x8000000065 #define QMI_PORT_STATUS_DEQ_FD_BSY 0x20000000[all …]
10 #define PIO 0x000000UL11 #define FZC_PIO 0x080000UL12 #define FZC_MAC 0x180000UL13 #define FZC_IPP 0x280000UL14 #define FFLP 0x300000UL15 #define FZC_FFLP 0x380000UL16 #define PIO_VADDR 0x400000UL17 #define ZCP 0x500000UL18 #define FZC_ZCP 0x580000UL19 #define DMC 0x600000UL[all …]