Lines Matching +full:0 +full:x00580000
27 reg = <0 0x80000000 0 0>;
36 reg = <0x0 0x86000000 0x0 0x300000>;
42 reg = <0x0 0x86300000 0x0 0x100000>;
50 reg = <0x0 0x86400000 0x0 0x100000>;
55 reg = <0x0 0x86500000 0x0 0x180000>;
60 reg = <0x0 0x86680000 0x0 0x80000>;
66 reg = <0x0 0x86700000 0x0 0xe0000>;
73 reg = <0x0 0x867e0000 0x0 0x20000>;
85 * alignment = <0x0 0x400000>;
86 * alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
88 reg = <0x0 0x86800000 0x0 0>; /* size is device-specific */
94 size = <0x0 0x600000>;
95 alignment = <0x0 0x100000>;
96 alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
102 size = <0x0 0x500000>;
103 alignment = <0x0 0x100000>;
104 alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
110 size = <0x0 0x100000>;
111 alignment = <0x0 0x100000>;
112 alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
121 #clock-cells = <0>;
127 #clock-cells = <0>;
134 #size-cells = <0>;
136 CPU0: cpu@0 {
139 reg = <0x0>;
154 reg = <0x1>;
169 reg = <0x2>;
184 reg = <0x3>;
205 CPU_SLEEP_0: cpu-sleep-0 {
208 arm,psci-suspend-param = <0x40000002>;
220 arm,psci-suspend-param = <0x41000012>;
228 arm,psci-suspend-param = <0x41000032>;
263 qcom,dload-mode = <&tcsr 0x6100>;
277 #power-domain-cells = <0>;
283 #power-domain-cells = <0>;
289 #power-domain-cells = <0>;
295 #power-domain-cells = <0>;
301 #power-domain-cells = <0>;
311 mboxes = <&apcs 0>;
365 qcom,local-pid = <0>;
390 qcom,local-pid = <0>;
411 #size-cells = <0>;
413 mboxes = <0>, <&apcs 13>, <0>, <&apcs 19>;
415 apps_smsm: apps@0 {
416 reg = <0>;
438 soc: soc@0 {
441 ranges = <0 0 0 0xffffffff>;
446 reg = <0x00022000 0x200>;
453 reg = <0x004ab000 0x4>;
458 reg = <0x0005c000 0x1000>;
463 reg = <0xd0 0x1>;
464 bits = <0 7>;
468 reg = <0xd0 0x2>;
473 reg = <0xd1 0x2>;
478 reg = <0xd2 0x1>;
482 reg = <0xd2 0x2>;
486 reg = <0xd3 0x1>;
491 reg = <0xd4 0x1>;
492 bits = <0 5>;
498 reg = <0xd4 0x2>;
503 reg = <0xd5 0x1>;
508 reg = <0xd5 0x2>;
513 reg = <0xd6 0x2>;
518 reg = <0xd7 0x1>;
523 reg = <0xef 0x1>;
530 reg = <0x00060000 0x8000>;
535 reg = <0x00290000 0x10000>;
540 reg = <0x00400000 0x62000>;
546 reg = <0x004a9000 0x1000>, /* TM */
547 <0x004a8000 0x1000>; /* SROT */
572 reg = <0x00500000 0x11000>;
578 reg = <0x00580000 0x14000>;
584 reg = <0x00802000 0x1000>,
585 <0x09280000 0x180000>;
603 /* CTI 0 - TMC connections */
606 reg = <0x00810000 0x1000>;
617 reg = <0x00811000 0x1000>;
629 reg = <0x00820000 0x1000>;
647 reg = <0x00821000 0x1000>;
656 #size-cells = <0>;
660 * 0 - connected to Resource and Power Manger CPU ETM
695 reg = <0x00824000 0x1000>;
704 #size-cells = <0>;
706 port@0 {
707 reg = <0>;
731 reg = <0x00825000 0x1000>;
757 reg = <0x00826000 0x1000>;
775 reg = <0x00841000 0x1000>;
784 #size-cells = <0>;
786 port@0 {
787 reg = <0>;
823 reg = <0x00850000 0x1000>;
832 reg = <0x00852000 0x1000>;
841 reg = <0x00854000 0x1000>;
850 reg = <0x00856000 0x1000>;
858 /* CTI - CPU-0 */
862 reg = <0x00858000 0x1000>;
877 reg = <0x00859000 0x1000>;
892 reg = <0x0085a000 0x1000>;
907 reg = <0x0085b000 0x1000>;
920 reg = <0x0085c000 0x1000>;
941 reg = <0x0085d000 0x1000>;
962 reg = <0x0085e000 0x1000>;
983 reg = <0x0085f000 0x1000>;
1004 reg = <0x01000000 0x300000>;
1007 gpio-ranges = <&tlmm 0 0 122>;
1497 reg = <0x01800000 0x80000>;
1501 <&mdss_dsi0_phy 0>,
1502 <0>,
1503 <0>,
1504 <0>;
1516 reg = <0x01905000 0x20000>;
1522 reg = <0x01937000 0x30000>;
1528 reg = <0x01a00000 0x1000>,
1529 <0x01ac8000 0x3000>;
1552 reg = <0x01a01000 0x89000>;
1556 interrupts = <0>;
1571 #size-cells = <0>;
1573 port@0 {
1574 reg = <0>;
1585 reg = <0x01a98000 0x25c>;
1593 assigned-clock-parents = <&mdss_dsi0_phy 0>,
1611 #size-cells = <0>;
1615 #size-cells = <0>;
1617 port@0 {
1618 reg = <0>;
1634 reg = <0x01a98300 0xd4>,
1635 <0x01a98500 0x280>,
1636 <0x01a98780 0x30>;
1642 #phy-cells = <0>;
1652 reg = <0x01b0ac00 0x200>,
1653 <0x01b00030 0x4>,
1654 <0x01b0b000 0x200>,
1655 <0x01b00038 0x4>,
1656 <0x01b08000 0x100>,
1657 <0x01b08400 0x100>,
1658 <0x01b0a000 0x500>,
1659 <0x01b00020 0x10>,
1660 <0x01b10000 0x1000>;
1725 #size-cells = <0>;
1727 port@0 {
1728 reg = <0>;
1740 #size-cells = <0>;
1741 reg = <0x01b0c000 0x1000>;
1753 pinctrl-0 = <&cci0_default>;
1756 cci_i2c0: i2c-bus@0 {
1757 reg = <0>;
1760 #size-cells = <0>;
1766 reg = <0x01c00000 0x20000>;
1805 reg = <0x01d00000 0xff000>;
1830 ranges = <0 0x01e20000 0x20000>;
1831 reg = <0x01ef0000 0x3000>;
1840 reg = <0x3000 0x1000>;
1847 reg = <0x4000 0x1000>;
1854 reg = <0x5000 0x1000>;
1864 ranges = <0 0x01f08000 0x10000>;
1873 reg = <0x1000 0x1000>;
1880 reg = <0x2000 0x1000>;
1887 reg = <0x0200f000 0x001000>,
1888 <0x02400000 0x400000>,
1889 <0x02c00000 0x400000>,
1890 <0x03800000 0x200000>,
1891 <0x0200a000 0x002100>;
1895 qcom,ee = <0>;
1896 qcom,channel = <0>;
1898 #size-cells = <0>;
1905 reg = <0x04044000 0x19000>;
1908 qcom,ee = <0>;
1919 reg = <0x04080000 0x100>,
1920 <0x04020000 0x040>;
1925 <&hexagon_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
1942 qcom,smem-states = <&hexagon_smp2p_out 0>;
1945 resets = <&scm 0>;
1948 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
1979 qcom,smd-edge = <0>;
1990 #size-cells = <0>;
2005 #size-cells = <0>;
2017 #size-cells = <0>;
2028 #sound-dai-cells = <0>;
2040 #size-cells = <0>;
2053 reg = <0x07702000 0x4>, <0x07702004 0x4>;
2085 reg = <0x07708000 0x10000>;
2089 #size-cells = <0>;
2094 reg = <0x0771c000 0x400>;
2104 reg = <0x07824900 0x11c>, <0x07824000 0x800>;
2114 pinctrl-0 = <&sdc1_default>;
2125 reg = <0x07864900 0x11c>, <0x07864000 0x800>;
2135 pinctrl-0 = <&sdc2_default>;
2144 reg = <0x07884000 0x23000>;
2149 qcom,ee = <0>;
2155 reg = <0x078af000 0x200>;
2159 dmas = <&blsp_dma 0>, <&blsp_dma 1>;
2162 pinctrl-0 = <&blsp_uart1_default>;
2169 reg = <0x078b0000 0x200>;
2176 pinctrl-0 = <&blsp_uart2_default>;
2183 reg = <0x078b5000 0x500>;
2191 pinctrl-0 = <&blsp_i2c1_default>;
2194 #size-cells = <0>;
2200 reg = <0x078b5000 0x500>;
2208 pinctrl-0 = <&blsp_spi1_default>;
2211 #size-cells = <0>;
2217 reg = <0x078b6000 0x500>;
2225 pinctrl-0 = <&blsp_i2c2_default>;
2228 #size-cells = <0>;
2234 reg = <0x078b6000 0x500>;
2242 pinctrl-0 = <&blsp_spi2_default>;
2245 #size-cells = <0>;
2251 reg = <0x078b7000 0x500>;
2259 pinctrl-0 = <&blsp_i2c3_default>;
2262 #size-cells = <0>;
2268 reg = <0x078b7000 0x500>;
2276 pinctrl-0 = <&blsp_spi3_default>;
2279 #size-cells = <0>;
2285 reg = <0x078b8000 0x500>;
2293 pinctrl-0 = <&blsp_i2c4_default>;
2296 #size-cells = <0>;
2302 reg = <0x078b8000 0x500>;
2310 pinctrl-0 = <&blsp_spi4_default>;
2313 #size-cells = <0>;
2319 reg = <0x078b9000 0x500>;
2327 pinctrl-0 = <&blsp_i2c5_default>;
2330 #size-cells = <0>;
2336 reg = <0x078b9000 0x500>;
2344 pinctrl-0 = <&blsp_spi5_default>;
2347 #size-cells = <0>;
2353 reg = <0x078ba000 0x500>;
2361 pinctrl-0 = <&blsp_i2c6_default>;
2364 #size-cells = <0>;
2370 reg = <0x078ba000 0x500>;
2378 pinctrl-0 = <&blsp_spi6_default>;
2381 #size-cells = <0>;
2387 reg = <0x078d9000 0x200>,
2388 <0x078d9200 0x200>;
2403 ahb-burst-config = <0>;
2413 #phy-cells = <0>;
2416 resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
2418 qcom,init-seq = /bits/ 8 <0x0 0x44>,
2419 <0x1 0x6b>,
2420 <0x2 0x24>,
2421 <0x3 0x13>;
2428 reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>;
2434 <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
2444 qcom,smem-states = <&wcnss_smp2p_out 0>;
2448 pinctrl-0 = <&wcss_wlan_default>;
2495 reg = <0x0b000000 0x1000>, <0x0b002000 0x2000>,
2496 <0x0b001000 0x1000>, <0x0b004000 0x2000>;
2497 interrupts = <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
2502 reg = <0x0b011000 0x1000>;
2506 #clock-cells = <0>;
2511 reg = <0x0b016000 0x40>;
2512 #clock-cells = <0>;
2522 reg = <0x0b020000 0x1000>;
2526 frame-number = <0>;
2529 reg = <0x0b021000 0x1000>,
2530 <0x0b022000 0x1000>;
2536 reg = <0x0b023000 0x1000>;
2543 reg = <0x0b024000 0x1000>;
2550 reg = <0x0b025000 0x1000>;
2557 reg = <0x0b026000 0x1000>;
2564 reg = <0x0b027000 0x1000>;
2571 reg = <0x0b028000 0x1000>;
2578 reg = <0x0b088000 0x1000>;
2583 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2584 reg = <0x0b089000 0x1000>;
2590 reg = <0x0b098000 0x1000>;
2595 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2596 reg = <0x0b099000 0x1000>;
2602 reg = <0x0b0a8000 0x1000>;
2607 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2608 reg = <0x0b0a9000 0x1000>;
2614 reg = <0x0b0b8000 0x1000>;
2619 compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
2620 reg = <0x0b0b9000 0x1000>;
2727 thermal-sensors = <&tsens 0>;