/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | omap4460.dtsi | 12 cpu0: cpu@0 { 32 reg = <0x4a002260 0x4 33 0x4a00232C 0x4 34 0x4a002378 0x18>; 36 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; /* talert */ 39 #thermal-sensor-cells = <0>; 45 reg = <0x4a307bd [all...] |
H A D | omap5-l4.dtsi | 1 &l4_cfg { /* 0x4a000000 */ 4 clocks = <&l4cfg_clkctrl OMAP5_L4_CFG_CLKCTRL 0>; 6 reg = <0x4a000000 0x800>, 7 <0x4a000800 0x800>, 8 <0x4a001000 0x1000>; 12 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */ 13 <0x00080000 0x4a080000 0x080000>, /* segment 1 */ 14 <0x00100000 0x4a100000 0x080000>, /* segment 2 */ 15 <0x00180000 0x4a180000 0x080000>, /* segment 3 */ 16 <0x00200000 0x4a200000 0x080000>, /* segment 4 */ [all …]
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H A D | omap4-l4.dtsi | 2 &l4_cfg { /* 0x4a000000 */ 5 clocks = <&l4_cfg_clkctrl OMAP4_L4_CFG_CLKCTRL 0>; 7 reg = <0x4a000000 0x800>, 8 <0x4a000800 0x800>, 9 <0x4a001000 0x1000>; 13 ranges = <0x00000000 0x4a00000 [all...] |
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | nvidia,tegra30-emc.yaml | 35 const: 0 53 "^emc-timings-[0-9]+$": 62 "^timing-[0-9]+$": 75 minimum: 0 91 Mode Register 0. 98 minimum: 0 239 reg = <0x7000f400 0x400>; 240 interrupts = <0 78 4>; 247 #interconnect-cells = <0>; 255 nvidia,emc-auto-cal-interval = <0x001fffff>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
H A D | tegra30-asus-tf700t.dts | 92 reg = <0x10>; 111 mount-matrix = "1", "0", "0", 112 "0", "-1", "0", 113 "0", "0", "-1"; 117 mount-matrix = "0", "1", "0", 118 "1", "0", " [all...] |
H A D | tegra30-asus-nexus7-tilapia-memory-timings.dtsi | 13 emc-timings-0 { 17 nvidia,emc-auto-cal-interval = <0x001fffff>; 18 nvidia,emc-mode-1 = <0x80100002>; 19 nvidia,emc-mode-2 = <0x80200018>; 20 nvidia,emc-mode-reset = <0x80000b71>; 21 nvidia,emc-zcal-cnt-long = <0x00000040>; 25 0x0000001f /* EMC_RC */ 26 0x00000069 /* EMC_RFC */ 27 0x00000017 /* EMC_RAS */ 28 0x00000007 /* EMC_RP */ [all …]
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H A D | tegra30-asus-tf300tg.dts | 22 <TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>, 171 reg = <0x10>; 190 mount-matrix = "1", "0", "0", 191 "0", "-1", "0", 192 "0", "0", "-1"; 196 mount-matrix = "-1", "0", "0", 197 "0", "1", "0", 198 "0", "0", "-1"; 203 mount-matrix = "0", "-1", "0", 204 "-1", "0", "0", [all …]
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H A D | tegra30-ouya.dts | 32 tlm,version-major = <0x0>; 33 tlm,version-minor = <0x0>; 38 reg = <0x80000000 0x40000000>; 48 alloc-ranges = <0x80000000 0x30000000>; 49 size = <0x10000000>; /* 256MiB */ 56 reg = <0xbfdf0000 0x10000>; /* 64kB */ 57 console-size = <0x800 [all...] |
H A D | tegra30-asus-nexus7-grouper-memory-timings.dtsi | 5 emc-timings-0 { 6 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */ 12 0x00020001 /* MC_EMEM_ARB_CFG */ 13 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 14 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 15 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 16 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 17 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 18 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 19 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/allwinner/ |
H A D | sun50i-h5.dtsi | 11 #size-cells = <0>; 13 cpu0: cpu@0 { 16 reg = <0>; 84 reg = <0x01c00000 0x1000>; 91 reg = <0x00018000 0x1c000>; 94 ranges = <0 0x00018000 0x1c000>; 96 ve_sram: sram-section@0 { 99 reg = <0x000000 0x1c000>; 106 reg = <0x01c0e000 0x1000>; 117 reg = <0x01c15000 0x1000>; [all …]
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H A D | sun50i-a64.dtsi | 47 #size-cells = <0>; 49 cpu0: cpu@0 { 52 reg = <0>; 124 #clock-cells = <0>; 131 #clock-cells = <0>; 153 #size-cells = <0>; 164 simple-audio-card,dai-link@0 { 175 sound-dai = <&codec 0>; 197 polling-delay-passive = <0>; 198 polling-delay = <0>; [all …]
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/freebsd/sys/arm/rockchip/ |
H A D | rk32xx_mp.c | 51 #define IMEM_PHYSBASE 0xFF700000 52 #define IMEM_SIZE 0x00018000 54 #define PMU_PHYSBASE 0xFF730000 55 #define PMU_SIZE 0x00010000 56 #define PMU_PWRDN_CON 0x08 66 if (mp_ncpus != 0) in rk32xx_mp_setmaxid() 85 rv = bus_space_map(fdtbus_bs_tag, IMEM_PHYSBASE, IMEM_SIZE, 0, &imem); in rk32xx_mp_start_pmu() 86 if (rv != 0) in rk32xx_mp_start_pmu() 88 rv = bus_space_map(fdtbus_bs_tag, PMU_PHYSBASE, PMU_SIZE, 0, &pmu); in rk32xx_mp_start_pmu() 89 if (rv != 0) in rk32xx_mp_start_pmu() [all …]
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/freebsd/sys/net80211/ |
H A D | ieee80211_radiotap.h | 70 uint8_t it_version; /* Version 0. Only increases 83 * (0x80000000) to extend the 111 * Tx/Rx data rate. If bit 0x80 is set then it represents an 146 * power set at factory calibration. 0 is max power. 152 * set at factory calibration. 0 is max power. Monotonically 170 * The first antenna is antenna 0. 208 IEEE80211_RADIOTAP_TSFT = 0, 247 #define IEEE80211_CHAN_TURBO 0x00000010 /* Turbo channel */ 248 #define IEEE80211_CHAN_CCK 0x00000020 /* CCK channel */ 249 #define IEEE80211_CHAN_OFDM 0x0000004 [all...] |
/freebsd/sys/dev/sound/macio/ |
H A D | davbusreg.h | 36 #define DAVBUS_SOUND_CTRL 0x00 37 #define DAVBUS_CODEC_CTRL 0x10 38 #define DAVBUS_CODEC_STATUS 0x20 39 #define DAVBUS_CLIP_COUNT 0x30 40 #define DAVBUS_BYTE_SWAP 0x40 44 * but the controller itself uses subframe 0 to communicate with the codec. 49 #define DAVBUS_INPUT_SUBFRAME0 0x00000001 50 #define DAVBUS_INPUT_SUBFRAME1 0x00000002 51 #define DAVBUS_INPUT_SUBFRAME2 0x00000004 52 #define DAVBUS_INPUT_SUBFRAME3 0x00000008 [all …]
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/freebsd/sys/dev/usb/controller/ |
H A D | dwc_otgreg.h | 32 #define DOTG_GOTGCTL 0x0000 33 #define DOTG_GOTGINT 0x0004 34 #define DOTG_GAHBCFG 0x0008 35 #define DOTG_GUSBCFG 0x000C 36 #define DOTG_GRSTCTL 0x0010 37 #define DOTG_GINTSTS 0x0014 38 #define DOTG_GINTMSK 0x0018 39 #define DOTG_GRXSTSRD 0x001C 40 #define DOTG_GRXSTSRH 0x001C 41 #define DOTG_GRXSTSPD 0x0020 [all …]
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
H A D | bcm23550.dtsi | 47 #size-cells = <0>; 49 cpu0: cpu@0 { 52 reg = <0>; 60 secondary-boot-reg = <0x35004178>; 69 secondary-boot-reg = <0x35004178>; 78 secondary-boot-reg = <0x35004178>; 87 ranges = <0 0x34000000 0x102f83ac>; 93 reg = <0x0004e00 [all...] |
/freebsd/sys/dev/bge/ |
H A D | if_bgereg.h | 54 * device register space at offset 0x8000 to read any 32K chunk 60 * accessed directly. NIC memory addresses are offset by 0x01000000. 64 #define BGE_PAGE_ZERO 0x00000000 65 #define BGE_PAGE_ZERO_END 0x000000FF 66 #define BGE_SEND_RING_RCB 0x00000100 67 #define BGE_SEND_RING_RCB_END 0x000001FF 68 #define BGE_RX_RETURN_RING_RCB 0x00000200 69 #define BGE_RX_RETURN_RING_RCB_END 0x000002FF 70 #define BGE_STATS_BLOCK 0x00000300 71 #define BGE_STATS_BLOCK_END 0x00000AFF [all …]
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/freebsd/sys/dev/ispfw/ |
H A D | asm_2500.h | 38 0x0501f06b, 0x00115000, 0x00100000, 0x0000c8ea, 39 0x00000008, 0x00000008, 0x000000cf, 0x00109095, 40 0x00000004, 0x00000000, 0x20434f50, 0x59524947, 41 0x48542032, 0x30313920, 0x514c4f47, 0x49432043, 42 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 43 0x32357878, 0x20466972, 0x6d776172, 0x65202020, 44 0x56657273, 0x696f6e20, 0x2020382e, 0x30382e32, 45 0x30372020, 0x24000000, 0x00000000, 0x00000000, 46 0x00000000, 0x00000000, 0x00100000, 0x00100000, 47 0x0000c8ea, 0xffffffff, 0x00115004, 0x00020000, [all …]
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H A D | asm_2700.h | 38 0x0501f06c, 0x00122000, 0x00100000, 0x00014f80, 39 0x00000009, 0x0000000c, 0x00000000, 0x785ad0d5, 40 0x00000040, 0x0000f206, 0x20434f50, 0x59524947, 41 0x48542032, 0x30323220, 0x514c4f47, 0x49432043, 42 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 43 0x32377878, 0x20466972, 0x6d776172, 0x65202020, 44 0x56657273, 0x696f6e20, 0x2020392e, 0x31322e30, 45 0x30202024, 0x00000000, 0x0000002f, 0x00000000, 46 0x00000000, 0x00000000, 0x00000000, 0x00100000, 47 0x00100000, 0x00014f80, 0xffffffff, 0x00122004, [all …]
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H A D | asm_2600.h | 38 0x0501f06c, 0x0011b000, 0x00100000, 0x00011c0f, 39 0x00000008, 0x00000008, 0x000000e7, 0x0078d0d5, 40 0x00000020, 0x00000006, 0x20434f50, 0x59524947, 41 0x48542032, 0x30313920, 0x514c4f47, 0x49432043, 42 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 43 0x38337878, 0x20466972, 0x6d776172, 0x65202020, 44 0x56657273, 0x696f6e20, 0x2020382e, 0x30382e32, 45 0x33312020, 0x24000000, 0x00000026, 0x00000000, 46 0x00000000, 0x00000000, 0x00000000, 0x00100000, 47 0x00100000, 0x00011c0f, 0xffffffff, 0x0011b004, [all …]
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H A D | asm_2800.h | 38 0x0501f078, 0x00124000, 0x00100000, 0x00017380, 39 0x00000009, 0x0000000c, 0x00000001, 0x785ad0d5, 40 0x00000080, 0x0001f626, 0x20434f50, 0x59524947, 41 0x48542032, 0x30323320, 0x514c4f47, 0x49432043, 42 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 43 0x32387878, 0x20466972, 0x6d776172, 0x65202020, 44 0x56657273, 0x696f6e20, 0x2020392e, 0x31322e30, 45 0x31202024, 0x00000000, 0x00000092, 0x00000000, 46 0x00000000, 0x00000000, 0x00000000, 0x00100000, 47 0x00100000, 0x00017380, 0xffffffff, 0x00124004, [all …]
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H A D | asm_2400.h | 33 0x0401f1be, 0x00112000, 0x00100000, 0x0000c79b, 34 0x00000008, 0x00000007, 0x00000000, 0x00009496, 35 0x00000003, 0x00000000, 0x20434f50, 0x59524947, 36 0x48542032, 0x30313720, 0x514c4f47, 0x49432043, 37 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 38 0x32347878, 0x20466972, 0x6d776172, 0x65202020, 39 0x56657273, 0x696f6e20, 0x2020382e, 0x30372e30, 40 0x30202024, 0x00000000, 0x00000000, 0x00000000, 41 0x00000000, 0x00000000, 0x00000000, 0x00000000, 42 0x00000000, 0x00000000, 0x00000000, 0x00000000, [all …]
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/freebsd/contrib/bearssl/src/ec/ |
H A D | ec_prime_i31.c | 34 0x00000108, 35 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF, 0x00000007, 36 0x00000000, 0x00000000, 0x00000040, 0x7FFFFF80, 37 0x000000FF 41 0x00000108, 42 0x00014000, 0x00018000, 0x00000000, 0x7FF40000, 43 0x7FEFFFFF, 0x7FF7FFFF, 0x7FAFFFFF, 0x005FFFFF, 44 0x00000000 48 0x00000108, 49 0x6FEE1803, 0x6229C4BD, 0x21B139BE, 0x327150AA, [all …]
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/freebsd/sys/dev/sfxge/common/ |
H A D | efx_regs.h | 49 * SPI/VPD configuration register 0 51 #define FR_AB_EE_VPD_CFG0_REG_SF_OFST 0x00000300 55 * SPI/VPD configuration register 0 57 #define FR_AB_EE_VPD_CFG0_REG_OFST 0x00000140 90 #define FRF_AB_EE_VPD_EN_LBN 0 95 * PCIE SerDes control register 0 to 3 97 #define FR_AB_PCIE_SD_CTL0123_REG_SF_OFST 0x00000320 101 * PCIE SerDes control register 0 to 3 103 #define FR_AB_PCIE_SD_CTL0123_REG_OFST 0x00000320 139 #define FFE_AB_PCIE_RXTERMADJ_NOMNL 0 [all …]
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/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | nvm_cfg.h | 43 #define NVM_CFG_version 0x83306 54 #define NVM_CFG_MAC_ADDRESS_HI_MASK 0x0000FFFF 55 #define NVM_CFG_MAC_ADDRESS_HI_OFFSET 0 64 u32 generic_cont0; /* 0x0 */ 65 #define NVM_CFG1_GLOB_BOARD_SWAP_MASK 0x0000000F 66 #define NVM_CFG1_GLOB_BOARD_SWAP_OFFSET 0 67 #define NVM_CFG1_GLOB_BOARD_SWAP_NONE 0x0 68 #define NVM_CFG1_GLOB_BOARD_SWAP_PATH 0x1 69 #define NVM_CFG1_GLOB_BOARD_SWAP_PORT 0x2 70 #define NVM_CFG1_GLOB_BOARD_SWAP_BOTH 0x3 [all …]
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