1*b2d2a78aSEmmanuel Vadot// SPDX-License-Identifier: BSD-3-Clause 2*b2d2a78aSEmmanuel Vadot/* 3*b2d2a78aSEmmanuel Vadot * Common device tree for components shared between the BCM21664 and BCM23550 4*b2d2a78aSEmmanuel Vadot * SoCs. 5*b2d2a78aSEmmanuel Vadot * 6*b2d2a78aSEmmanuel Vadot * Copyright (C) 2016 Broadcom 7*b2d2a78aSEmmanuel Vadot */ 8*b2d2a78aSEmmanuel Vadot 9*b2d2a78aSEmmanuel Vadot/dts-v1/; 10*b2d2a78aSEmmanuel Vadot 11*b2d2a78aSEmmanuel Vadot#include <dt-bindings/clock/bcm21664.h> 12*b2d2a78aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/arm-gic.h> 13*b2d2a78aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/irq.h> 14*b2d2a78aSEmmanuel Vadot 15*b2d2a78aSEmmanuel Vadot/ { 16*b2d2a78aSEmmanuel Vadot #address-cells = <1>; 17*b2d2a78aSEmmanuel Vadot #size-cells = <1>; 18*b2d2a78aSEmmanuel Vadot 19*b2d2a78aSEmmanuel Vadot /* Hub bus */ 20*b2d2a78aSEmmanuel Vadot hub: hub-bus@34000000 { 21*b2d2a78aSEmmanuel Vadot compatible = "simple-bus"; 22*b2d2a78aSEmmanuel Vadot ranges = <0 0x34000000 0x102f83ac>; 23*b2d2a78aSEmmanuel Vadot #address-cells = <1>; 24*b2d2a78aSEmmanuel Vadot #size-cells = <1>; 25*b2d2a78aSEmmanuel Vadot 26*b2d2a78aSEmmanuel Vadot smc: smc@4e000 { 27*b2d2a78aSEmmanuel Vadot /* Compatible filled by SoC DTSI */ 28*b2d2a78aSEmmanuel Vadot reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */ 29*b2d2a78aSEmmanuel Vadot }; 30*b2d2a78aSEmmanuel Vadot 31*b2d2a78aSEmmanuel Vadot resetmgr: reset-controller@1001f00 { 32*b2d2a78aSEmmanuel Vadot compatible = "brcm,bcm21664-resetmgr"; 33*b2d2a78aSEmmanuel Vadot reg = <0x01001f00 0x24>; 34*b2d2a78aSEmmanuel Vadot }; 35*b2d2a78aSEmmanuel Vadot 36*b2d2a78aSEmmanuel Vadot gpio: gpio@1003000 { 37*b2d2a78aSEmmanuel Vadot /* Compatible filled by SoC DTSI */ 38*b2d2a78aSEmmanuel Vadot reg = <0x01003000 0x524>; 39*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 40*b2d2a78aSEmmanuel Vadot <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 41*b2d2a78aSEmmanuel Vadot <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 42*b2d2a78aSEmmanuel Vadot <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 43*b2d2a78aSEmmanuel Vadot #gpio-cells = <2>; 44*b2d2a78aSEmmanuel Vadot #interrupt-cells = <2>; 45*b2d2a78aSEmmanuel Vadot gpio-controller; 46*b2d2a78aSEmmanuel Vadot interrupt-controller; 47*b2d2a78aSEmmanuel Vadot }; 48*b2d2a78aSEmmanuel Vadot 49*b2d2a78aSEmmanuel Vadot timer@1006000 { 50*b2d2a78aSEmmanuel Vadot compatible = "brcm,kona-timer"; 51*b2d2a78aSEmmanuel Vadot reg = <0x01006000 0x1c>; 52*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 53*b2d2a78aSEmmanuel Vadot clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>; 54*b2d2a78aSEmmanuel Vadot }; 55*b2d2a78aSEmmanuel Vadot }; 56*b2d2a78aSEmmanuel Vadot 57*b2d2a78aSEmmanuel Vadot /* Slaves bus */ 58*b2d2a78aSEmmanuel Vadot slaves: slaves-bus@3e000000 { 59*b2d2a78aSEmmanuel Vadot compatible = "simple-bus"; 60*b2d2a78aSEmmanuel Vadot ranges = <0 0x3e000000 0x0001c070>; 61*b2d2a78aSEmmanuel Vadot #address-cells = <1>; 62*b2d2a78aSEmmanuel Vadot #size-cells = <1>; 63*b2d2a78aSEmmanuel Vadot 64*b2d2a78aSEmmanuel Vadot uartb: serial@0 { 65*b2d2a78aSEmmanuel Vadot compatible = "snps,dw-apb-uart"; 66*b2d2a78aSEmmanuel Vadot reg = <0x00000000 0x118>; 67*b2d2a78aSEmmanuel Vadot clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>; 68*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 69*b2d2a78aSEmmanuel Vadot reg-shift = <2>; 70*b2d2a78aSEmmanuel Vadot reg-io-width = <4>; 71*b2d2a78aSEmmanuel Vadot status = "disabled"; 72*b2d2a78aSEmmanuel Vadot }; 73*b2d2a78aSEmmanuel Vadot 74*b2d2a78aSEmmanuel Vadot uartb2: serial@1000 { 75*b2d2a78aSEmmanuel Vadot compatible = "snps,dw-apb-uart"; 76*b2d2a78aSEmmanuel Vadot reg = <0x00001000 0x118>; 77*b2d2a78aSEmmanuel Vadot clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>; 78*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 79*b2d2a78aSEmmanuel Vadot reg-shift = <2>; 80*b2d2a78aSEmmanuel Vadot reg-io-width = <4>; 81*b2d2a78aSEmmanuel Vadot status = "disabled"; 82*b2d2a78aSEmmanuel Vadot }; 83*b2d2a78aSEmmanuel Vadot 84*b2d2a78aSEmmanuel Vadot uartb3: serial@2000 { 85*b2d2a78aSEmmanuel Vadot compatible = "snps,dw-apb-uart"; 86*b2d2a78aSEmmanuel Vadot reg = <0x00002000 0x118>; 87*b2d2a78aSEmmanuel Vadot clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>; 88*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 89*b2d2a78aSEmmanuel Vadot reg-shift = <2>; 90*b2d2a78aSEmmanuel Vadot reg-io-width = <4>; 91*b2d2a78aSEmmanuel Vadot status = "disabled"; 92*b2d2a78aSEmmanuel Vadot }; 93*b2d2a78aSEmmanuel Vadot 94*b2d2a78aSEmmanuel Vadot bsc1: i2c@16000 { 95*b2d2a78aSEmmanuel Vadot /* Compatible filled by SoC DTSI */ 96*b2d2a78aSEmmanuel Vadot reg = <0x00016000 0x70>; 97*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 98*b2d2a78aSEmmanuel Vadot #address-cells = <1>; 99*b2d2a78aSEmmanuel Vadot #size-cells = <0>; 100*b2d2a78aSEmmanuel Vadot clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>; 101*b2d2a78aSEmmanuel Vadot status = "disabled"; 102*b2d2a78aSEmmanuel Vadot }; 103*b2d2a78aSEmmanuel Vadot 104*b2d2a78aSEmmanuel Vadot bsc2: i2c@17000 { 105*b2d2a78aSEmmanuel Vadot /* Compatible filled by SoC DTSI */ 106*b2d2a78aSEmmanuel Vadot reg = <0x00017000 0x70>; 107*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 108*b2d2a78aSEmmanuel Vadot #address-cells = <1>; 109*b2d2a78aSEmmanuel Vadot #size-cells = <0>; 110*b2d2a78aSEmmanuel Vadot clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>; 111*b2d2a78aSEmmanuel Vadot status = "disabled"; 112*b2d2a78aSEmmanuel Vadot }; 113*b2d2a78aSEmmanuel Vadot 114*b2d2a78aSEmmanuel Vadot bsc3: i2c@18000 { 115*b2d2a78aSEmmanuel Vadot /* Compatible filled by SoC DTSI */ 116*b2d2a78aSEmmanuel Vadot reg = <0x00018000 0x70>; 117*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 118*b2d2a78aSEmmanuel Vadot #address-cells = <1>; 119*b2d2a78aSEmmanuel Vadot #size-cells = <0>; 120*b2d2a78aSEmmanuel Vadot clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>; 121*b2d2a78aSEmmanuel Vadot status = "disabled"; 122*b2d2a78aSEmmanuel Vadot }; 123*b2d2a78aSEmmanuel Vadot 124*b2d2a78aSEmmanuel Vadot bsc4: i2c@1c000 { 125*b2d2a78aSEmmanuel Vadot /* Compatible filled by SoC DTSI */ 126*b2d2a78aSEmmanuel Vadot reg = <0x0001c000 0x70>; 127*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; 128*b2d2a78aSEmmanuel Vadot #address-cells = <1>; 129*b2d2a78aSEmmanuel Vadot #size-cells = <0>; 130*b2d2a78aSEmmanuel Vadot clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>; 131*b2d2a78aSEmmanuel Vadot status = "disabled"; 132*b2d2a78aSEmmanuel Vadot }; 133*b2d2a78aSEmmanuel Vadot }; 134*b2d2a78aSEmmanuel Vadot 135*b2d2a78aSEmmanuel Vadot /* Apps bus */ 136*b2d2a78aSEmmanuel Vadot apps: apps-bus@3e300000 { 137*b2d2a78aSEmmanuel Vadot compatible = "simple-bus"; 138*b2d2a78aSEmmanuel Vadot ranges = <0 0x3e300000 0x01c02000>; 139*b2d2a78aSEmmanuel Vadot #address-cells = <1>; 140*b2d2a78aSEmmanuel Vadot #size-cells = <1>; 141*b2d2a78aSEmmanuel Vadot 142*b2d2a78aSEmmanuel Vadot usbotg: usb@e20000 { 143*b2d2a78aSEmmanuel Vadot compatible = "snps,dwc2"; 144*b2d2a78aSEmmanuel Vadot reg = <0x00e20000 0x10000>; 145*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 146*b2d2a78aSEmmanuel Vadot clocks = <&usb_otg_ahb_clk>; 147*b2d2a78aSEmmanuel Vadot clock-names = "otg"; 148*b2d2a78aSEmmanuel Vadot phys = <&usbphy>; 149*b2d2a78aSEmmanuel Vadot phy-names = "usb2-phy"; 150*b2d2a78aSEmmanuel Vadot status = "disabled"; 151*b2d2a78aSEmmanuel Vadot }; 152*b2d2a78aSEmmanuel Vadot 153*b2d2a78aSEmmanuel Vadot usbphy: usb-phy@e30000 { 154*b2d2a78aSEmmanuel Vadot compatible = "brcm,kona-usb2-phy"; 155*b2d2a78aSEmmanuel Vadot reg = <0x00e30000 0x28>; 156*b2d2a78aSEmmanuel Vadot #phy-cells = <0>; 157*b2d2a78aSEmmanuel Vadot status = "disabled"; 158*b2d2a78aSEmmanuel Vadot }; 159*b2d2a78aSEmmanuel Vadot 160*b2d2a78aSEmmanuel Vadot sdio1: mmc@e80000 { 161*b2d2a78aSEmmanuel Vadot compatible = "brcm,kona-sdhci"; 162*b2d2a78aSEmmanuel Vadot reg = <0x00e80000 0x801c>; 163*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 164*b2d2a78aSEmmanuel Vadot clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>; 165*b2d2a78aSEmmanuel Vadot status = "disabled"; 166*b2d2a78aSEmmanuel Vadot }; 167*b2d2a78aSEmmanuel Vadot 168*b2d2a78aSEmmanuel Vadot sdio2: mmc@e90000 { 169*b2d2a78aSEmmanuel Vadot compatible = "brcm,kona-sdhci"; 170*b2d2a78aSEmmanuel Vadot reg = <0x00e90000 0x801c>; 171*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 172*b2d2a78aSEmmanuel Vadot clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>; 173*b2d2a78aSEmmanuel Vadot status = "disabled"; 174*b2d2a78aSEmmanuel Vadot }; 175*b2d2a78aSEmmanuel Vadot 176*b2d2a78aSEmmanuel Vadot sdio3: mmc@ea0000 { 177*b2d2a78aSEmmanuel Vadot compatible = "brcm,kona-sdhci"; 178*b2d2a78aSEmmanuel Vadot reg = <0x00ea0000 0x801c>; 179*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 180*b2d2a78aSEmmanuel Vadot clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>; 181*b2d2a78aSEmmanuel Vadot status = "disabled"; 182*b2d2a78aSEmmanuel Vadot }; 183*b2d2a78aSEmmanuel Vadot 184*b2d2a78aSEmmanuel Vadot sdio4: mmc@eb0000 { 185*b2d2a78aSEmmanuel Vadot compatible = "brcm,kona-sdhci"; 186*b2d2a78aSEmmanuel Vadot reg = <0x00eb0000 0x801c>; 187*b2d2a78aSEmmanuel Vadot interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 188*b2d2a78aSEmmanuel Vadot clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>; 189*b2d2a78aSEmmanuel Vadot status = "disabled"; 190*b2d2a78aSEmmanuel Vadot }; 191*b2d2a78aSEmmanuel Vadot }; 192*b2d2a78aSEmmanuel Vadot 193*b2d2a78aSEmmanuel Vadot clocks { 194*b2d2a78aSEmmanuel Vadot #address-cells = <1>; 195*b2d2a78aSEmmanuel Vadot #size-cells = <1>; 196*b2d2a78aSEmmanuel Vadot ranges; 197*b2d2a78aSEmmanuel Vadot 198*b2d2a78aSEmmanuel Vadot /* 199*b2d2a78aSEmmanuel Vadot * Fixed clocks are defined before CCUs whose 200*b2d2a78aSEmmanuel Vadot * clocks may depend on them. 201*b2d2a78aSEmmanuel Vadot */ 202*b2d2a78aSEmmanuel Vadot 203*b2d2a78aSEmmanuel Vadot ref_32k_clk: ref_32k { 204*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 205*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 206*b2d2a78aSEmmanuel Vadot clock-frequency = <32768>; 207*b2d2a78aSEmmanuel Vadot }; 208*b2d2a78aSEmmanuel Vadot 209*b2d2a78aSEmmanuel Vadot bbl_32k_clk: bbl_32k { 210*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 211*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 212*b2d2a78aSEmmanuel Vadot clock-frequency = <32768>; 213*b2d2a78aSEmmanuel Vadot }; 214*b2d2a78aSEmmanuel Vadot 215*b2d2a78aSEmmanuel Vadot ref_13m_clk: ref_13m { 216*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 217*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 218*b2d2a78aSEmmanuel Vadot clock-frequency = <13000000>; 219*b2d2a78aSEmmanuel Vadot }; 220*b2d2a78aSEmmanuel Vadot 221*b2d2a78aSEmmanuel Vadot var_13m_clk: var_13m { 222*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 223*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 224*b2d2a78aSEmmanuel Vadot clock-frequency = <13000000>; 225*b2d2a78aSEmmanuel Vadot }; 226*b2d2a78aSEmmanuel Vadot 227*b2d2a78aSEmmanuel Vadot dft_19_5m_clk: dft_19_5m { 228*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 229*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 230*b2d2a78aSEmmanuel Vadot clock-frequency = <19500000>; 231*b2d2a78aSEmmanuel Vadot }; 232*b2d2a78aSEmmanuel Vadot 233*b2d2a78aSEmmanuel Vadot ref_crystal_clk: ref_crystal { 234*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 235*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 236*b2d2a78aSEmmanuel Vadot clock-frequency = <26000000>; 237*b2d2a78aSEmmanuel Vadot }; 238*b2d2a78aSEmmanuel Vadot 239*b2d2a78aSEmmanuel Vadot ref_52m_clk: ref_52m { 240*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 241*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 242*b2d2a78aSEmmanuel Vadot clock-frequency = <52000000>; 243*b2d2a78aSEmmanuel Vadot }; 244*b2d2a78aSEmmanuel Vadot 245*b2d2a78aSEmmanuel Vadot var_52m_clk: var_52m { 246*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 247*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 248*b2d2a78aSEmmanuel Vadot clock-frequency = <52000000>; 249*b2d2a78aSEmmanuel Vadot }; 250*b2d2a78aSEmmanuel Vadot 251*b2d2a78aSEmmanuel Vadot usb_otg_ahb_clk: usb_otg_ahb { 252*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 253*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 254*b2d2a78aSEmmanuel Vadot clock-frequency = <52000000>; 255*b2d2a78aSEmmanuel Vadot }; 256*b2d2a78aSEmmanuel Vadot 257*b2d2a78aSEmmanuel Vadot ref_96m_clk: ref_96m { 258*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 259*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 260*b2d2a78aSEmmanuel Vadot clock-frequency = <96000000>; 261*b2d2a78aSEmmanuel Vadot }; 262*b2d2a78aSEmmanuel Vadot 263*b2d2a78aSEmmanuel Vadot var_96m_clk: var_96m { 264*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 265*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 266*b2d2a78aSEmmanuel Vadot clock-frequency = <96000000>; 267*b2d2a78aSEmmanuel Vadot }; 268*b2d2a78aSEmmanuel Vadot 269*b2d2a78aSEmmanuel Vadot ref_104m_clk: ref_104m { 270*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 271*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 272*b2d2a78aSEmmanuel Vadot clock-frequency = <104000000>; 273*b2d2a78aSEmmanuel Vadot }; 274*b2d2a78aSEmmanuel Vadot 275*b2d2a78aSEmmanuel Vadot var_104m_clk: var_104m { 276*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 277*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 278*b2d2a78aSEmmanuel Vadot clock-frequency = <104000000>; 279*b2d2a78aSEmmanuel Vadot }; 280*b2d2a78aSEmmanuel Vadot 281*b2d2a78aSEmmanuel Vadot ref_156m_clk: ref_156m { 282*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 283*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 284*b2d2a78aSEmmanuel Vadot clock-frequency = <156000000>; 285*b2d2a78aSEmmanuel Vadot }; 286*b2d2a78aSEmmanuel Vadot 287*b2d2a78aSEmmanuel Vadot var_156m_clk: var_156m { 288*b2d2a78aSEmmanuel Vadot #clock-cells = <0>; 289*b2d2a78aSEmmanuel Vadot compatible = "fixed-clock"; 290*b2d2a78aSEmmanuel Vadot clock-frequency = <156000000>; 291*b2d2a78aSEmmanuel Vadot }; 292*b2d2a78aSEmmanuel Vadot 293*b2d2a78aSEmmanuel Vadot root_ccu: root_ccu@35001000 { 294*b2d2a78aSEmmanuel Vadot compatible = "brcm,bcm21664-root-ccu"; 295*b2d2a78aSEmmanuel Vadot reg = <0x35001000 0x0f00>; 296*b2d2a78aSEmmanuel Vadot #clock-cells = <1>; 297*b2d2a78aSEmmanuel Vadot clock-output-names = "frac_1m"; 298*b2d2a78aSEmmanuel Vadot }; 299*b2d2a78aSEmmanuel Vadot 300*b2d2a78aSEmmanuel Vadot aon_ccu: aon_ccu@35002000 { 301*b2d2a78aSEmmanuel Vadot compatible = "brcm,bcm21664-aon-ccu"; 302*b2d2a78aSEmmanuel Vadot reg = <0x35002000 0x0f00>; 303*b2d2a78aSEmmanuel Vadot #clock-cells = <1>; 304*b2d2a78aSEmmanuel Vadot clock-output-names = "hub_timer"; 305*b2d2a78aSEmmanuel Vadot }; 306*b2d2a78aSEmmanuel Vadot 307*b2d2a78aSEmmanuel Vadot slave_ccu: slave_ccu@3e011000 { 308*b2d2a78aSEmmanuel Vadot compatible = "brcm,bcm21664-slave-ccu"; 309*b2d2a78aSEmmanuel Vadot reg = <0x3e011000 0x0f00>; 310*b2d2a78aSEmmanuel Vadot #clock-cells = <1>; 311*b2d2a78aSEmmanuel Vadot clock-output-names = "uartb", 312*b2d2a78aSEmmanuel Vadot "uartb2", 313*b2d2a78aSEmmanuel Vadot "uartb3", 314*b2d2a78aSEmmanuel Vadot "bsc1", 315*b2d2a78aSEmmanuel Vadot "bsc2", 316*b2d2a78aSEmmanuel Vadot "bsc3", 317*b2d2a78aSEmmanuel Vadot "bsc4"; 318*b2d2a78aSEmmanuel Vadot }; 319*b2d2a78aSEmmanuel Vadot 320*b2d2a78aSEmmanuel Vadot master_ccu: master_ccu@3f001000 { 321*b2d2a78aSEmmanuel Vadot compatible = "brcm,bcm21664-master-ccu"; 322*b2d2a78aSEmmanuel Vadot reg = <0x3f001000 0x0f00>; 323*b2d2a78aSEmmanuel Vadot #clock-cells = <1>; 324*b2d2a78aSEmmanuel Vadot clock-output-names = "sdio1", 325*b2d2a78aSEmmanuel Vadot "sdio2", 326*b2d2a78aSEmmanuel Vadot "sdio3", 327*b2d2a78aSEmmanuel Vadot "sdio4", 328*b2d2a78aSEmmanuel Vadot "sdio1_sleep", 329*b2d2a78aSEmmanuel Vadot "sdio2_sleep", 330*b2d2a78aSEmmanuel Vadot "sdio3_sleep", 331*b2d2a78aSEmmanuel Vadot "sdio4_sleep"; 332*b2d2a78aSEmmanuel Vadot }; 333*b2d2a78aSEmmanuel Vadot }; 334*b2d2a78aSEmmanuel Vadot}; 335