1*833e5d42SEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2*833e5d42SEmmanuel Vadot/dts-v1/; 3*833e5d42SEmmanuel Vadot 4*833e5d42SEmmanuel Vadot#include <dt-bindings/input/gpio-keys.h> 5*833e5d42SEmmanuel Vadot#include <dt-bindings/input/input.h> 6*833e5d42SEmmanuel Vadot#include <dt-bindings/thermal/thermal.h> 7*833e5d42SEmmanuel Vadot 8*833e5d42SEmmanuel Vadot#include "tegra30.dtsi" 9*833e5d42SEmmanuel Vadot#include "tegra30-cpu-opp.dtsi" 10*833e5d42SEmmanuel Vadot#include "tegra30-cpu-opp-microvolt.dtsi" 11*833e5d42SEmmanuel Vadot 12*833e5d42SEmmanuel Vadot/ { 13*833e5d42SEmmanuel Vadot model = "Asus Portable AiO P1801-T"; 14*833e5d42SEmmanuel Vadot compatible = "asus,p1801-t", "nvidia,tegra30"; 15*833e5d42SEmmanuel Vadot chassis-type = "convertible"; 16*833e5d42SEmmanuel Vadot 17*833e5d42SEmmanuel Vadot aliases { 18*833e5d42SEmmanuel Vadot mmc0 = &sdmmc4; /* eMMC */ 19*833e5d42SEmmanuel Vadot mmc1 = &sdmmc1; /* uSD slot */ 20*833e5d42SEmmanuel Vadot mmc2 = &sdmmc3; /* WiFi */ 21*833e5d42SEmmanuel Vadot 22*833e5d42SEmmanuel Vadot rtc0 = &pmic; 23*833e5d42SEmmanuel Vadot rtc1 = "/rtc@7000e000"; 24*833e5d42SEmmanuel Vadot 25*833e5d42SEmmanuel Vadot display0 = &hdmi; 26*833e5d42SEmmanuel Vadot 27*833e5d42SEmmanuel Vadot serial1 = &uartc; /* Bluetooth */ 28*833e5d42SEmmanuel Vadot serial2 = &uartb; /* GPS */ 29*833e5d42SEmmanuel Vadot }; 30*833e5d42SEmmanuel Vadot 31*833e5d42SEmmanuel Vadot /* 32*833e5d42SEmmanuel Vadot * The decompressor and also some bootloaders rely on a 33*833e5d42SEmmanuel Vadot * pre-existing /chosen node to be available to insert the 34*833e5d42SEmmanuel Vadot * command line and merge other ATAGS info. 35*833e5d42SEmmanuel Vadot */ 36*833e5d42SEmmanuel Vadot chosen {}; 37*833e5d42SEmmanuel Vadot 38*833e5d42SEmmanuel Vadot firmware { 39*833e5d42SEmmanuel Vadot trusted-foundations { 40*833e5d42SEmmanuel Vadot compatible = "tlm,trusted-foundations"; 41*833e5d42SEmmanuel Vadot tlm,version-major = <2>; 42*833e5d42SEmmanuel Vadot tlm,version-minor = <8>; 43*833e5d42SEmmanuel Vadot }; 44*833e5d42SEmmanuel Vadot }; 45*833e5d42SEmmanuel Vadot 46*833e5d42SEmmanuel Vadot memory@80000000 { 47*833e5d42SEmmanuel Vadot reg = <0x80000000 0x80000000>; 48*833e5d42SEmmanuel Vadot }; 49*833e5d42SEmmanuel Vadot 50*833e5d42SEmmanuel Vadot reserved-memory { 51*833e5d42SEmmanuel Vadot #address-cells = <1>; 52*833e5d42SEmmanuel Vadot #size-cells = <1>; 53*833e5d42SEmmanuel Vadot ranges; 54*833e5d42SEmmanuel Vadot 55*833e5d42SEmmanuel Vadot linux,cma@80000000 { 56*833e5d42SEmmanuel Vadot compatible = "shared-dma-pool"; 57*833e5d42SEmmanuel Vadot alloc-ranges = <0x80000000 0x30000000>; 58*833e5d42SEmmanuel Vadot size = <0x10000000>; /* 256MiB */ 59*833e5d42SEmmanuel Vadot linux,cma-default; 60*833e5d42SEmmanuel Vadot reusable; 61*833e5d42SEmmanuel Vadot }; 62*833e5d42SEmmanuel Vadot 63*833e5d42SEmmanuel Vadot framebuffer@abe01000 { 64*833e5d42SEmmanuel Vadot reg = <0xabe01000 (1920 * 1080 * 4)>; 65*833e5d42SEmmanuel Vadot no-map; 66*833e5d42SEmmanuel Vadot }; 67*833e5d42SEmmanuel Vadot 68*833e5d42SEmmanuel Vadot trustzone@bfe00000 { 69*833e5d42SEmmanuel Vadot reg = <0xbfe00000 0x200000>; /* 2MB */ 70*833e5d42SEmmanuel Vadot no-map; 71*833e5d42SEmmanuel Vadot }; 72*833e5d42SEmmanuel Vadot 73*833e5d42SEmmanuel Vadot ramoops@fea00000 { 74*833e5d42SEmmanuel Vadot compatible = "ramoops"; 75*833e5d42SEmmanuel Vadot reg = <0xfea00000 0x10000>; /* 64kB */ 76*833e5d42SEmmanuel Vadot console-size = <0x8000>; /* 32kB */ 77*833e5d42SEmmanuel Vadot record-size = <0x400>; /* 1kB */ 78*833e5d42SEmmanuel Vadot ecc-size = <16>; 79*833e5d42SEmmanuel Vadot }; 80*833e5d42SEmmanuel Vadot }; 81*833e5d42SEmmanuel Vadot 82*833e5d42SEmmanuel Vadot host1x@50000000 { 83*833e5d42SEmmanuel Vadot hdmi: hdmi@54280000 { 84*833e5d42SEmmanuel Vadot status = "okay"; 85*833e5d42SEmmanuel Vadot 86*833e5d42SEmmanuel Vadot hdmi-supply = <&hdmi_5v0_sys>; 87*833e5d42SEmmanuel Vadot pll-supply = <&vdd_1v8_vio>; 88*833e5d42SEmmanuel Vadot vdd-supply = <&vdd_3v3_sys>; 89*833e5d42SEmmanuel Vadot 90*833e5d42SEmmanuel Vadot port { 91*833e5d42SEmmanuel Vadot hdmi_out: endpoint { 92*833e5d42SEmmanuel Vadot remote-endpoint = <&bridge_in>; 93*833e5d42SEmmanuel Vadot }; 94*833e5d42SEmmanuel Vadot }; 95*833e5d42SEmmanuel Vadot }; 96*833e5d42SEmmanuel Vadot }; 97*833e5d42SEmmanuel Vadot 98*833e5d42SEmmanuel Vadot gpio@6000d000 { 99*833e5d42SEmmanuel Vadot init-lpm-in-hog { 100*833e5d42SEmmanuel Vadot gpio-hog; 101*833e5d42SEmmanuel Vadot gpios = <TEGRA_GPIO(B, 1) GPIO_ACTIVE_HIGH>; 102*833e5d42SEmmanuel Vadot input; 103*833e5d42SEmmanuel Vadot }; 104*833e5d42SEmmanuel Vadot 105*833e5d42SEmmanuel Vadot init-lpm-out-hog { 106*833e5d42SEmmanuel Vadot gpio-hog; 107*833e5d42SEmmanuel Vadot gpios = <TEGRA_GPIO(K, 7) GPIO_ACTIVE_HIGH>, 108*833e5d42SEmmanuel Vadot <TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; 109*833e5d42SEmmanuel Vadot output-low; 110*833e5d42SEmmanuel Vadot }; 111*833e5d42SEmmanuel Vadot 112*833e5d42SEmmanuel Vadot tp-vendor-hog { 113*833e5d42SEmmanuel Vadot gpio-hog; 114*833e5d42SEmmanuel Vadot gpios = <TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>; 115*833e5d42SEmmanuel Vadot input; 116*833e5d42SEmmanuel Vadot }; 117*833e5d42SEmmanuel Vadot }; 118*833e5d42SEmmanuel Vadot 119*833e5d42SEmmanuel Vadot vde@6001a000 { 120*833e5d42SEmmanuel Vadot assigned-clocks = <&tegra_car TEGRA30_CLK_VDE>; 121*833e5d42SEmmanuel Vadot assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_P>; 122*833e5d42SEmmanuel Vadot assigned-clock-rates = <408000000>; 123*833e5d42SEmmanuel Vadot }; 124*833e5d42SEmmanuel Vadot 125*833e5d42SEmmanuel Vadot pinmux@70000868 { 126*833e5d42SEmmanuel Vadot pinctrl-names = "default"; 127*833e5d42SEmmanuel Vadot pinctrl-0 = <&state_default>; 128*833e5d42SEmmanuel Vadot 129*833e5d42SEmmanuel Vadot state_default: pinmux { 130*833e5d42SEmmanuel Vadot /* SDMMC1 pinmux */ 131*833e5d42SEmmanuel Vadot sdmmc1-clk { 132*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc1_clk_pz0"; 133*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc1"; 134*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 135*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 136*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 137*833e5d42SEmmanuel Vadot }; 138*833e5d42SEmmanuel Vadot sdmmc1-cmd { 139*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc1_dat3_py4", 140*833e5d42SEmmanuel Vadot "sdmmc1_dat2_py5", 141*833e5d42SEmmanuel Vadot "sdmmc1_dat1_py6", 142*833e5d42SEmmanuel Vadot "sdmmc1_dat0_py7", 143*833e5d42SEmmanuel Vadot "sdmmc1_cmd_pz1"; 144*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc1"; 145*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 146*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 147*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 148*833e5d42SEmmanuel Vadot }; 149*833e5d42SEmmanuel Vadot sdmmc1-cd { 150*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_iordy_pi5"; 151*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 152*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 153*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 154*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 155*833e5d42SEmmanuel Vadot }; 156*833e5d42SEmmanuel Vadot sdmmc1-wp { 157*833e5d42SEmmanuel Vadot nvidia,pins = "vi_d11_pt3"; 158*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 159*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 160*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 161*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 162*833e5d42SEmmanuel Vadot }; 163*833e5d42SEmmanuel Vadot 164*833e5d42SEmmanuel Vadot /* SDMMC2 pinmux */ 165*833e5d42SEmmanuel Vadot vi-d1-pd5 { 166*833e5d42SEmmanuel Vadot nvidia,pins = "vi_d1_pd5", 167*833e5d42SEmmanuel Vadot "vi_d2_pl0", 168*833e5d42SEmmanuel Vadot "vi_d3_pl1", 169*833e5d42SEmmanuel Vadot "vi_d5_pl3", 170*833e5d42SEmmanuel Vadot "vi_d7_pl5"; 171*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc2"; 172*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 173*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 174*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 175*833e5d42SEmmanuel Vadot }; 176*833e5d42SEmmanuel Vadot vi-d8-pl6 { 177*833e5d42SEmmanuel Vadot nvidia,pins = "vi_d8_pl6", 178*833e5d42SEmmanuel Vadot "vi_d9_pl7"; 179*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc2"; 180*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 181*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 182*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 183*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 184*833e5d42SEmmanuel Vadot nvidia,io-reset = <0>; 185*833e5d42SEmmanuel Vadot }; 186*833e5d42SEmmanuel Vadot 187*833e5d42SEmmanuel Vadot /* SDMMC3 pinmux */ 188*833e5d42SEmmanuel Vadot sdmmc3-clk { 189*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc3_clk_pa6"; 190*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc3"; 191*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 192*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 193*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 194*833e5d42SEmmanuel Vadot }; 195*833e5d42SEmmanuel Vadot sdmmc3-cmd { 196*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc3_cmd_pa7", 197*833e5d42SEmmanuel Vadot "sdmmc3_dat0_pb7", 198*833e5d42SEmmanuel Vadot "sdmmc3_dat1_pb6", 199*833e5d42SEmmanuel Vadot "sdmmc3_dat2_pb5", 200*833e5d42SEmmanuel Vadot "sdmmc3_dat3_pb4", 201*833e5d42SEmmanuel Vadot "sdmmc3_dat4_pd1", 202*833e5d42SEmmanuel Vadot "sdmmc3_dat5_pd0", 203*833e5d42SEmmanuel Vadot "sdmmc3_dat6_pd3", 204*833e5d42SEmmanuel Vadot "sdmmc3_dat7_pd4"; 205*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc3"; 206*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 207*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 208*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 209*833e5d42SEmmanuel Vadot }; 210*833e5d42SEmmanuel Vadot 211*833e5d42SEmmanuel Vadot /* SDMMC4 pinmux */ 212*833e5d42SEmmanuel Vadot sdmmc4-clk { 213*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc4_clk_pcc4"; 214*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc4"; 215*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 216*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 217*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 218*833e5d42SEmmanuel Vadot }; 219*833e5d42SEmmanuel Vadot sdmmc4-cmd { 220*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc4_cmd_pt7", 221*833e5d42SEmmanuel Vadot "sdmmc4_dat0_paa0", 222*833e5d42SEmmanuel Vadot "sdmmc4_dat1_paa1", 223*833e5d42SEmmanuel Vadot "sdmmc4_dat2_paa2", 224*833e5d42SEmmanuel Vadot "sdmmc4_dat3_paa3", 225*833e5d42SEmmanuel Vadot "sdmmc4_dat4_paa4", 226*833e5d42SEmmanuel Vadot "sdmmc4_dat5_paa5", 227*833e5d42SEmmanuel Vadot "sdmmc4_dat6_paa6", 228*833e5d42SEmmanuel Vadot "sdmmc4_dat7_paa7"; 229*833e5d42SEmmanuel Vadot nvidia,function = "sdmmc4"; 230*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 231*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 232*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 233*833e5d42SEmmanuel Vadot }; 234*833e5d42SEmmanuel Vadot sdmmc4-rst-n { 235*833e5d42SEmmanuel Vadot nvidia,pins = "sdmmc4_rst_n_pcc3"; 236*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 237*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 238*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 239*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 240*833e5d42SEmmanuel Vadot }; 241*833e5d42SEmmanuel Vadot cam-mclk { 242*833e5d42SEmmanuel Vadot nvidia,pins = "cam_mclk_pcc0"; 243*833e5d42SEmmanuel Vadot nvidia,function = "vi_alt3"; 244*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 245*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 246*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 247*833e5d42SEmmanuel Vadot }; 248*833e5d42SEmmanuel Vadot drive-sdmmc4 { 249*833e5d42SEmmanuel Vadot nvidia,pins = "drive_gma", 250*833e5d42SEmmanuel Vadot "drive_gmb", 251*833e5d42SEmmanuel Vadot "drive_gmc", 252*833e5d42SEmmanuel Vadot "drive_gmd"; 253*833e5d42SEmmanuel Vadot nvidia,pull-down-strength = <9>; 254*833e5d42SEmmanuel Vadot nvidia,pull-up-strength = <9>; 255*833e5d42SEmmanuel Vadot nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>; 256*833e5d42SEmmanuel Vadot nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>; 257*833e5d42SEmmanuel Vadot }; 258*833e5d42SEmmanuel Vadot 259*833e5d42SEmmanuel Vadot /* I2C pinmux */ 260*833e5d42SEmmanuel Vadot gen1-i2c { 261*833e5d42SEmmanuel Vadot nvidia,pins = "gen1_i2c_scl_pc4", 262*833e5d42SEmmanuel Vadot "gen1_i2c_sda_pc5"; 263*833e5d42SEmmanuel Vadot nvidia,function = "i2c1"; 264*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 265*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 266*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 267*833e5d42SEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_ENABLE>; 268*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 269*833e5d42SEmmanuel Vadot }; 270*833e5d42SEmmanuel Vadot gen2-i2c { 271*833e5d42SEmmanuel Vadot nvidia,pins = "gen2_i2c_scl_pt5", 272*833e5d42SEmmanuel Vadot "gen2_i2c_sda_pt6"; 273*833e5d42SEmmanuel Vadot nvidia,function = "i2c2"; 274*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 275*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 276*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 277*833e5d42SEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_ENABLE>; 278*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 279*833e5d42SEmmanuel Vadot }; 280*833e5d42SEmmanuel Vadot cam-i2c { 281*833e5d42SEmmanuel Vadot nvidia,pins = "cam_i2c_scl_pbb1", 282*833e5d42SEmmanuel Vadot "cam_i2c_sda_pbb2"; 283*833e5d42SEmmanuel Vadot nvidia,function = "i2c3"; 284*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 285*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 286*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 287*833e5d42SEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_ENABLE>; 288*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 289*833e5d42SEmmanuel Vadot }; 290*833e5d42SEmmanuel Vadot ddc-i2c { 291*833e5d42SEmmanuel Vadot nvidia,pins = "ddc_scl_pv4", 292*833e5d42SEmmanuel Vadot "ddc_sda_pv5"; 293*833e5d42SEmmanuel Vadot nvidia,function = "i2c4"; 294*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 295*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 296*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 297*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 298*833e5d42SEmmanuel Vadot }; 299*833e5d42SEmmanuel Vadot pwr-i2c { 300*833e5d42SEmmanuel Vadot nvidia,pins = "pwr_i2c_scl_pz6", 301*833e5d42SEmmanuel Vadot "pwr_i2c_sda_pz7"; 302*833e5d42SEmmanuel Vadot nvidia,function = "i2cpwr"; 303*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 304*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 305*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 306*833e5d42SEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_ENABLE>; 307*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 308*833e5d42SEmmanuel Vadot }; 309*833e5d42SEmmanuel Vadot hotplug-i2c { 310*833e5d42SEmmanuel Vadot nvidia,pins = "pu4"; 311*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 312*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 313*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 314*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 315*833e5d42SEmmanuel Vadot }; 316*833e5d42SEmmanuel Vadot 317*833e5d42SEmmanuel Vadot /* HDMI pinmux */ 318*833e5d42SEmmanuel Vadot hdmi-cec { 319*833e5d42SEmmanuel Vadot nvidia,pins = "hdmi_cec_pee3"; 320*833e5d42SEmmanuel Vadot nvidia,function = "cec"; 321*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 322*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 323*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 324*833e5d42SEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_ENABLE>; 325*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 326*833e5d42SEmmanuel Vadot }; 327*833e5d42SEmmanuel Vadot hdmi-hpd { 328*833e5d42SEmmanuel Vadot nvidia,pins = "hdmi_int_pn7"; 329*833e5d42SEmmanuel Vadot nvidia,function = "hdmi"; 330*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 331*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 332*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 333*833e5d42SEmmanuel Vadot }; 334*833e5d42SEmmanuel Vadot 335*833e5d42SEmmanuel Vadot /* UART-A */ 336*833e5d42SEmmanuel Vadot ulpi-data0-po1 { 337*833e5d42SEmmanuel Vadot nvidia,pins = "ulpi_data0_po1"; 338*833e5d42SEmmanuel Vadot nvidia,function = "uarta"; 339*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 340*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 341*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 342*833e5d42SEmmanuel Vadot }; 343*833e5d42SEmmanuel Vadot ulpi-data1-po2 { 344*833e5d42SEmmanuel Vadot nvidia,pins = "ulpi_data1_po2"; 345*833e5d42SEmmanuel Vadot nvidia,function = "uarta"; 346*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 347*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 348*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 349*833e5d42SEmmanuel Vadot }; 350*833e5d42SEmmanuel Vadot ulpi-data5-po6 { 351*833e5d42SEmmanuel Vadot nvidia,pins = "ulpi_data5_po6"; 352*833e5d42SEmmanuel Vadot nvidia,function = "uarta"; 353*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 354*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 355*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 356*833e5d42SEmmanuel Vadot }; 357*833e5d42SEmmanuel Vadot ulpi-data7-po0 { 358*833e5d42SEmmanuel Vadot nvidia,pins = "ulpi_data7_po0", 359*833e5d42SEmmanuel Vadot "ulpi_data2_po3", 360*833e5d42SEmmanuel Vadot "ulpi_data3_po4", 361*833e5d42SEmmanuel Vadot "ulpi_data4_po5", 362*833e5d42SEmmanuel Vadot "ulpi_data6_po7"; 363*833e5d42SEmmanuel Vadot nvidia,function = "uarta"; 364*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 365*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 366*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 367*833e5d42SEmmanuel Vadot }; 368*833e5d42SEmmanuel Vadot 369*833e5d42SEmmanuel Vadot /* UART-B */ 370*833e5d42SEmmanuel Vadot uartb-txd-rts { 371*833e5d42SEmmanuel Vadot nvidia,pins = "uart2_txd_pc2", 372*833e5d42SEmmanuel Vadot "uart2_rts_n_pj6"; 373*833e5d42SEmmanuel Vadot nvidia,function = "uartb"; 374*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 375*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 376*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 377*833e5d42SEmmanuel Vadot }; 378*833e5d42SEmmanuel Vadot uartb-rxd-cts { 379*833e5d42SEmmanuel Vadot nvidia,pins = "uart2_rxd_pc3", 380*833e5d42SEmmanuel Vadot "uart2_cts_n_pj5"; 381*833e5d42SEmmanuel Vadot nvidia,function = "uartb"; 382*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 383*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 384*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 385*833e5d42SEmmanuel Vadot }; 386*833e5d42SEmmanuel Vadot 387*833e5d42SEmmanuel Vadot /* UART-C */ 388*833e5d42SEmmanuel Vadot uartc-rxd-cts { 389*833e5d42SEmmanuel Vadot nvidia,pins = "uart3_cts_n_pa1", 390*833e5d42SEmmanuel Vadot "uart3_rxd_pw7"; 391*833e5d42SEmmanuel Vadot nvidia,function = "uartc"; 392*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 393*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 394*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 395*833e5d42SEmmanuel Vadot }; 396*833e5d42SEmmanuel Vadot uartc-txd-rts { 397*833e5d42SEmmanuel Vadot nvidia,pins = "uart3_rts_n_pc0", 398*833e5d42SEmmanuel Vadot "uart3_txd_pw6"; 399*833e5d42SEmmanuel Vadot nvidia,function = "uartc"; 400*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 401*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 402*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 403*833e5d42SEmmanuel Vadot }; 404*833e5d42SEmmanuel Vadot 405*833e5d42SEmmanuel Vadot /* UART-D */ 406*833e5d42SEmmanuel Vadot ulpi-nxt-py2 { 407*833e5d42SEmmanuel Vadot nvidia,pins = "ulpi_nxt_py2"; 408*833e5d42SEmmanuel Vadot nvidia,function = "uartd"; 409*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 410*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 411*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 412*833e5d42SEmmanuel Vadot }; 413*833e5d42SEmmanuel Vadot ulpi-clk-py0 { 414*833e5d42SEmmanuel Vadot nvidia,pins = "ulpi_clk_py0", 415*833e5d42SEmmanuel Vadot "ulpi_dir_py1", 416*833e5d42SEmmanuel Vadot "ulpi_stp_py3"; 417*833e5d42SEmmanuel Vadot nvidia,function = "uartd"; 418*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 419*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 420*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 421*833e5d42SEmmanuel Vadot }; 422*833e5d42SEmmanuel Vadot 423*833e5d42SEmmanuel Vadot /* I2S pinmux */ 424*833e5d42SEmmanuel Vadot dap-i2s0 { 425*833e5d42SEmmanuel Vadot nvidia,pins = "dap1_fs_pn0", 426*833e5d42SEmmanuel Vadot "dap1_din_pn1", 427*833e5d42SEmmanuel Vadot "dap1_dout_pn2", 428*833e5d42SEmmanuel Vadot "dap1_sclk_pn3"; 429*833e5d42SEmmanuel Vadot nvidia,function = "i2s0"; 430*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 431*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 432*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 433*833e5d42SEmmanuel Vadot }; 434*833e5d42SEmmanuel Vadot dap-i2s1 { 435*833e5d42SEmmanuel Vadot nvidia,pins = "dap2_fs_pa2", 436*833e5d42SEmmanuel Vadot "dap2_sclk_pa3", 437*833e5d42SEmmanuel Vadot "dap2_din_pa4", 438*833e5d42SEmmanuel Vadot "dap2_dout_pa5"; 439*833e5d42SEmmanuel Vadot nvidia,function = "i2s1"; 440*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 441*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 442*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 443*833e5d42SEmmanuel Vadot }; 444*833e5d42SEmmanuel Vadot dap3-fs { 445*833e5d42SEmmanuel Vadot nvidia,pins = "dap3_fs_pp0", 446*833e5d42SEmmanuel Vadot "dap3_din_pp1"; 447*833e5d42SEmmanuel Vadot nvidia,function = "i2s2"; 448*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 449*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 450*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 451*833e5d42SEmmanuel Vadot }; 452*833e5d42SEmmanuel Vadot dap3-dout { 453*833e5d42SEmmanuel Vadot nvidia,pins = "dap3_dout_pp2", 454*833e5d42SEmmanuel Vadot "dap3_sclk_pp3"; 455*833e5d42SEmmanuel Vadot nvidia,function = "i2s2"; 456*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 457*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 458*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 459*833e5d42SEmmanuel Vadot }; 460*833e5d42SEmmanuel Vadot dap-i2s3 { 461*833e5d42SEmmanuel Vadot nvidia,pins = "dap4_fs_pp4", 462*833e5d42SEmmanuel Vadot "dap4_din_pp5", 463*833e5d42SEmmanuel Vadot "dap4_dout_pp6", 464*833e5d42SEmmanuel Vadot "dap4_sclk_pp7"; 465*833e5d42SEmmanuel Vadot nvidia,function = "i2s3"; 466*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 467*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 468*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 469*833e5d42SEmmanuel Vadot }; 470*833e5d42SEmmanuel Vadot 471*833e5d42SEmmanuel Vadot /* sensors pinmux */ 472*833e5d42SEmmanuel Vadot nct-irq { 473*833e5d42SEmmanuel Vadot nvidia,pins = "pcc2"; 474*833e5d42SEmmanuel Vadot nvidia,function = "i2s4"; 475*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 476*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 477*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 478*833e5d42SEmmanuel Vadot }; 479*833e5d42SEmmanuel Vadot 480*833e5d42SEmmanuel Vadot /* Asus EC pinmux */ 481*833e5d42SEmmanuel Vadot ec-irqs { 482*833e5d42SEmmanuel Vadot nvidia,pins = "kb_row10_ps2", 483*833e5d42SEmmanuel Vadot "kb_row15_ps7"; 484*833e5d42SEmmanuel Vadot nvidia,function = "kbc"; 485*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 486*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 487*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 488*833e5d42SEmmanuel Vadot }; 489*833e5d42SEmmanuel Vadot ec-reqs { 490*833e5d42SEmmanuel Vadot nvidia,pins = "kb_col1_pq1"; 491*833e5d42SEmmanuel Vadot nvidia,function = "kbc"; 492*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 493*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 494*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 495*833e5d42SEmmanuel Vadot }; 496*833e5d42SEmmanuel Vadot 497*833e5d42SEmmanuel Vadot /* memory type bootstrap */ 498*833e5d42SEmmanuel Vadot mem-boostraps { 499*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad4_pg4", 500*833e5d42SEmmanuel Vadot "gmi_ad5_pg5"; 501*833e5d42SEmmanuel Vadot nvidia,function = "nand"; 502*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 503*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 504*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 505*833e5d42SEmmanuel Vadot }; 506*833e5d42SEmmanuel Vadot 507*833e5d42SEmmanuel Vadot /* PCI-e pinmux */ 508*833e5d42SEmmanuel Vadot pex-l2-rst-n { 509*833e5d42SEmmanuel Vadot nvidia,pins = "pex_l2_rst_n_pcc6", 510*833e5d42SEmmanuel Vadot "pex_l0_rst_n_pdd1", 511*833e5d42SEmmanuel Vadot "pex_l1_rst_n_pdd5"; 512*833e5d42SEmmanuel Vadot nvidia,function = "pcie"; 513*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 514*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 515*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 516*833e5d42SEmmanuel Vadot }; 517*833e5d42SEmmanuel Vadot pex-l2-clkreq-n { 518*833e5d42SEmmanuel Vadot nvidia,pins = "pex_l2_clkreq_n_pcc7", 519*833e5d42SEmmanuel Vadot "pex_l0_prsnt_n_pdd0", 520*833e5d42SEmmanuel Vadot "pex_l0_clkreq_n_pdd2", 521*833e5d42SEmmanuel Vadot "pex_wake_n_pdd3", 522*833e5d42SEmmanuel Vadot "pex_l1_prsnt_n_pdd4", 523*833e5d42SEmmanuel Vadot "pex_l1_clkreq_n_pdd6", 524*833e5d42SEmmanuel Vadot "pex_l2_prsnt_n_pdd7"; 525*833e5d42SEmmanuel Vadot nvidia,function = "pcie"; 526*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 527*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 528*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 529*833e5d42SEmmanuel Vadot }; 530*833e5d42SEmmanuel Vadot 531*833e5d42SEmmanuel Vadot /* SPI pinmux */ 532*833e5d42SEmmanuel Vadot spi1-mosi-px4 { 533*833e5d42SEmmanuel Vadot nvidia,pins = "spi1_mosi_px4", 534*833e5d42SEmmanuel Vadot "spi1_sck_px5", 535*833e5d42SEmmanuel Vadot "spi1_cs0_n_px6", 536*833e5d42SEmmanuel Vadot "spi1_miso_px7"; 537*833e5d42SEmmanuel Vadot nvidia,function = "spi1"; 538*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 539*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 540*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 541*833e5d42SEmmanuel Vadot }; 542*833e5d42SEmmanuel Vadot spi2-cs1-n-pw2 { 543*833e5d42SEmmanuel Vadot nvidia,pins = "spi2_cs1_n_pw2"; 544*833e5d42SEmmanuel Vadot nvidia,function = "spi2"; 545*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 546*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 547*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 548*833e5d42SEmmanuel Vadot }; 549*833e5d42SEmmanuel Vadot spi2-sck-px2 { 550*833e5d42SEmmanuel Vadot nvidia,pins = "spi2_sck_px2"; 551*833e5d42SEmmanuel Vadot nvidia,function = "spi2"; 552*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 553*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 554*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 555*833e5d42SEmmanuel Vadot }; 556*833e5d42SEmmanuel Vadot gmi-a17-pb0 { 557*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_a17_pb0", 558*833e5d42SEmmanuel Vadot "gmi_a16_pj7"; 559*833e5d42SEmmanuel Vadot nvidia,function = "spi4"; 560*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 561*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 562*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 563*833e5d42SEmmanuel Vadot }; 564*833e5d42SEmmanuel Vadot gmi-a18-pb1 { 565*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_a18_pb1"; 566*833e5d42SEmmanuel Vadot nvidia,function = "spi4"; 567*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 568*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 569*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 570*833e5d42SEmmanuel Vadot }; 571*833e5d42SEmmanuel Vadot gmi-a19-pk7 { 572*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_a19_pk7"; 573*833e5d42SEmmanuel Vadot nvidia,function = "spi4"; 574*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 575*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 576*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 577*833e5d42SEmmanuel Vadot }; 578*833e5d42SEmmanuel Vadot 579*833e5d42SEmmanuel Vadot /* Display A pinmux */ 580*833e5d42SEmmanuel Vadot lcd-pwr0-pb2 { 581*833e5d42SEmmanuel Vadot nvidia,pins = "lcd_pwr0_pb2", 582*833e5d42SEmmanuel Vadot "lcd_pclk_pb3", 583*833e5d42SEmmanuel Vadot "lcd_pwr1_pc1", 584*833e5d42SEmmanuel Vadot "lcd_d0_pe0", 585*833e5d42SEmmanuel Vadot "lcd_d1_pe1", 586*833e5d42SEmmanuel Vadot "lcd_d2_pe2", 587*833e5d42SEmmanuel Vadot "lcd_d3_pe3", 588*833e5d42SEmmanuel Vadot "lcd_d4_pe4", 589*833e5d42SEmmanuel Vadot "lcd_d5_pe5", 590*833e5d42SEmmanuel Vadot "lcd_d6_pe6", 591*833e5d42SEmmanuel Vadot "lcd_d7_pe7", 592*833e5d42SEmmanuel Vadot "lcd_d8_pf0", 593*833e5d42SEmmanuel Vadot "lcd_d9_pf1", 594*833e5d42SEmmanuel Vadot "lcd_d10_pf2", 595*833e5d42SEmmanuel Vadot "lcd_d11_pf3", 596*833e5d42SEmmanuel Vadot "lcd_d12_pf4", 597*833e5d42SEmmanuel Vadot "lcd_d13_pf5", 598*833e5d42SEmmanuel Vadot "lcd_d14_pf6", 599*833e5d42SEmmanuel Vadot "lcd_d15_pf7", 600*833e5d42SEmmanuel Vadot "lcd_de_pj1", 601*833e5d42SEmmanuel Vadot "lcd_hsync_pj3", 602*833e5d42SEmmanuel Vadot "lcd_vsync_pj4", 603*833e5d42SEmmanuel Vadot "lcd_d16_pm0", 604*833e5d42SEmmanuel Vadot "lcd_d17_pm1", 605*833e5d42SEmmanuel Vadot "lcd_d18_pm2", 606*833e5d42SEmmanuel Vadot "lcd_d19_pm3", 607*833e5d42SEmmanuel Vadot "lcd_d20_pm4", 608*833e5d42SEmmanuel Vadot "lcd_d21_pm5", 609*833e5d42SEmmanuel Vadot "lcd_d22_pm6", 610*833e5d42SEmmanuel Vadot "lcd_d23_pm7", 611*833e5d42SEmmanuel Vadot "lcd_dc0_pn6", 612*833e5d42SEmmanuel Vadot "lcd_sdin_pz2"; 613*833e5d42SEmmanuel Vadot nvidia,function = "displaya"; 614*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 615*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 616*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 617*833e5d42SEmmanuel Vadot }; 618*833e5d42SEmmanuel Vadot lcd-cs0-n-pn4 { 619*833e5d42SEmmanuel Vadot nvidia,pins = "lcd_cs0_n_pn4", 620*833e5d42SEmmanuel Vadot "lcd_sdout_pn5", 621*833e5d42SEmmanuel Vadot "lcd_wr_n_pz3"; 622*833e5d42SEmmanuel Vadot nvidia,function = "displaya"; 623*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 624*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 625*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 626*833e5d42SEmmanuel Vadot }; 627*833e5d42SEmmanuel Vadot 628*833e5d42SEmmanuel Vadot blink { 629*833e5d42SEmmanuel Vadot nvidia,pins = "clk_32k_out_pa0"; 630*833e5d42SEmmanuel Vadot nvidia,function = "blink"; 631*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 632*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 633*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 634*833e5d42SEmmanuel Vadot }; 635*833e5d42SEmmanuel Vadot 636*833e5d42SEmmanuel Vadot /* KBC keys */ 637*833e5d42SEmmanuel Vadot kb-col0-pq0 { 638*833e5d42SEmmanuel Vadot nvidia,pins = "kb_col0_pq0"; 639*833e5d42SEmmanuel Vadot nvidia,function = "kbc"; 640*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 641*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 642*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 643*833e5d42SEmmanuel Vadot }; 644*833e5d42SEmmanuel Vadot kb-col1-pq1 { 645*833e5d42SEmmanuel Vadot nvidia,pins = "kb_row1_pr1", 646*833e5d42SEmmanuel Vadot "kb_row3_pr3", 647*833e5d42SEmmanuel Vadot "kb_row14_ps6"; 648*833e5d42SEmmanuel Vadot nvidia,function = "kbc"; 649*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 650*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 651*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 652*833e5d42SEmmanuel Vadot }; 653*833e5d42SEmmanuel Vadot kb-col4-pq4 { 654*833e5d42SEmmanuel Vadot nvidia,pins = "kb_col4_pq4", 655*833e5d42SEmmanuel Vadot "kb_col5_pq5", 656*833e5d42SEmmanuel Vadot "kb_col7_pq7", 657*833e5d42SEmmanuel Vadot "kb_row2_pr2", 658*833e5d42SEmmanuel Vadot "kb_row4_pr4", 659*833e5d42SEmmanuel Vadot "kb_row5_pr5", 660*833e5d42SEmmanuel Vadot "kb_row12_ps4", 661*833e5d42SEmmanuel Vadot "kb_row13_ps5"; 662*833e5d42SEmmanuel Vadot nvidia,function = "kbc"; 663*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 664*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 665*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 666*833e5d42SEmmanuel Vadot }; 667*833e5d42SEmmanuel Vadot 668*833e5d42SEmmanuel Vadot gmi-wp-n-pc7 { 669*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_wp_n_pc7", 670*833e5d42SEmmanuel Vadot "gmi_wait_pi7", 671*833e5d42SEmmanuel Vadot "gmi_cs3_n_pk4"; 672*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 673*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 674*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 675*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 676*833e5d42SEmmanuel Vadot }; 677*833e5d42SEmmanuel Vadot gmi-cs0-n-pj0 { 678*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_cs0_n_pj0", 679*833e5d42SEmmanuel Vadot "gmi_cs1_n_pj2", 680*833e5d42SEmmanuel Vadot "gmi_cs2_n_pk3"; 681*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 682*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 683*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 684*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 685*833e5d42SEmmanuel Vadot }; 686*833e5d42SEmmanuel Vadot vi-pclk-pt0 { 687*833e5d42SEmmanuel Vadot nvidia,pins = "vi_pclk_pt0"; 688*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 689*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 690*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 691*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 692*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 693*833e5d42SEmmanuel Vadot nvidia,io-reset = <0>; 694*833e5d42SEmmanuel Vadot }; 695*833e5d42SEmmanuel Vadot 696*833e5d42SEmmanuel Vadot /* GPIO keys pinmux */ 697*833e5d42SEmmanuel Vadot power-key { 698*833e5d42SEmmanuel Vadot nvidia,pins = "pv0"; 699*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 700*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 701*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 702*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 703*833e5d42SEmmanuel Vadot }; 704*833e5d42SEmmanuel Vadot vol-keys { 705*833e5d42SEmmanuel Vadot nvidia,pins = "kb_col2_pq2", 706*833e5d42SEmmanuel Vadot "kb_col3_pq3"; 707*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 708*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 709*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 710*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 711*833e5d42SEmmanuel Vadot }; 712*833e5d42SEmmanuel Vadot 713*833e5d42SEmmanuel Vadot /* Bluetooth */ 714*833e5d42SEmmanuel Vadot bt-shutdown { 715*833e5d42SEmmanuel Vadot nvidia,pins = "pu0"; 716*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 717*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 718*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 719*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 720*833e5d42SEmmanuel Vadot }; 721*833e5d42SEmmanuel Vadot bt-dev-wake { 722*833e5d42SEmmanuel Vadot nvidia,pins = "pu1"; 723*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 724*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 725*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 726*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 727*833e5d42SEmmanuel Vadot }; 728*833e5d42SEmmanuel Vadot bt-host-wake { 729*833e5d42SEmmanuel Vadot nvidia,pins = "pu6"; 730*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 731*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 732*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 733*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 734*833e5d42SEmmanuel Vadot }; 735*833e5d42SEmmanuel Vadot 736*833e5d42SEmmanuel Vadot pu2 { 737*833e5d42SEmmanuel Vadot nvidia,pins = "pu2"; 738*833e5d42SEmmanuel Vadot nvidia,function = "rsvd1"; 739*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 740*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 741*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 742*833e5d42SEmmanuel Vadot }; 743*833e5d42SEmmanuel Vadot pu3 { 744*833e5d42SEmmanuel Vadot nvidia,pins = "pu3"; 745*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 746*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 747*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 748*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 749*833e5d42SEmmanuel Vadot }; 750*833e5d42SEmmanuel Vadot pcc1 { 751*833e5d42SEmmanuel Vadot nvidia,pins = "pcc1"; 752*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 753*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 754*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 755*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 756*833e5d42SEmmanuel Vadot }; 757*833e5d42SEmmanuel Vadot pv2 { 758*833e5d42SEmmanuel Vadot nvidia,pins = "pv2"; 759*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 760*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 761*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 762*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 763*833e5d42SEmmanuel Vadot }; 764*833e5d42SEmmanuel Vadot pv3 { 765*833e5d42SEmmanuel Vadot nvidia,pins = "pv3"; 766*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 767*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 768*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 769*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 770*833e5d42SEmmanuel Vadot }; 771*833e5d42SEmmanuel Vadot vi-vsync-pd6 { 772*833e5d42SEmmanuel Vadot nvidia,pins = "vi_vsync_pd6", 773*833e5d42SEmmanuel Vadot "vi_hsync_pd7"; 774*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 775*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 776*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 777*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 778*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 779*833e5d42SEmmanuel Vadot nvidia,io-reset = <0>; 780*833e5d42SEmmanuel Vadot }; 781*833e5d42SEmmanuel Vadot vi-d10-pt2 { 782*833e5d42SEmmanuel Vadot nvidia,pins = "vi_d10_pt2", 783*833e5d42SEmmanuel Vadot "vi_d0_pt4", 784*833e5d42SEmmanuel Vadot "pbb0"; 785*833e5d42SEmmanuel Vadot nvidia,function = "rsvd2"; 786*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 787*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 788*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 789*833e5d42SEmmanuel Vadot }; 790*833e5d42SEmmanuel Vadot kb-row0-pr0 { 791*833e5d42SEmmanuel Vadot nvidia,pins = "kb_row0_pr0"; 792*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 793*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 794*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 795*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 796*833e5d42SEmmanuel Vadot }; 797*833e5d42SEmmanuel Vadot gmi-ad0-pg0 { 798*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad0_pg0", 799*833e5d42SEmmanuel Vadot "gmi_ad1_pg1", 800*833e5d42SEmmanuel Vadot "gmi_ad2_pg2", 801*833e5d42SEmmanuel Vadot "gmi_ad3_pg3", 802*833e5d42SEmmanuel Vadot "gmi_ad6_pg6", 803*833e5d42SEmmanuel Vadot "gmi_ad7_pg7", 804*833e5d42SEmmanuel Vadot "gmi_wr_n_pi0", 805*833e5d42SEmmanuel Vadot "gmi_oe_n_pi1", 806*833e5d42SEmmanuel Vadot "gmi_dqs_pi2", 807*833e5d42SEmmanuel Vadot "gmi_adv_n_pk0", 808*833e5d42SEmmanuel Vadot "gmi_clk_pk1"; 809*833e5d42SEmmanuel Vadot nvidia,function = "nand"; 810*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 811*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 812*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 813*833e5d42SEmmanuel Vadot }; 814*833e5d42SEmmanuel Vadot gmi-ad13-ph5 { 815*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad13_ph5"; 816*833e5d42SEmmanuel Vadot nvidia,function = "nand"; 817*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 818*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 819*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 820*833e5d42SEmmanuel Vadot }; 821*833e5d42SEmmanuel Vadot gmi-ad10-ph2 { 822*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad10_ph2", 823*833e5d42SEmmanuel Vadot "gmi_ad11_ph3", 824*833e5d42SEmmanuel Vadot "gmi_ad14_ph6"; 825*833e5d42SEmmanuel Vadot nvidia,function = "nand"; 826*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 827*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 828*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 829*833e5d42SEmmanuel Vadot }; 830*833e5d42SEmmanuel Vadot gmi-ad12-ph4 { 831*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad12_ph4", 832*833e5d42SEmmanuel Vadot "gmi_rst_n_pi4"; 833*833e5d42SEmmanuel Vadot nvidia,function = "nand"; 834*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 835*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 836*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 837*833e5d42SEmmanuel Vadot }; 838*833e5d42SEmmanuel Vadot 839*833e5d42SEmmanuel Vadot /* USB2 VBUS control */ 840*833e5d42SEmmanuel Vadot usb2-vbus-control { 841*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad15_ph7"; 842*833e5d42SEmmanuel Vadot nvidia,function = "nand"; 843*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 844*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 845*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 846*833e5d42SEmmanuel Vadot }; 847*833e5d42SEmmanuel Vadot 848*833e5d42SEmmanuel Vadot /* PWM pinmux */ 849*833e5d42SEmmanuel Vadot pwm-0 { 850*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_ad8_ph0"; 851*833e5d42SEmmanuel Vadot nvidia,function = "pwm0"; 852*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 853*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 854*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 855*833e5d42SEmmanuel Vadot }; 856*833e5d42SEmmanuel Vadot pwm-2 { 857*833e5d42SEmmanuel Vadot nvidia,pins = "pu5"; 858*833e5d42SEmmanuel Vadot nvidia,function = "pwm2"; 859*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 860*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 861*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 862*833e5d42SEmmanuel Vadot }; 863*833e5d42SEmmanuel Vadot 864*833e5d42SEmmanuel Vadot /* S/PDIF pinmux */ 865*833e5d42SEmmanuel Vadot spdif-out { 866*833e5d42SEmmanuel Vadot nvidia,pins = "spdif_out_pk5"; 867*833e5d42SEmmanuel Vadot nvidia,function = "spdif"; 868*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 869*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 870*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 871*833e5d42SEmmanuel Vadot }; 872*833e5d42SEmmanuel Vadot spdif-in { 873*833e5d42SEmmanuel Vadot nvidia,pins = "spdif_in_pk6"; 874*833e5d42SEmmanuel Vadot nvidia,function = "spdif"; 875*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 876*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 877*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 878*833e5d42SEmmanuel Vadot }; 879*833e5d42SEmmanuel Vadot vi-d4-pl2 { 880*833e5d42SEmmanuel Vadot nvidia,pins = "vi_d4_pl2"; 881*833e5d42SEmmanuel Vadot nvidia,function = "vi"; 882*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 883*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 884*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 885*833e5d42SEmmanuel Vadot }; 886*833e5d42SEmmanuel Vadot vi-d6-pl4 { 887*833e5d42SEmmanuel Vadot nvidia,pins = "vi_d6_pl4"; 888*833e5d42SEmmanuel Vadot nvidia,function = "vi"; 889*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 890*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 891*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 892*833e5d42SEmmanuel Vadot nvidia,lock = <0>; 893*833e5d42SEmmanuel Vadot nvidia,io-reset = <0>; 894*833e5d42SEmmanuel Vadot }; 895*833e5d42SEmmanuel Vadot vi-mclk-pt1 { 896*833e5d42SEmmanuel Vadot nvidia,pins = "vi_mclk_pt1"; 897*833e5d42SEmmanuel Vadot nvidia,function = "vi"; 898*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 899*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 900*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 901*833e5d42SEmmanuel Vadot }; 902*833e5d42SEmmanuel Vadot jtag-rtck { 903*833e5d42SEmmanuel Vadot nvidia,pins = "jtag_rtck_pu7"; 904*833e5d42SEmmanuel Vadot nvidia,function = "rtck"; 905*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 906*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 907*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 908*833e5d42SEmmanuel Vadot }; 909*833e5d42SEmmanuel Vadot 910*833e5d42SEmmanuel Vadot crt-hsync-pv6 { 911*833e5d42SEmmanuel Vadot nvidia,pins = "crt_hsync_pv6", 912*833e5d42SEmmanuel Vadot "crt_vsync_pv7"; 913*833e5d42SEmmanuel Vadot nvidia,function = "crt"; 914*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 915*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 916*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 917*833e5d42SEmmanuel Vadot }; 918*833e5d42SEmmanuel Vadot 919*833e5d42SEmmanuel Vadot clk1-out { 920*833e5d42SEmmanuel Vadot nvidia,pins = "clk1_out_pw4"; 921*833e5d42SEmmanuel Vadot nvidia,function = "extperiph1"; 922*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 923*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 924*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 925*833e5d42SEmmanuel Vadot }; 926*833e5d42SEmmanuel Vadot clk2-out { 927*833e5d42SEmmanuel Vadot nvidia,pins = "clk2_out_pw5"; 928*833e5d42SEmmanuel Vadot nvidia,function = "extperiph2"; 929*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 930*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 931*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 932*833e5d42SEmmanuel Vadot }; 933*833e5d42SEmmanuel Vadot clk3-out { 934*833e5d42SEmmanuel Vadot nvidia,pins = "clk3_out_pee0"; 935*833e5d42SEmmanuel Vadot nvidia,function = "extperiph3"; 936*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 937*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 938*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 939*833e5d42SEmmanuel Vadot }; 940*833e5d42SEmmanuel Vadot sys-clk-req { 941*833e5d42SEmmanuel Vadot nvidia,pins = "sys_clk_req_pz5"; 942*833e5d42SEmmanuel Vadot nvidia,function = "sysclk"; 943*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 944*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 945*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 946*833e5d42SEmmanuel Vadot }; 947*833e5d42SEmmanuel Vadot pbb4 { 948*833e5d42SEmmanuel Vadot nvidia,pins = "pbb4"; 949*833e5d42SEmmanuel Vadot nvidia,function = "vgp4"; 950*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 951*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 952*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 953*833e5d42SEmmanuel Vadot }; 954*833e5d42SEmmanuel Vadot pbb5 { 955*833e5d42SEmmanuel Vadot nvidia,pins = "pbb5"; 956*833e5d42SEmmanuel Vadot nvidia,function = "vgp5"; 957*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 958*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 959*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 960*833e5d42SEmmanuel Vadot }; 961*833e5d42SEmmanuel Vadot pbb6 { 962*833e5d42SEmmanuel Vadot nvidia,pins = "pbb6"; 963*833e5d42SEmmanuel Vadot nvidia,function = "vgp6"; 964*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 965*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 966*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 967*833e5d42SEmmanuel Vadot }; 968*833e5d42SEmmanuel Vadot clk2-req-pcc5 { 969*833e5d42SEmmanuel Vadot nvidia,pins = "clk2_req_pcc5", 970*833e5d42SEmmanuel Vadot "clk1_req_pee2"; 971*833e5d42SEmmanuel Vadot nvidia,function = "dap"; 972*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 973*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 974*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 975*833e5d42SEmmanuel Vadot }; 976*833e5d42SEmmanuel Vadot clk3-req-pee1 { 977*833e5d42SEmmanuel Vadot nvidia,pins = "clk3_req_pee1"; 978*833e5d42SEmmanuel Vadot nvidia,function = "dev3"; 979*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 980*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 981*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 982*833e5d42SEmmanuel Vadot }; 983*833e5d42SEmmanuel Vadot owr { 984*833e5d42SEmmanuel Vadot nvidia,pins = "owr"; 985*833e5d42SEmmanuel Vadot nvidia,function = "owr"; 986*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 987*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 988*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 989*833e5d42SEmmanuel Vadot }; 990*833e5d42SEmmanuel Vadot 991*833e5d42SEmmanuel Vadot /* P1801-T specific pinmux */ 992*833e5d42SEmmanuel Vadot lcd-pwr2 { 993*833e5d42SEmmanuel Vadot nvidia,pins = "lcd_pwr2_pc6", 994*833e5d42SEmmanuel Vadot "lcd_dc1_pd2"; 995*833e5d42SEmmanuel Vadot nvidia,function = "displaya"; 996*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 997*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 998*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 999*833e5d42SEmmanuel Vadot }; 1000*833e5d42SEmmanuel Vadot lcd-m1 { 1001*833e5d42SEmmanuel Vadot nvidia,pins = "lcd_m1_pw1"; 1002*833e5d42SEmmanuel Vadot nvidia,function = "displaya"; 1003*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1004*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 1005*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1006*833e5d42SEmmanuel Vadot }; 1007*833e5d42SEmmanuel Vadot key-mode { 1008*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_cs4_n_pk2"; 1009*833e5d42SEmmanuel Vadot nvidia,function = "rsvd4"; 1010*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 1011*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 1012*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1013*833e5d42SEmmanuel Vadot }; 1014*833e5d42SEmmanuel Vadot splashtop { 1015*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_cs6_n_pi3"; 1016*833e5d42SEmmanuel Vadot nvidia,function = "nand_alt"; 1017*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1018*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 1019*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1020*833e5d42SEmmanuel Vadot }; 1021*833e5d42SEmmanuel Vadot w8-detect { 1022*833e5d42SEmmanuel Vadot nvidia,pins = "gmi_cs7_n_pi6"; 1023*833e5d42SEmmanuel Vadot nvidia,function = "nand_alt"; 1024*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 1025*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 1026*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1027*833e5d42SEmmanuel Vadot }; 1028*833e5d42SEmmanuel Vadot pbb3 { 1029*833e5d42SEmmanuel Vadot nvidia,pins = "pbb3"; 1030*833e5d42SEmmanuel Vadot nvidia,function = "vgp3"; 1031*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1032*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 1033*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1034*833e5d42SEmmanuel Vadot }; 1035*833e5d42SEmmanuel Vadot pbb7 { 1036*833e5d42SEmmanuel Vadot nvidia,pins = "pbb7"; 1037*833e5d42SEmmanuel Vadot nvidia,function = "i2s4"; 1038*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1039*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 1040*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1041*833e5d42SEmmanuel Vadot }; 1042*833e5d42SEmmanuel Vadot spi2-mosi-px0 { 1043*833e5d42SEmmanuel Vadot nvidia,pins = "spi2_mosi_px0"; 1044*833e5d42SEmmanuel Vadot nvidia,function = "spi6"; 1045*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1046*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 1047*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1048*833e5d42SEmmanuel Vadot }; 1049*833e5d42SEmmanuel Vadot tp-vendor { 1050*833e5d42SEmmanuel Vadot nvidia,pins = "kb_row6_pr6", 1051*833e5d42SEmmanuel Vadot "kb_row7_pr7"; 1052*833e5d42SEmmanuel Vadot nvidia,function = "kbc"; 1053*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 1054*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 1055*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1056*833e5d42SEmmanuel Vadot }; 1057*833e5d42SEmmanuel Vadot tp-power { 1058*833e5d42SEmmanuel Vadot nvidia,pins = "kb_row8_ps0"; 1059*833e5d42SEmmanuel Vadot nvidia,function = "kbc"; 1060*833e5d42SEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1061*833e5d42SEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 1062*833e5d42SEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1063*833e5d42SEmmanuel Vadot }; 1064*833e5d42SEmmanuel Vadot 1065*833e5d42SEmmanuel Vadot /* GPIO power/drive control */ 1066*833e5d42SEmmanuel Vadot drive-dap1 { 1067*833e5d42SEmmanuel Vadot nvidia,pins = "drive_dap1", 1068*833e5d42SEmmanuel Vadot "drive_dap2", 1069*833e5d42SEmmanuel Vadot "drive_dbg", 1070*833e5d42SEmmanuel Vadot "drive_at5", 1071*833e5d42SEmmanuel Vadot "drive_gme", 1072*833e5d42SEmmanuel Vadot "drive_ddc", 1073*833e5d42SEmmanuel Vadot "drive_ao1", 1074*833e5d42SEmmanuel Vadot "drive_uart3"; 1075*833e5d42SEmmanuel Vadot nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>; 1076*833e5d42SEmmanuel Vadot nvidia,schmitt = <TEGRA_PIN_ENABLE>; 1077*833e5d42SEmmanuel Vadot nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>; 1078*833e5d42SEmmanuel Vadot nvidia,pull-down-strength = <31>; 1079*833e5d42SEmmanuel Vadot nvidia,pull-up-strength = <31>; 1080*833e5d42SEmmanuel Vadot nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 1081*833e5d42SEmmanuel Vadot nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 1082*833e5d42SEmmanuel Vadot }; 1083*833e5d42SEmmanuel Vadot drive-sdio1 { 1084*833e5d42SEmmanuel Vadot nvidia,pins = "drive_sdio1", 1085*833e5d42SEmmanuel Vadot "drive_sdio3"; 1086*833e5d42SEmmanuel Vadot nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>; 1087*833e5d42SEmmanuel Vadot nvidia,schmitt = <TEGRA_PIN_DISABLE>; 1088*833e5d42SEmmanuel Vadot nvidia,pull-down-strength = <46>; 1089*833e5d42SEmmanuel Vadot nvidia,pull-up-strength = <42>; 1090*833e5d42SEmmanuel Vadot nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>; 1091*833e5d42SEmmanuel Vadot nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>; 1092*833e5d42SEmmanuel Vadot }; 1093*833e5d42SEmmanuel Vadot }; 1094*833e5d42SEmmanuel Vadot }; 1095*833e5d42SEmmanuel Vadot 1096*833e5d42SEmmanuel Vadot uartb: serial@70006040 { 1097*833e5d42SEmmanuel Vadot compatible = "nvidia,tegra30-hsuart"; 1098*833e5d42SEmmanuel Vadot reset-names = "serial"; 1099*833e5d42SEmmanuel Vadot /delete-property/ reg-shift; 1100*833e5d42SEmmanuel Vadot status = "okay"; 1101*833e5d42SEmmanuel Vadot 1102*833e5d42SEmmanuel Vadot /* Broadcom GPS BCM47511 */ 1103*833e5d42SEmmanuel Vadot }; 1104*833e5d42SEmmanuel Vadot 1105*833e5d42SEmmanuel Vadot uartc: serial@70006200 { 1106*833e5d42SEmmanuel Vadot compatible = "nvidia,tegra30-hsuart"; 1107*833e5d42SEmmanuel Vadot reset-names = "serial"; 1108*833e5d42SEmmanuel Vadot /delete-property/ reg-shift; 1109*833e5d42SEmmanuel Vadot status = "okay"; 1110*833e5d42SEmmanuel Vadot 1111*833e5d42SEmmanuel Vadot /* Azurewave AW-AH691 BCM43241B0 */ 1112*833e5d42SEmmanuel Vadot }; 1113*833e5d42SEmmanuel Vadot 1114*833e5d42SEmmanuel Vadot pwm: pwm@7000a000 { 1115*833e5d42SEmmanuel Vadot status = "okay"; 1116*833e5d42SEmmanuel Vadot }; 1117*833e5d42SEmmanuel Vadot 1118*833e5d42SEmmanuel Vadot i2c@7000c000 { 1119*833e5d42SEmmanuel Vadot status = "okay"; 1120*833e5d42SEmmanuel Vadot clock-frequency = <280000>; 1121*833e5d42SEmmanuel Vadot }; 1122*833e5d42SEmmanuel Vadot 1123*833e5d42SEmmanuel Vadot i2c@7000c400 { 1124*833e5d42SEmmanuel Vadot status = "okay"; 1125*833e5d42SEmmanuel Vadot clock-frequency = <400000>; 1126*833e5d42SEmmanuel Vadot 1127*833e5d42SEmmanuel Vadot /* Nuvoton NPCE791LA0DX embedded controller */ 1128*833e5d42SEmmanuel Vadot }; 1129*833e5d42SEmmanuel Vadot 1130*833e5d42SEmmanuel Vadot i2c@7000c500 { 1131*833e5d42SEmmanuel Vadot status = "okay"; 1132*833e5d42SEmmanuel Vadot clock-frequency = <100000>; 1133*833e5d42SEmmanuel Vadot 1134*833e5d42SEmmanuel Vadot accelerometer@f { 1135*833e5d42SEmmanuel Vadot compatible = "kionix,kxtf9"; 1136*833e5d42SEmmanuel Vadot reg = <0x0f>; 1137*833e5d42SEmmanuel Vadot 1138*833e5d42SEmmanuel Vadot interrupt-parent = <&gpio>; 1139*833e5d42SEmmanuel Vadot interrupts = <TEGRA_GPIO(O, 5) IRQ_TYPE_EDGE_RISING>; 1140*833e5d42SEmmanuel Vadot 1141*833e5d42SEmmanuel Vadot vdd-supply = <&vdd_1v8_vio>; 1142*833e5d42SEmmanuel Vadot vddio-supply = <&vdd_1v8_vio>; 1143*833e5d42SEmmanuel Vadot 1144*833e5d42SEmmanuel Vadot mount-matrix = "0", "1", "0", 1145*833e5d42SEmmanuel Vadot "1", "0", "0", 1146*833e5d42SEmmanuel Vadot "0", "0", "1"; 1147*833e5d42SEmmanuel Vadot }; 1148*833e5d42SEmmanuel Vadot }; 1149*833e5d42SEmmanuel Vadot 1150*833e5d42SEmmanuel Vadot hdmi_ddc: i2c@7000c700 { 1151*833e5d42SEmmanuel Vadot status = "okay"; 1152*833e5d42SEmmanuel Vadot clock-frequency = <33000>; 1153*833e5d42SEmmanuel Vadot }; 1154*833e5d42SEmmanuel Vadot 1155*833e5d42SEmmanuel Vadot i2c@7000d000 { 1156*833e5d42SEmmanuel Vadot status = "okay"; 1157*833e5d42SEmmanuel Vadot clock-frequency = <400000>; 1158*833e5d42SEmmanuel Vadot 1159*833e5d42SEmmanuel Vadot rt5640: audio-codec@1c { 1160*833e5d42SEmmanuel Vadot compatible = "realtek,rt5640"; 1161*833e5d42SEmmanuel Vadot reg = <0x1c>; 1162*833e5d42SEmmanuel Vadot 1163*833e5d42SEmmanuel Vadot realtek,dmic1-data-pin = <1>; 1164*833e5d42SEmmanuel Vadot 1165*833e5d42SEmmanuel Vadot clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1166*833e5d42SEmmanuel Vadot clock-names = "mclk"; 1167*833e5d42SEmmanuel Vadot 1168*833e5d42SEmmanuel Vadot realtek,ldo1-en-gpios = <&gpio TEGRA_GPIO(BB, 6) GPIO_ACTIVE_HIGH>; 1169*833e5d42SEmmanuel Vadot }; 1170*833e5d42SEmmanuel Vadot 1171*833e5d42SEmmanuel Vadot /* Texas Instruments TPS659110 PMIC */ 1172*833e5d42SEmmanuel Vadot pmic: pmic@2d { 1173*833e5d42SEmmanuel Vadot compatible = "ti,tps65911"; 1174*833e5d42SEmmanuel Vadot reg = <0x2d>; 1175*833e5d42SEmmanuel Vadot 1176*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 1177*833e5d42SEmmanuel Vadot #interrupt-cells = <2>; 1178*833e5d42SEmmanuel Vadot interrupt-controller; 1179*833e5d42SEmmanuel Vadot wakeup-source; 1180*833e5d42SEmmanuel Vadot 1181*833e5d42SEmmanuel Vadot ti,en-gpio-sleep = <0 0 1 0 0 0 0 0 0>; 1182*833e5d42SEmmanuel Vadot ti,system-power-controller; 1183*833e5d42SEmmanuel Vadot ti,sleep-keep-ck32k; 1184*833e5d42SEmmanuel Vadot ti,sleep-enable; 1185*833e5d42SEmmanuel Vadot 1186*833e5d42SEmmanuel Vadot #gpio-cells = <2>; 1187*833e5d42SEmmanuel Vadot gpio-controller; 1188*833e5d42SEmmanuel Vadot 1189*833e5d42SEmmanuel Vadot vcc1-supply = <&vdd_5v0_bat>; 1190*833e5d42SEmmanuel Vadot vcc2-supply = <&vdd_5v0_bat>; 1191*833e5d42SEmmanuel Vadot vcc3-supply = <&vdd_1v8_vio>; 1192*833e5d42SEmmanuel Vadot vcc4-supply = <&vdd_5v0_bat>; 1193*833e5d42SEmmanuel Vadot vcc5-supply = <&vdd_5v0_bat>; 1194*833e5d42SEmmanuel Vadot vcc6-supply = <&vddio_ddr>; 1195*833e5d42SEmmanuel Vadot vcc7-supply = <&vdd_5v0_bat>; 1196*833e5d42SEmmanuel Vadot vccio-supply = <&vdd_5v0_bat>; 1197*833e5d42SEmmanuel Vadot 1198*833e5d42SEmmanuel Vadot pmic-sleep-hog { 1199*833e5d42SEmmanuel Vadot gpio-hog; 1200*833e5d42SEmmanuel Vadot gpios = <2 GPIO_ACTIVE_HIGH>; 1201*833e5d42SEmmanuel Vadot output-high; 1202*833e5d42SEmmanuel Vadot }; 1203*833e5d42SEmmanuel Vadot 1204*833e5d42SEmmanuel Vadot regulators { 1205*833e5d42SEmmanuel Vadot /* vdd1 is not used by Portable AiO */ 1206*833e5d42SEmmanuel Vadot 1207*833e5d42SEmmanuel Vadot vddio_ddr: vdd2 { 1208*833e5d42SEmmanuel Vadot regulator-name = "vddio_ddr"; 1209*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1200000>; 1210*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1200000>; 1211*833e5d42SEmmanuel Vadot regulator-always-on; 1212*833e5d42SEmmanuel Vadot regulator-boot-on; 1213*833e5d42SEmmanuel Vadot }; 1214*833e5d42SEmmanuel Vadot 1215*833e5d42SEmmanuel Vadot vdd_cpu: vddctrl { 1216*833e5d42SEmmanuel Vadot regulator-name = "vdd_cpu,vdd_sys"; 1217*833e5d42SEmmanuel Vadot regulator-min-microvolt = <600000>; 1218*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1400000>; 1219*833e5d42SEmmanuel Vadot regulator-coupled-with = <&vdd_core>; 1220*833e5d42SEmmanuel Vadot regulator-coupled-max-spread = <300000>; 1221*833e5d42SEmmanuel Vadot regulator-max-step-microvolt = <100000>; 1222*833e5d42SEmmanuel Vadot regulator-always-on; 1223*833e5d42SEmmanuel Vadot regulator-boot-on; 1224*833e5d42SEmmanuel Vadot ti,regulator-ext-sleep-control = <1>; 1225*833e5d42SEmmanuel Vadot 1226*833e5d42SEmmanuel Vadot nvidia,tegra-cpu-regulator; 1227*833e5d42SEmmanuel Vadot }; 1228*833e5d42SEmmanuel Vadot 1229*833e5d42SEmmanuel Vadot vdd_1v8_vio: vio { 1230*833e5d42SEmmanuel Vadot regulator-name = "vdd_1v8_gen"; 1231*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1500000>; 1232*833e5d42SEmmanuel Vadot regulator-max-microvolt = <3300000>; 1233*833e5d42SEmmanuel Vadot regulator-always-on; 1234*833e5d42SEmmanuel Vadot regulator-boot-on; 1235*833e5d42SEmmanuel Vadot }; 1236*833e5d42SEmmanuel Vadot 1237*833e5d42SEmmanuel Vadot /* eMMC VDD */ 1238*833e5d42SEmmanuel Vadot vcore_emmc: ldo1 { 1239*833e5d42SEmmanuel Vadot regulator-name = "vdd_emmc_core"; 1240*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1000000>; 1241*833e5d42SEmmanuel Vadot regulator-max-microvolt = <3300000>; 1242*833e5d42SEmmanuel Vadot regulator-always-on; 1243*833e5d42SEmmanuel Vadot }; 1244*833e5d42SEmmanuel Vadot 1245*833e5d42SEmmanuel Vadot /* uSD slot VDD */ 1246*833e5d42SEmmanuel Vadot vdd_usd: ldo2 { 1247*833e5d42SEmmanuel Vadot regulator-name = "vdd_usd"; 1248*833e5d42SEmmanuel Vadot regulator-min-microvolt = <3100000>; 1249*833e5d42SEmmanuel Vadot regulator-max-microvolt = <3100000>; 1250*833e5d42SEmmanuel Vadot regulator-always-on; 1251*833e5d42SEmmanuel Vadot }; 1252*833e5d42SEmmanuel Vadot 1253*833e5d42SEmmanuel Vadot /* uSD slot VDDIO */ 1254*833e5d42SEmmanuel Vadot vddio_usd: ldo3 { 1255*833e5d42SEmmanuel Vadot regulator-name = "vddio_usd"; 1256*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1800000>; 1257*833e5d42SEmmanuel Vadot regulator-max-microvolt = <3100000>; 1258*833e5d42SEmmanuel Vadot }; 1259*833e5d42SEmmanuel Vadot 1260*833e5d42SEmmanuel Vadot ldo4 { 1261*833e5d42SEmmanuel Vadot regulator-name = "vdd_rtc"; 1262*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1200000>; 1263*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1200000>; 1264*833e5d42SEmmanuel Vadot regulator-always-on; 1265*833e5d42SEmmanuel Vadot }; 1266*833e5d42SEmmanuel Vadot 1267*833e5d42SEmmanuel Vadot /* ldo5 is not used by Portable AiO */ 1268*833e5d42SEmmanuel Vadot 1269*833e5d42SEmmanuel Vadot ldo6 { 1270*833e5d42SEmmanuel Vadot regulator-name = "avdd_dsi_csi,pwrdet_mipi"; 1271*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1200000>; 1272*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1200000>; 1273*833e5d42SEmmanuel Vadot }; 1274*833e5d42SEmmanuel Vadot 1275*833e5d42SEmmanuel Vadot ldo7 { 1276*833e5d42SEmmanuel Vadot regulator-name = "vdd_pllm,x,u,a_p_c_s"; 1277*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1200000>; 1278*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1200000>; 1279*833e5d42SEmmanuel Vadot regulator-always-on; 1280*833e5d42SEmmanuel Vadot regulator-boot-on; 1281*833e5d42SEmmanuel Vadot ti,regulator-ext-sleep-control = <8>; 1282*833e5d42SEmmanuel Vadot }; 1283*833e5d42SEmmanuel Vadot 1284*833e5d42SEmmanuel Vadot ldo8 { 1285*833e5d42SEmmanuel Vadot regulator-name = "vdd_ddr_hs"; 1286*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1000000>; 1287*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1000000>; 1288*833e5d42SEmmanuel Vadot regulator-always-on; 1289*833e5d42SEmmanuel Vadot ti,regulator-ext-sleep-control = <8>; 1290*833e5d42SEmmanuel Vadot }; 1291*833e5d42SEmmanuel Vadot }; 1292*833e5d42SEmmanuel Vadot }; 1293*833e5d42SEmmanuel Vadot 1294*833e5d42SEmmanuel Vadot nct72: temperature-sensor@4c { 1295*833e5d42SEmmanuel Vadot compatible = "onnn,nct1008"; 1296*833e5d42SEmmanuel Vadot reg = <0x4c>; 1297*833e5d42SEmmanuel Vadot 1298*833e5d42SEmmanuel Vadot interrupt-parent = <&gpio>; 1299*833e5d42SEmmanuel Vadot interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>; 1300*833e5d42SEmmanuel Vadot 1301*833e5d42SEmmanuel Vadot vcc-supply = <&vdd_3v3_sys>; 1302*833e5d42SEmmanuel Vadot #thermal-sensor-cells = <1>; 1303*833e5d42SEmmanuel Vadot }; 1304*833e5d42SEmmanuel Vadot 1305*833e5d42SEmmanuel Vadot vdd_core: core-regulator@60 { 1306*833e5d42SEmmanuel Vadot compatible = "ti,tps62361"; 1307*833e5d42SEmmanuel Vadot reg = <0x60>; 1308*833e5d42SEmmanuel Vadot 1309*833e5d42SEmmanuel Vadot regulator-name = "tps62361-vout"; 1310*833e5d42SEmmanuel Vadot regulator-min-microvolt = <500000>; 1311*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1770000>; 1312*833e5d42SEmmanuel Vadot regulator-coupled-with = <&vdd_cpu>; 1313*833e5d42SEmmanuel Vadot regulator-coupled-max-spread = <300000>; 1314*833e5d42SEmmanuel Vadot regulator-max-step-microvolt = <100000>; 1315*833e5d42SEmmanuel Vadot regulator-boot-on; 1316*833e5d42SEmmanuel Vadot regulator-always-on; 1317*833e5d42SEmmanuel Vadot ti,enable-vout-discharge; 1318*833e5d42SEmmanuel Vadot ti,vsel0-state-high; 1319*833e5d42SEmmanuel Vadot ti,vsel1-state-high; 1320*833e5d42SEmmanuel Vadot 1321*833e5d42SEmmanuel Vadot nvidia,tegra-core-regulator; 1322*833e5d42SEmmanuel Vadot }; 1323*833e5d42SEmmanuel Vadot }; 1324*833e5d42SEmmanuel Vadot 1325*833e5d42SEmmanuel Vadot vdd_5v0_bat: regulator-bat { 1326*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 1327*833e5d42SEmmanuel Vadot regulator-name = "vdd_ac_bat"; 1328*833e5d42SEmmanuel Vadot regulator-min-microvolt = <5000000>; 1329*833e5d42SEmmanuel Vadot regulator-max-microvolt = <5000000>; 1330*833e5d42SEmmanuel Vadot regulator-always-on; 1331*833e5d42SEmmanuel Vadot regulator-boot-on; 1332*833e5d42SEmmanuel Vadot }; 1333*833e5d42SEmmanuel Vadot 1334*833e5d42SEmmanuel Vadot vdd_5v0_cp: regulator-sby { 1335*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 1336*833e5d42SEmmanuel Vadot regulator-name = "vdd_5v0_sby"; 1337*833e5d42SEmmanuel Vadot regulator-min-microvolt = <5000000>; 1338*833e5d42SEmmanuel Vadot regulator-max-microvolt = <5000000>; 1339*833e5d42SEmmanuel Vadot regulator-always-on; 1340*833e5d42SEmmanuel Vadot regulator-boot-on; 1341*833e5d42SEmmanuel Vadot gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; 1342*833e5d42SEmmanuel Vadot enable-active-high; 1343*833e5d42SEmmanuel Vadot vin-supply = <&vdd_5v0_bat>; 1344*833e5d42SEmmanuel Vadot }; 1345*833e5d42SEmmanuel Vadot 1346*833e5d42SEmmanuel Vadot vdd_5v0_sys: regulator-5v { 1347*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 1348*833e5d42SEmmanuel Vadot regulator-name = "vdd_5v0_sys"; 1349*833e5d42SEmmanuel Vadot regulator-min-microvolt = <5000000>; 1350*833e5d42SEmmanuel Vadot regulator-max-microvolt = <5000000>; 1351*833e5d42SEmmanuel Vadot regulator-always-on; 1352*833e5d42SEmmanuel Vadot regulator-boot-on; 1353*833e5d42SEmmanuel Vadot gpio = <&pmic 8 GPIO_ACTIVE_HIGH>; 1354*833e5d42SEmmanuel Vadot enable-active-high; 1355*833e5d42SEmmanuel Vadot vin-supply = <&vdd_5v0_bat>; 1356*833e5d42SEmmanuel Vadot }; 1357*833e5d42SEmmanuel Vadot 1358*833e5d42SEmmanuel Vadot vdd_1v5_ddr: regulator-ddr { 1359*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 1360*833e5d42SEmmanuel Vadot regulator-name = "vdd_ddr"; 1361*833e5d42SEmmanuel Vadot regulator-min-microvolt = <1500000>; 1362*833e5d42SEmmanuel Vadot regulator-max-microvolt = <1500000>; 1363*833e5d42SEmmanuel Vadot regulator-always-on; 1364*833e5d42SEmmanuel Vadot regulator-boot-on; 1365*833e5d42SEmmanuel Vadot gpio = <&pmic 7 GPIO_ACTIVE_HIGH>; 1366*833e5d42SEmmanuel Vadot enable-active-high; 1367*833e5d42SEmmanuel Vadot vin-supply = <&vdd_5v0_bat>; 1368*833e5d42SEmmanuel Vadot }; 1369*833e5d42SEmmanuel Vadot 1370*833e5d42SEmmanuel Vadot vdd_3v3_sys: regulator-3v { 1371*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 1372*833e5d42SEmmanuel Vadot regulator-name = "vdd_3v3_sys"; 1373*833e5d42SEmmanuel Vadot regulator-min-microvolt = <3300000>; 1374*833e5d42SEmmanuel Vadot regulator-max-microvolt = <3300000>; 1375*833e5d42SEmmanuel Vadot regulator-always-on; 1376*833e5d42SEmmanuel Vadot regulator-boot-on; 1377*833e5d42SEmmanuel Vadot gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; 1378*833e5d42SEmmanuel Vadot enable-active-high; 1379*833e5d42SEmmanuel Vadot vin-supply = <&vdd_5v0_bat>; 1380*833e5d42SEmmanuel Vadot }; 1381*833e5d42SEmmanuel Vadot 1382*833e5d42SEmmanuel Vadot vdd_3v3_com: regulator-com { 1383*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 1384*833e5d42SEmmanuel Vadot regulator-name = "vdd_3v3_com"; 1385*833e5d42SEmmanuel Vadot regulator-min-microvolt = <3300000>; 1386*833e5d42SEmmanuel Vadot regulator-max-microvolt = <3300000>; 1387*833e5d42SEmmanuel Vadot regulator-always-on; 1388*833e5d42SEmmanuel Vadot gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; 1389*833e5d42SEmmanuel Vadot enable-active-high; 1390*833e5d42SEmmanuel Vadot vin-supply = <&vdd_3v3_sys>; 1391*833e5d42SEmmanuel Vadot }; 1392*833e5d42SEmmanuel Vadot 1393*833e5d42SEmmanuel Vadot usb2_vbus: regulator-usb2 { 1394*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 1395*833e5d42SEmmanuel Vadot regulator-name = "usb2_vbus"; 1396*833e5d42SEmmanuel Vadot regulator-min-microvolt = <5000000>; 1397*833e5d42SEmmanuel Vadot regulator-max-microvolt = <5000000>; 1398*833e5d42SEmmanuel Vadot enable-active-high; 1399*833e5d42SEmmanuel Vadot gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; 1400*833e5d42SEmmanuel Vadot gpio-open-drain; 1401*833e5d42SEmmanuel Vadot vin-supply = <&vdd_5v0_sys>; 1402*833e5d42SEmmanuel Vadot }; 1403*833e5d42SEmmanuel Vadot 1404*833e5d42SEmmanuel Vadot hdmi_5v0_sys: regulator-hdmi { 1405*833e5d42SEmmanuel Vadot compatible = "regulator-fixed"; 1406*833e5d42SEmmanuel Vadot regulator-name = "hdmi_5v0_sys"; 1407*833e5d42SEmmanuel Vadot regulator-min-microvolt = <5000000>; 1408*833e5d42SEmmanuel Vadot regulator-max-microvolt = <5000000>; 1409*833e5d42SEmmanuel Vadot regulator-boot-on; 1410*833e5d42SEmmanuel Vadot gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; 1411*833e5d42SEmmanuel Vadot enable-active-high; 1412*833e5d42SEmmanuel Vadot vin-supply = <&vdd_5v0_sys>; 1413*833e5d42SEmmanuel Vadot }; 1414*833e5d42SEmmanuel Vadot 1415*833e5d42SEmmanuel Vadot pmc@7000e400 { 1416*833e5d42SEmmanuel Vadot status = "okay"; 1417*833e5d42SEmmanuel Vadot nvidia,invert-interrupt; 1418*833e5d42SEmmanuel Vadot nvidia,suspend-mode = <2>; 1419*833e5d42SEmmanuel Vadot nvidia,cpu-pwr-good-time = <2000>; 1420*833e5d42SEmmanuel Vadot nvidia,cpu-pwr-off-time = <200>; 1421*833e5d42SEmmanuel Vadot nvidia,core-pwr-good-time = <3845 3845>; 1422*833e5d42SEmmanuel Vadot nvidia,core-pwr-off-time = <0>; 1423*833e5d42SEmmanuel Vadot nvidia,core-power-req-active-high; 1424*833e5d42SEmmanuel Vadot nvidia,sys-clock-req-active-high; 1425*833e5d42SEmmanuel Vadot core-supply = <&vdd_core>; 1426*833e5d42SEmmanuel Vadot 1427*833e5d42SEmmanuel Vadot i2c-thermtrip { 1428*833e5d42SEmmanuel Vadot nvidia,i2c-controller-id = <4>; 1429*833e5d42SEmmanuel Vadot nvidia,bus-addr = <0x2d>; 1430*833e5d42SEmmanuel Vadot nvidia,reg-addr = <0x3f>; 1431*833e5d42SEmmanuel Vadot nvidia,reg-data = <0x81>; 1432*833e5d42SEmmanuel Vadot }; 1433*833e5d42SEmmanuel Vadot }; 1434*833e5d42SEmmanuel Vadot 1435*833e5d42SEmmanuel Vadot memory-controller@7000f000 { 1436*833e5d42SEmmanuel Vadot emc-timings-3 { 1437*833e5d42SEmmanuel Vadot /* Micron 2GB 800MHz */ 1438*833e5d42SEmmanuel Vadot nvidia,ram-code = <3>; 1439*833e5d42SEmmanuel Vadot 1440*833e5d42SEmmanuel Vadot timing-25500000 { 1441*833e5d42SEmmanuel Vadot clock-frequency = <25500000>; 1442*833e5d42SEmmanuel Vadot 1443*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00030003 0xc0000020 1444*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000002 0x00000000 1445*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000008 1446*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1447*833e5d42SEmmanuel Vadot 0x06020102 0x000a0502 0x75830303 0x001f0000 >; 1448*833e5d42SEmmanuel Vadot }; 1449*833e5d42SEmmanuel Vadot 1450*833e5d42SEmmanuel Vadot timing-51000000 { 1451*833e5d42SEmmanuel Vadot clock-frequency = <51000000>; 1452*833e5d42SEmmanuel Vadot 1453*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00010003 0xc0000020 1454*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000002 0x00000000 1455*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000008 1456*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1457*833e5d42SEmmanuel Vadot 0x06020102 0x000a0502 0x74630303 0x001f0000 >; 1458*833e5d42SEmmanuel Vadot }; 1459*833e5d42SEmmanuel Vadot 1460*833e5d42SEmmanuel Vadot timing-102000000 { 1461*833e5d42SEmmanuel Vadot clock-frequency = <102000000>; 1462*833e5d42SEmmanuel Vadot 1463*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00000003 0xc0000030 1464*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000000 1465*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000003 0x00000008 1466*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1467*833e5d42SEmmanuel Vadot 0x06020102 0x000a0503 0x73c30504 0x001f0000 >; 1468*833e5d42SEmmanuel Vadot }; 1469*833e5d42SEmmanuel Vadot 1470*833e5d42SEmmanuel Vadot timing-204000000 { 1471*833e5d42SEmmanuel Vadot clock-frequency = <204000000>; 1472*833e5d42SEmmanuel Vadot 1473*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00000006 0xc0000025 1474*833e5d42SEmmanuel Vadot 0x00000001 0x00000001 0x00000005 0x00000002 1475*833e5d42SEmmanuel Vadot 0x00000003 0x00000001 0x00000003 0x00000008 1476*833e5d42SEmmanuel Vadot 0x00000002 0x00000001 0x00000002 0x00000006 1477*833e5d42SEmmanuel Vadot 0x06020102 0x000a0505 0x73840a06 0x001f0000 >; 1478*833e5d42SEmmanuel Vadot }; 1479*833e5d42SEmmanuel Vadot 1480*833e5d42SEmmanuel Vadot timing-400000000 { 1481*833e5d42SEmmanuel Vadot clock-frequency = <400000000>; 1482*833e5d42SEmmanuel Vadot 1483*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x0000000c 0xc0000048 1484*833e5d42SEmmanuel Vadot 0x00000001 0x00000002 0x00000009 0x00000005 1485*833e5d42SEmmanuel Vadot 0x00000005 0x00000001 0x00000002 0x00000008 1486*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000003 0x00000006 1487*833e5d42SEmmanuel Vadot 0x06030202 0x000d0709 0x7086120a 0x001f0000 >; 1488*833e5d42SEmmanuel Vadot }; 1489*833e5d42SEmmanuel Vadot 1490*833e5d42SEmmanuel Vadot timing-800000000 { 1491*833e5d42SEmmanuel Vadot clock-frequency = <800000000>; 1492*833e5d42SEmmanuel Vadot 1493*833e5d42SEmmanuel Vadot nvidia,emem-configuration = < 0x00000018 0xc0000090 1494*833e5d42SEmmanuel Vadot 0x00000004 0x00000005 0x00000013 0x0000000c 1495*833e5d42SEmmanuel Vadot 0x0000000b 0x00000002 0x00000003 0x0000000c 1496*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000004 0x00000008 1497*833e5d42SEmmanuel Vadot 0x08040202 0x00160d13 0x712c2414 0x001f0000 >; 1498*833e5d42SEmmanuel Vadot }; 1499*833e5d42SEmmanuel Vadot }; 1500*833e5d42SEmmanuel Vadot }; 1501*833e5d42SEmmanuel Vadot 1502*833e5d42SEmmanuel Vadot memory-controller@7000f400 { 1503*833e5d42SEmmanuel Vadot emc-timings-3 { 1504*833e5d42SEmmanuel Vadot /* Micron 2GB 800MHz */ 1505*833e5d42SEmmanuel Vadot nvidia,ram-code = <3>; 1506*833e5d42SEmmanuel Vadot 1507*833e5d42SEmmanuel Vadot timing-25500000 { 1508*833e5d42SEmmanuel Vadot clock-frequency = <25500000>; 1509*833e5d42SEmmanuel Vadot 1510*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1511*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1512*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 1513*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1514*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1515*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1516*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1517*833e5d42SEmmanuel Vadot 1518*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000001 1519*833e5d42SEmmanuel Vadot 0x00000006 0x00000000 0x00000000 0x00000002 1520*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000000 1521*833e5d42SEmmanuel Vadot 0x00000000 0x00000003 0x00000001 0x00000000 1522*833e5d42SEmmanuel Vadot 0x00000005 0x00000005 0x00000004 0x00000009 1523*833e5d42SEmmanuel Vadot 0x0000000b 0x000000c0 0x00000000 0x00000030 1524*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1525*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x00000007 0x00000007 1526*833e5d42SEmmanuel Vadot 0x00000004 0x00000001 0x00000000 0x00000004 1527*833e5d42SEmmanuel Vadot 0x00000005 0x000000c7 0x00000006 0x00000006 1528*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x007800a4 1529*833e5d42SEmmanuel Vadot 0x00008000 0x000fc000 0x000fc000 0x000fc000 1530*833e5d42SEmmanuel Vadot 0x000fc000 0x000fc000 0x000fc000 0x000fc000 1531*833e5d42SEmmanuel Vadot 0x000fc000 0x00000000 0x00000000 0x00000000 1532*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1533*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1534*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1535*833e5d42SEmmanuel Vadot 0x00000000 0x000fc000 0x000fc000 0x000fc000 1536*833e5d42SEmmanuel Vadot 0x000fc000 0x000002a0 0x0800211c 0x00000000 1537*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1538*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00000000 1539*833e5d42SEmmanuel Vadot 0x00000040 0x000c000c 0xa0f10000 0x00000000 1540*833e5d42SEmmanuel Vadot 0x00000000 0x80000287 0xe8000000 0xff00ff00 >; 1541*833e5d42SEmmanuel Vadot }; 1542*833e5d42SEmmanuel Vadot 1543*833e5d42SEmmanuel Vadot timing-51000000 { 1544*833e5d42SEmmanuel Vadot clock-frequency = <51000000>; 1545*833e5d42SEmmanuel Vadot 1546*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1547*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1548*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 1549*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1550*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1551*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1552*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1553*833e5d42SEmmanuel Vadot 1554*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000002 1555*833e5d42SEmmanuel Vadot 0x0000000d 0x00000001 0x00000000 0x00000002 1556*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000000 1557*833e5d42SEmmanuel Vadot 0x00000000 0x00000003 0x00000001 0x00000000 1558*833e5d42SEmmanuel Vadot 0x00000005 0x00000005 0x00000004 0x00000009 1559*833e5d42SEmmanuel Vadot 0x0000000b 0x00000181 0x00000000 0x00000060 1560*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1561*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x0000000e 0x0000000e 1562*833e5d42SEmmanuel Vadot 0x00000004 0x00000002 0x00000000 0x00000004 1563*833e5d42SEmmanuel Vadot 0x00000005 0x0000018e 0x00000006 0x00000006 1564*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x007800a4 1565*833e5d42SEmmanuel Vadot 0x00008000 0x000fc000 0x000fc000 0x000fc000 1566*833e5d42SEmmanuel Vadot 0x000fc000 0x000fc000 0x000fc000 0x000fc000 1567*833e5d42SEmmanuel Vadot 0x000fc000 0x00000000 0x00000000 0x00000000 1568*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1569*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1570*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1571*833e5d42SEmmanuel Vadot 0x00000000 0x000fc000 0x000fc000 0x000fc000 1572*833e5d42SEmmanuel Vadot 0x000fc000 0x000002a0 0x0800211c 0x00000000 1573*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1574*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00000000 1575*833e5d42SEmmanuel Vadot 0x00000040 0x000c000c 0xa0f10000 0x00000000 1576*833e5d42SEmmanuel Vadot 0x00000000 0x8000040b 0xe8000000 0xff00ff00 >; 1577*833e5d42SEmmanuel Vadot }; 1578*833e5d42SEmmanuel Vadot 1579*833e5d42SEmmanuel Vadot timing-102000000 { 1580*833e5d42SEmmanuel Vadot clock-frequency = <102000000>; 1581*833e5d42SEmmanuel Vadot 1582*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1583*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1584*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 1585*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1586*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1587*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1588*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1589*833e5d42SEmmanuel Vadot 1590*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000004 1591*833e5d42SEmmanuel Vadot 0x0000001a 0x00000003 0x00000001 0x00000002 1592*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000001 1593*833e5d42SEmmanuel Vadot 0x00000001 0x00000003 0x00000001 0x00000000 1594*833e5d42SEmmanuel Vadot 0x00000005 0x00000005 0x00000004 0x00000009 1595*833e5d42SEmmanuel Vadot 0x0000000b 0x00000303 0x00000000 0x000000c0 1596*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1597*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x0000001c 0x0000001c 1598*833e5d42SEmmanuel Vadot 0x00000004 0x00000004 0x00000000 0x00000004 1599*833e5d42SEmmanuel Vadot 0x00000005 0x0000031c 0x00000006 0x00000006 1600*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x007800a4 1601*833e5d42SEmmanuel Vadot 0x00008000 0x000fc000 0x000fc000 0x000fc000 1602*833e5d42SEmmanuel Vadot 0x000fc000 0x000fc000 0x000fc000 0x000fc000 1603*833e5d42SEmmanuel Vadot 0x000fc000 0x00000000 0x00000000 0x00000000 1604*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1605*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1606*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1607*833e5d42SEmmanuel Vadot 0x00000000 0x000fc000 0x000fc000 0x000fc000 1608*833e5d42SEmmanuel Vadot 0x000fc000 0x000002a0 0x0800211c 0x00000000 1609*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1610*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00000000 1611*833e5d42SEmmanuel Vadot 0x00000040 0x000c000c 0xa0f10000 0x00000000 1612*833e5d42SEmmanuel Vadot 0x00000000 0x80000713 0xe8000000 0xff00ff00 >; 1613*833e5d42SEmmanuel Vadot }; 1614*833e5d42SEmmanuel Vadot 1615*833e5d42SEmmanuel Vadot timing-204000000 { 1616*833e5d42SEmmanuel Vadot clock-frequency = <204000000>; 1617*833e5d42SEmmanuel Vadot 1618*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1619*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1620*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 1621*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1622*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1623*833e5d42SEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1624*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1625*833e5d42SEmmanuel Vadot 1626*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000009 1627*833e5d42SEmmanuel Vadot 0x00000035 0x00000007 0x00000002 0x00000002 1628*833e5d42SEmmanuel Vadot 0x0000000a 0x00000005 0x0000000b 0x00000002 1629*833e5d42SEmmanuel Vadot 0x00000002 0x00000003 0x00000001 0x00000000 1630*833e5d42SEmmanuel Vadot 0x00000005 0x00000006 0x00000004 0x00000009 1631*833e5d42SEmmanuel Vadot 0x0000000b 0x00000607 0x00000000 0x00000181 1632*833e5d42SEmmanuel Vadot 0x00000002 0x00000002 0x00000001 0x00000000 1633*833e5d42SEmmanuel Vadot 0x00000007 0x0000000f 0x00000038 0x00000038 1634*833e5d42SEmmanuel Vadot 0x00000004 0x00000007 0x00000000 0x00000004 1635*833e5d42SEmmanuel Vadot 0x00000005 0x00000638 0x00000007 0x00000004 1636*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00004288 0x004400a4 1637*833e5d42SEmmanuel Vadot 0x00008000 0x00080000 0x00080000 0x00080000 1638*833e5d42SEmmanuel Vadot 0x00080000 0x00080000 0x00080000 0x00080000 1639*833e5d42SEmmanuel Vadot 0x00080000 0x00000000 0x00000000 0x00000000 1640*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1641*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1642*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1643*833e5d42SEmmanuel Vadot 0x00000000 0x00080000 0x00080000 0x00080000 1644*833e5d42SEmmanuel Vadot 0x00080000 0x000002a0 0x0800211c 0x00000000 1645*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f108 0x05057404 0x54000007 1646*833e5d42SEmmanuel Vadot 0x08000168 0x08000000 0x00000802 0x00020000 1647*833e5d42SEmmanuel Vadot 0x00000100 0x000c000c 0xa0f10000 0x00000000 1648*833e5d42SEmmanuel Vadot 0x00000000 0x80000d22 0xe8000000 0xff00ff00 >; 1649*833e5d42SEmmanuel Vadot }; 1650*833e5d42SEmmanuel Vadot 1651*833e5d42SEmmanuel Vadot timing-400000000 { 1652*833e5d42SEmmanuel Vadot clock-frequency = <400000000>; 1653*833e5d42SEmmanuel Vadot 1654*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1655*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100002>; 1656*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200000>; 1657*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80000521>; 1658*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1659*833e5d42SEmmanuel Vadot 1660*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000012 1661*833e5d42SEmmanuel Vadot 0x00000066 0x0000000c 0x00000004 0x00000003 1662*833e5d42SEmmanuel Vadot 0x00000008 0x00000002 0x0000000a 0x00000004 1663*833e5d42SEmmanuel Vadot 0x00000004 0x00000002 0x00000001 0x00000000 1664*833e5d42SEmmanuel Vadot 0x00000004 0x00000006 0x00000004 0x0000000a 1665*833e5d42SEmmanuel Vadot 0x0000000c 0x00000bf0 0x00000000 0x000002fc 1666*833e5d42SEmmanuel Vadot 0x00000001 0x00000008 0x00000001 0x00000000 1667*833e5d42SEmmanuel Vadot 0x00000008 0x0000000f 0x0000006c 0x00000200 1668*833e5d42SEmmanuel Vadot 0x00000004 0x0000000c 0x00000000 0x00000004 1669*833e5d42SEmmanuel Vadot 0x00000005 0x00000c30 0x00000000 0x00000004 1670*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00007088 0x001d0084 1671*833e5d42SEmmanuel Vadot 0x00008000 0x00044000 0x00044000 0x00044000 1672*833e5d42SEmmanuel Vadot 0x00044000 0x00044000 0x00044000 0x00044000 1673*833e5d42SEmmanuel Vadot 0x00044000 0x00000000 0x00000000 0x00000000 1674*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1675*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1676*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1677*833e5d42SEmmanuel Vadot 0x00000000 0x00048000 0x00048000 0x00048000 1678*833e5d42SEmmanuel Vadot 0x00048000 0x000002a0 0x0800013d 0x00000000 1679*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f508 0x05057404 0x54000007 1680*833e5d42SEmmanuel Vadot 0x080001e8 0x08000021 0x00000802 0x00020000 1681*833e5d42SEmmanuel Vadot 0x00000100 0x0158000c 0xa0f10000 0x00000000 1682*833e5d42SEmmanuel Vadot 0x00000000 0x800018c8 0xe8000000 0xff00ff89 >; 1683*833e5d42SEmmanuel Vadot }; 1684*833e5d42SEmmanuel Vadot 1685*833e5d42SEmmanuel Vadot timing-800000000 { 1686*833e5d42SEmmanuel Vadot clock-frequency = <800000000>; 1687*833e5d42SEmmanuel Vadot 1688*833e5d42SEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1689*833e5d42SEmmanuel Vadot nvidia,emc-mode-1 = <0x80100002>; 1690*833e5d42SEmmanuel Vadot nvidia,emc-mode-2 = <0x80200018>; 1691*833e5d42SEmmanuel Vadot nvidia,emc-mode-reset = <0x80000d71>; 1692*833e5d42SEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1693*833e5d42SEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1694*833e5d42SEmmanuel Vadot 1695*833e5d42SEmmanuel Vadot nvidia,emc-configuration = < 0x00000025 1696*833e5d42SEmmanuel Vadot 0x000000ce 0x0000001a 0x00000009 0x00000005 1697*833e5d42SEmmanuel Vadot 0x0000000d 0x00000004 0x00000013 0x00000009 1698*833e5d42SEmmanuel Vadot 0x00000009 0x00000003 0x00000001 0x00000000 1699*833e5d42SEmmanuel Vadot 0x00000007 0x0000000b 0x00000009 0x0000000b 1700*833e5d42SEmmanuel Vadot 0x00000012 0x00001820 0x00000000 0x00000608 1701*833e5d42SEmmanuel Vadot 0x00000003 0x00000012 0x00000001 0x00000000 1702*833e5d42SEmmanuel Vadot 0x0000000f 0x00000018 0x000000d8 0x00000200 1703*833e5d42SEmmanuel Vadot 0x00000005 0x00000018 0x00000000 0x00000007 1704*833e5d42SEmmanuel Vadot 0x00000008 0x00001860 0x0000000c 0x00000004 1705*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00005088 0xf0070191 1706*833e5d42SEmmanuel Vadot 0x00008000 0x0000c00a 0x0000000a 0x0000000a 1707*833e5d42SEmmanuel Vadot 0x0000000a 0x0000000a 0x0000000a 0x0000000a 1708*833e5d42SEmmanuel Vadot 0x0000000a 0x00018000 0x00018000 0x00018000 1709*833e5d42SEmmanuel Vadot 0x00018000 0x00000000 0x00000000 0x00000000 1710*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1711*833e5d42SEmmanuel Vadot 0x00000000 0x00000000 0x00000000 0x00000000 1712*833e5d42SEmmanuel Vadot 0x00000000 0x0000000a 0x0000000a 0x0000000a 1713*833e5d42SEmmanuel Vadot 0x0000000a 0x000002a0 0x0800013d 0x22220000 1714*833e5d42SEmmanuel Vadot 0x77fff884 0x01f1f501 0x07077404 0x54000000 1715*833e5d42SEmmanuel Vadot 0x080001e8 0x08000021 0x00000802 0x00020000 1716*833e5d42SEmmanuel Vadot 0x00000100 0x00f0000c 0xa0f10202 0x00000000 1717*833e5d42SEmmanuel Vadot 0x00000000 0x8000308c 0xe8000000 0xff00ff49 >; 1718*833e5d42SEmmanuel Vadot }; 1719*833e5d42SEmmanuel Vadot }; 1720*833e5d42SEmmanuel Vadot }; 1721*833e5d42SEmmanuel Vadot 1722*833e5d42SEmmanuel Vadot hda@70030000 { 1723*833e5d42SEmmanuel Vadot status = "okay"; 1724*833e5d42SEmmanuel Vadot }; 1725*833e5d42SEmmanuel Vadot 1726*833e5d42SEmmanuel Vadot ahub@70080000 { 1727*833e5d42SEmmanuel Vadot i2s@70080400 { /* i2s1 */ 1728*833e5d42SEmmanuel Vadot status = "okay"; 1729*833e5d42SEmmanuel Vadot }; 1730*833e5d42SEmmanuel Vadot 1731*833e5d42SEmmanuel Vadot /* BT SCO */ 1732*833e5d42SEmmanuel Vadot i2s@70080600 { /* i2s3 */ 1733*833e5d42SEmmanuel Vadot status = "okay"; 1734*833e5d42SEmmanuel Vadot }; 1735*833e5d42SEmmanuel Vadot }; 1736*833e5d42SEmmanuel Vadot 1737*833e5d42SEmmanuel Vadot sdmmc1: mmc@78000000 { 1738*833e5d42SEmmanuel Vadot status = "okay"; 1739*833e5d42SEmmanuel Vadot 1740*833e5d42SEmmanuel Vadot /* SDR104 mode unsupported yet */ 1741*833e5d42SEmmanuel Vadot max-frequency = <104000000>; 1742*833e5d42SEmmanuel Vadot 1743*833e5d42SEmmanuel Vadot cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; 1744*833e5d42SEmmanuel Vadot bus-width = <4>; 1745*833e5d42SEmmanuel Vadot 1746*833e5d42SEmmanuel Vadot vmmc-supply = <&vdd_usd>; /* ldo2 */ 1747*833e5d42SEmmanuel Vadot vqmmc-supply = <&vddio_usd>; /* ldo3 */ 1748*833e5d42SEmmanuel Vadot }; 1749*833e5d42SEmmanuel Vadot 1750*833e5d42SEmmanuel Vadot sdmmc3: mmc@78000400 { 1751*833e5d42SEmmanuel Vadot status = "okay"; 1752*833e5d42SEmmanuel Vadot 1753*833e5d42SEmmanuel Vadot #address-cells = <1>; 1754*833e5d42SEmmanuel Vadot #size-cells = <0>; 1755*833e5d42SEmmanuel Vadot 1756*833e5d42SEmmanuel Vadot keep-power-in-suspend; 1757*833e5d42SEmmanuel Vadot bus-width = <4>; 1758*833e5d42SEmmanuel Vadot non-removable; 1759*833e5d42SEmmanuel Vadot 1760*833e5d42SEmmanuel Vadot mmc-pwrseq = <&brcm_wifi_pwrseq>; 1761*833e5d42SEmmanuel Vadot vmmc-supply = <&vdd_3v3_com>; 1762*833e5d42SEmmanuel Vadot vqmmc-supply = <&vdd_1v8_vio>; 1763*833e5d42SEmmanuel Vadot 1764*833e5d42SEmmanuel Vadot /* Azurewave AW-AH691 BCM43241B0 */ 1765*833e5d42SEmmanuel Vadot wifi@1 { 1766*833e5d42SEmmanuel Vadot compatible = "brcm,bcm4329-fmac"; 1767*833e5d42SEmmanuel Vadot reg = <1>; 1768*833e5d42SEmmanuel Vadot 1769*833e5d42SEmmanuel Vadot interrupt-parent = <&gpio>; 1770*833e5d42SEmmanuel Vadot interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH>; 1771*833e5d42SEmmanuel Vadot interrupt-names = "host-wake"; 1772*833e5d42SEmmanuel Vadot }; 1773*833e5d42SEmmanuel Vadot }; 1774*833e5d42SEmmanuel Vadot 1775*833e5d42SEmmanuel Vadot sdmmc4: mmc@78000600 { 1776*833e5d42SEmmanuel Vadot status = "okay"; 1777*833e5d42SEmmanuel Vadot bus-width = <8>; 1778*833e5d42SEmmanuel Vadot 1779*833e5d42SEmmanuel Vadot non-removable; 1780*833e5d42SEmmanuel Vadot mmc-ddr-3_3v; 1781*833e5d42SEmmanuel Vadot 1782*833e5d42SEmmanuel Vadot vmmc-supply = <&vcore_emmc>; 1783*833e5d42SEmmanuel Vadot vqmmc-supply = <&vdd_1v8_vio>; 1784*833e5d42SEmmanuel Vadot }; 1785*833e5d42SEmmanuel Vadot 1786*833e5d42SEmmanuel Vadot /* USB via ASUS connector */ 1787*833e5d42SEmmanuel Vadot usb@7d000000 { 1788*833e5d42SEmmanuel Vadot compatible = "nvidia,tegra30-udc"; 1789*833e5d42SEmmanuel Vadot status = "okay"; 1790*833e5d42SEmmanuel Vadot dr_mode = "peripheral"; 1791*833e5d42SEmmanuel Vadot }; 1792*833e5d42SEmmanuel Vadot 1793*833e5d42SEmmanuel Vadot usb-phy@7d000000 { 1794*833e5d42SEmmanuel Vadot status = "okay"; 1795*833e5d42SEmmanuel Vadot dr_mode = "peripheral"; 1796*833e5d42SEmmanuel Vadot nvidia,hssync-start-delay = <0>; 1797*833e5d42SEmmanuel Vadot nvidia,xcvr-lsfslew = <2>; 1798*833e5d42SEmmanuel Vadot nvidia,xcvr-lsrslew = <2>; 1799*833e5d42SEmmanuel Vadot vbus-supply = <&vdd_5v0_sys>; 1800*833e5d42SEmmanuel Vadot }; 1801*833e5d42SEmmanuel Vadot 1802*833e5d42SEmmanuel Vadot /* mini-USB port */ 1803*833e5d42SEmmanuel Vadot usb@7d004000 { 1804*833e5d42SEmmanuel Vadot status = "okay"; 1805*833e5d42SEmmanuel Vadot }; 1806*833e5d42SEmmanuel Vadot 1807*833e5d42SEmmanuel Vadot usb-phy@7d004000 { 1808*833e5d42SEmmanuel Vadot status = "okay"; 1809*833e5d42SEmmanuel Vadot vbus-supply = <&usb2_vbus>; 1810*833e5d42SEmmanuel Vadot }; 1811*833e5d42SEmmanuel Vadot 1812*833e5d42SEmmanuel Vadot /* Full size USB */ 1813*833e5d42SEmmanuel Vadot usb@7d008000 { 1814*833e5d42SEmmanuel Vadot status = "okay"; 1815*833e5d42SEmmanuel Vadot }; 1816*833e5d42SEmmanuel Vadot 1817*833e5d42SEmmanuel Vadot usb-phy@7d008000 { 1818*833e5d42SEmmanuel Vadot status = "okay"; 1819*833e5d42SEmmanuel Vadot vbus-supply = <&vdd_5v0_bat>; 1820*833e5d42SEmmanuel Vadot }; 1821*833e5d42SEmmanuel Vadot 1822*833e5d42SEmmanuel Vadot pad_battery: battery-cell { 1823*833e5d42SEmmanuel Vadot compatible = "simple-battery"; 1824*833e5d42SEmmanuel Vadot device-chemistry = "lithium-ion-polymer"; 1825*833e5d42SEmmanuel Vadot charge-full-design-microamp-hours = <5136000>; 1826*833e5d42SEmmanuel Vadot energy-full-design-microwatt-hours = <38000000>; 1827*833e5d42SEmmanuel Vadot operating-range-celsius = <0 45>; 1828*833e5d42SEmmanuel Vadot }; 1829*833e5d42SEmmanuel Vadot 1830*833e5d42SEmmanuel Vadot /* Connected to a 18.4" LVDS panel */ 1831*833e5d42SEmmanuel Vadot bridge { 1832*833e5d42SEmmanuel Vadot compatible = "mstar,tsumu88adt3-lf-1"; 1833*833e5d42SEmmanuel Vadot 1834*833e5d42SEmmanuel Vadot ports { 1835*833e5d42SEmmanuel Vadot #address-cells = <1>; 1836*833e5d42SEmmanuel Vadot #size-cells = <0>; 1837*833e5d42SEmmanuel Vadot 1838*833e5d42SEmmanuel Vadot port@0 { 1839*833e5d42SEmmanuel Vadot reg = <0>; 1840*833e5d42SEmmanuel Vadot 1841*833e5d42SEmmanuel Vadot bridge_in: endpoint { 1842*833e5d42SEmmanuel Vadot remote-endpoint = <&hdmi_out>; 1843*833e5d42SEmmanuel Vadot }; 1844*833e5d42SEmmanuel Vadot }; 1845*833e5d42SEmmanuel Vadot 1846*833e5d42SEmmanuel Vadot port@1 { 1847*833e5d42SEmmanuel Vadot reg = <1>; 1848*833e5d42SEmmanuel Vadot 1849*833e5d42SEmmanuel Vadot bridge_out: endpoint { 1850*833e5d42SEmmanuel Vadot remote-endpoint = <&hdmi_connector_in>; 1851*833e5d42SEmmanuel Vadot }; 1852*833e5d42SEmmanuel Vadot }; 1853*833e5d42SEmmanuel Vadot }; 1854*833e5d42SEmmanuel Vadot }; 1855*833e5d42SEmmanuel Vadot 1856*833e5d42SEmmanuel Vadot /* PMIC has a built-in 32KHz oscillator which is used by PMC */ 1857*833e5d42SEmmanuel Vadot clk32k_in: clock-32k { 1858*833e5d42SEmmanuel Vadot compatible = "fixed-clock"; 1859*833e5d42SEmmanuel Vadot #clock-cells = <0>; 1860*833e5d42SEmmanuel Vadot clock-frequency = <32768>; 1861*833e5d42SEmmanuel Vadot clock-output-names = "pmic-oscillator"; 1862*833e5d42SEmmanuel Vadot }; 1863*833e5d42SEmmanuel Vadot 1864*833e5d42SEmmanuel Vadot connector { 1865*833e5d42SEmmanuel Vadot compatible = "hdmi-connector"; 1866*833e5d42SEmmanuel Vadot label = "HDMI"; 1867*833e5d42SEmmanuel Vadot type = "a"; 1868*833e5d42SEmmanuel Vadot 1869*833e5d42SEmmanuel Vadot /* low: tablet, high: dock */ 1870*833e5d42SEmmanuel Vadot hpd-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_LOW>; 1871*833e5d42SEmmanuel Vadot ddc-i2c-bus = <&hdmi_ddc>; 1872*833e5d42SEmmanuel Vadot ddc-en-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; 1873*833e5d42SEmmanuel Vadot 1874*833e5d42SEmmanuel Vadot port { 1875*833e5d42SEmmanuel Vadot hdmi_connector_in: endpoint { 1876*833e5d42SEmmanuel Vadot remote-endpoint = <&bridge_out>; 1877*833e5d42SEmmanuel Vadot }; 1878*833e5d42SEmmanuel Vadot }; 1879*833e5d42SEmmanuel Vadot }; 1880*833e5d42SEmmanuel Vadot 1881*833e5d42SEmmanuel Vadot cpus { 1882*833e5d42SEmmanuel Vadot cpu0: cpu@0 { 1883*833e5d42SEmmanuel Vadot cpu-supply = <&vdd_cpu>; 1884*833e5d42SEmmanuel Vadot operating-points-v2 = <&cpu0_opp_table>; 1885*833e5d42SEmmanuel Vadot #cooling-cells = <2>; 1886*833e5d42SEmmanuel Vadot }; 1887*833e5d42SEmmanuel Vadot cpu1: cpu@1 { 1888*833e5d42SEmmanuel Vadot cpu-supply = <&vdd_cpu>; 1889*833e5d42SEmmanuel Vadot operating-points-v2 = <&cpu0_opp_table>; 1890*833e5d42SEmmanuel Vadot #cooling-cells = <2>; 1891*833e5d42SEmmanuel Vadot }; 1892*833e5d42SEmmanuel Vadot cpu2: cpu@2 { 1893*833e5d42SEmmanuel Vadot cpu-supply = <&vdd_cpu>; 1894*833e5d42SEmmanuel Vadot operating-points-v2 = <&cpu0_opp_table>; 1895*833e5d42SEmmanuel Vadot #cooling-cells = <2>; 1896*833e5d42SEmmanuel Vadot }; 1897*833e5d42SEmmanuel Vadot cpu3: cpu@3 { 1898*833e5d42SEmmanuel Vadot cpu-supply = <&vdd_cpu>; 1899*833e5d42SEmmanuel Vadot operating-points-v2 = <&cpu0_opp_table>; 1900*833e5d42SEmmanuel Vadot #cooling-cells = <2>; 1901*833e5d42SEmmanuel Vadot }; 1902*833e5d42SEmmanuel Vadot }; 1903*833e5d42SEmmanuel Vadot 1904*833e5d42SEmmanuel Vadot gpio-keys { 1905*833e5d42SEmmanuel Vadot compatible = "gpio-keys"; 1906*833e5d42SEmmanuel Vadot 1907*833e5d42SEmmanuel Vadot key-power { 1908*833e5d42SEmmanuel Vadot label = "Power"; 1909*833e5d42SEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; 1910*833e5d42SEmmanuel Vadot linux,code = <KEY_POWER>; 1911*833e5d42SEmmanuel Vadot debounce-interval = <10>; 1912*833e5d42SEmmanuel Vadot wakeup-event-action = <EV_ACT_ASSERTED>; 1913*833e5d42SEmmanuel Vadot wakeup-source; 1914*833e5d42SEmmanuel Vadot }; 1915*833e5d42SEmmanuel Vadot 1916*833e5d42SEmmanuel Vadot key-volume-up { 1917*833e5d42SEmmanuel Vadot label = "Volume Up"; 1918*833e5d42SEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>; 1919*833e5d42SEmmanuel Vadot linux,code = <KEY_VOLUMEUP>; 1920*833e5d42SEmmanuel Vadot debounce-interval = <10>; 1921*833e5d42SEmmanuel Vadot wakeup-event-action = <EV_ACT_ASSERTED>; 1922*833e5d42SEmmanuel Vadot wakeup-source; 1923*833e5d42SEmmanuel Vadot }; 1924*833e5d42SEmmanuel Vadot 1925*833e5d42SEmmanuel Vadot key-volume-down { 1926*833e5d42SEmmanuel Vadot label = "Volume Down"; 1927*833e5d42SEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>; 1928*833e5d42SEmmanuel Vadot linux,code = <KEY_VOLUMEDOWN>; 1929*833e5d42SEmmanuel Vadot debounce-interval = <10>; 1930*833e5d42SEmmanuel Vadot wakeup-event-action = <EV_ACT_ASSERTED>; 1931*833e5d42SEmmanuel Vadot wakeup-source; 1932*833e5d42SEmmanuel Vadot }; 1933*833e5d42SEmmanuel Vadot 1934*833e5d42SEmmanuel Vadot switch-docking-station-mode { 1935*833e5d42SEmmanuel Vadot label = "Mode"; 1936*833e5d42SEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(K, 2) GPIO_ACTIVE_LOW>; 1937*833e5d42SEmmanuel Vadot linux,code = <KEY_MODE>; 1938*833e5d42SEmmanuel Vadot debounce-interval = <10>; 1939*833e5d42SEmmanuel Vadot wakeup-event-action = <EV_ACT_ASSERTED>; 1940*833e5d42SEmmanuel Vadot wakeup-source; 1941*833e5d42SEmmanuel Vadot }; 1942*833e5d42SEmmanuel Vadot }; 1943*833e5d42SEmmanuel Vadot 1944*833e5d42SEmmanuel Vadot opp-table-actmon { 1945*833e5d42SEmmanuel Vadot opp-800000000 { 1946*833e5d42SEmmanuel Vadot opp-supported-hw = <0x0006>; 1947*833e5d42SEmmanuel Vadot }; 1948*833e5d42SEmmanuel Vadot 1949*833e5d42SEmmanuel Vadot /delete-node/ opp-900000000; 1950*833e5d42SEmmanuel Vadot }; 1951*833e5d42SEmmanuel Vadot 1952*833e5d42SEmmanuel Vadot opp-table-emc { 1953*833e5d42SEmmanuel Vadot opp-800000000-1300 { 1954*833e5d42SEmmanuel Vadot opp-supported-hw = <0x0006>; 1955*833e5d42SEmmanuel Vadot }; 1956*833e5d42SEmmanuel Vadot 1957*833e5d42SEmmanuel Vadot /delete-node/ opp-900000000-1350; 1958*833e5d42SEmmanuel Vadot }; 1959*833e5d42SEmmanuel Vadot 1960*833e5d42SEmmanuel Vadot brcm_wifi_pwrseq: pwrseq-wifi { 1961*833e5d42SEmmanuel Vadot compatible = "mmc-pwrseq-simple"; 1962*833e5d42SEmmanuel Vadot 1963*833e5d42SEmmanuel Vadot clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>; 1964*833e5d42SEmmanuel Vadot clock-names = "ext_clock"; 1965*833e5d42SEmmanuel Vadot 1966*833e5d42SEmmanuel Vadot reset-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_LOW>; 1967*833e5d42SEmmanuel Vadot post-power-on-delay-ms = <300>; 1968*833e5d42SEmmanuel Vadot power-off-delay-us = <300>; 1969*833e5d42SEmmanuel Vadot }; 1970*833e5d42SEmmanuel Vadot 1971*833e5d42SEmmanuel Vadot sound { 1972*833e5d42SEmmanuel Vadot compatible = "asus,tegra-audio-rt5640-p1801-t", 1973*833e5d42SEmmanuel Vadot "nvidia,tegra-audio-rt5640"; 1974*833e5d42SEmmanuel Vadot nvidia,model = "Asus Portable AiO P1801-T RT5642"; 1975*833e5d42SEmmanuel Vadot 1976*833e5d42SEmmanuel Vadot nvidia,audio-routing = 1977*833e5d42SEmmanuel Vadot "Headphones", "HPOR", 1978*833e5d42SEmmanuel Vadot "Headphones", "HPOL", 1979*833e5d42SEmmanuel Vadot "Speakers", "SPORP", 1980*833e5d42SEmmanuel Vadot "Speakers", "SPORN", 1981*833e5d42SEmmanuel Vadot "Speakers", "SPOLP", 1982*833e5d42SEmmanuel Vadot "Speakers", "SPOLN", 1983*833e5d42SEmmanuel Vadot "DMIC1", "Mic Jack"; 1984*833e5d42SEmmanuel Vadot 1985*833e5d42SEmmanuel Vadot nvidia,i2s-controller = <&tegra_i2s1>; 1986*833e5d42SEmmanuel Vadot nvidia,audio-codec = <&rt5640>; 1987*833e5d42SEmmanuel Vadot 1988*833e5d42SEmmanuel Vadot nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; 1989*833e5d42SEmmanuel Vadot 1990*833e5d42SEmmanuel Vadot clocks = <&tegra_car TEGRA30_CLK_PLL_A>, 1991*833e5d42SEmmanuel Vadot <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 1992*833e5d42SEmmanuel Vadot <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1993*833e5d42SEmmanuel Vadot clock-names = "pll_a", "pll_a_out0", "mclk"; 1994*833e5d42SEmmanuel Vadot 1995*833e5d42SEmmanuel Vadot assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>, 1996*833e5d42SEmmanuel Vadot <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1997*833e5d42SEmmanuel Vadot 1998*833e5d42SEmmanuel Vadot assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, 1999*833e5d42SEmmanuel Vadot <&tegra_car TEGRA30_CLK_EXTERN1>; 2000*833e5d42SEmmanuel Vadot }; 2001*833e5d42SEmmanuel Vadot 2002*833e5d42SEmmanuel Vadot thermal-zones { 2003*833e5d42SEmmanuel Vadot /* 2004*833e5d42SEmmanuel Vadot * NCT72 has two sensors: 2005*833e5d42SEmmanuel Vadot * 2006*833e5d42SEmmanuel Vadot * 0: internal that monitors ambient/skin temperature 2007*833e5d42SEmmanuel Vadot * 1: external that is connected to the CPU's diode 2008*833e5d42SEmmanuel Vadot * 2009*833e5d42SEmmanuel Vadot * Ideally we should use userspace thermal governor, 2010*833e5d42SEmmanuel Vadot * but it's a much more complex solution. The "skin" 2011*833e5d42SEmmanuel Vadot * zone exists as a simpler solution which prevents 2012*833e5d42SEmmanuel Vadot * the Portable AiO from getting too hot from a user's 2013*833e5d42SEmmanuel Vadot * tactile perspective. The CPU zone is intended to 2014*833e5d42SEmmanuel Vadot * protect silicon from damage. 2015*833e5d42SEmmanuel Vadot */ 2016*833e5d42SEmmanuel Vadot 2017*833e5d42SEmmanuel Vadot skin-thermal { 2018*833e5d42SEmmanuel Vadot polling-delay-passive = <1000>; /* milliseconds */ 2019*833e5d42SEmmanuel Vadot polling-delay = <5000>; /* milliseconds */ 2020*833e5d42SEmmanuel Vadot 2021*833e5d42SEmmanuel Vadot thermal-sensors = <&nct72 0>; 2022*833e5d42SEmmanuel Vadot 2023*833e5d42SEmmanuel Vadot trips { 2024*833e5d42SEmmanuel Vadot trip0: skin-alert { 2025*833e5d42SEmmanuel Vadot /* throttle at 57C until temperature drops to 56.8C */ 2026*833e5d42SEmmanuel Vadot temperature = <57000>; 2027*833e5d42SEmmanuel Vadot hysteresis = <200>; 2028*833e5d42SEmmanuel Vadot type = "passive"; 2029*833e5d42SEmmanuel Vadot }; 2030*833e5d42SEmmanuel Vadot 2031*833e5d42SEmmanuel Vadot trip1: skin-crit { 2032*833e5d42SEmmanuel Vadot /* shut down at 65C */ 2033*833e5d42SEmmanuel Vadot temperature = <65000>; 2034*833e5d42SEmmanuel Vadot hysteresis = <2000>; 2035*833e5d42SEmmanuel Vadot type = "critical"; 2036*833e5d42SEmmanuel Vadot }; 2037*833e5d42SEmmanuel Vadot }; 2038*833e5d42SEmmanuel Vadot 2039*833e5d42SEmmanuel Vadot cooling-maps { 2040*833e5d42SEmmanuel Vadot map0 { 2041*833e5d42SEmmanuel Vadot trip = <&trip0>; 2042*833e5d42SEmmanuel Vadot cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2043*833e5d42SEmmanuel Vadot <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2044*833e5d42SEmmanuel Vadot <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2045*833e5d42SEmmanuel Vadot <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2046*833e5d42SEmmanuel Vadot <&actmon THERMAL_NO_LIMIT 2047*833e5d42SEmmanuel Vadot THERMAL_NO_LIMIT>; 2048*833e5d42SEmmanuel Vadot }; 2049*833e5d42SEmmanuel Vadot }; 2050*833e5d42SEmmanuel Vadot }; 2051*833e5d42SEmmanuel Vadot 2052*833e5d42SEmmanuel Vadot cpu-thermal { 2053*833e5d42SEmmanuel Vadot polling-delay-passive = <1000>; /* milliseconds */ 2054*833e5d42SEmmanuel Vadot polling-delay = <5000>; /* milliseconds */ 2055*833e5d42SEmmanuel Vadot 2056*833e5d42SEmmanuel Vadot thermal-sensors = <&nct72 1>; 2057*833e5d42SEmmanuel Vadot 2058*833e5d42SEmmanuel Vadot trips { 2059*833e5d42SEmmanuel Vadot trip2: cpu-alert { 2060*833e5d42SEmmanuel Vadot /* throttle at 75C until temperature drops to 74.8C */ 2061*833e5d42SEmmanuel Vadot temperature = <75000>; 2062*833e5d42SEmmanuel Vadot hysteresis = <200>; 2063*833e5d42SEmmanuel Vadot type = "passive"; 2064*833e5d42SEmmanuel Vadot }; 2065*833e5d42SEmmanuel Vadot 2066*833e5d42SEmmanuel Vadot trip3: cpu-crit { 2067*833e5d42SEmmanuel Vadot /* shut down at 90C */ 2068*833e5d42SEmmanuel Vadot temperature = <90000>; 2069*833e5d42SEmmanuel Vadot hysteresis = <2000>; 2070*833e5d42SEmmanuel Vadot type = "critical"; 2071*833e5d42SEmmanuel Vadot }; 2072*833e5d42SEmmanuel Vadot }; 2073*833e5d42SEmmanuel Vadot 2074*833e5d42SEmmanuel Vadot cooling-maps { 2075*833e5d42SEmmanuel Vadot map1 { 2076*833e5d42SEmmanuel Vadot trip = <&trip2>; 2077*833e5d42SEmmanuel Vadot cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2078*833e5d42SEmmanuel Vadot <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2079*833e5d42SEmmanuel Vadot <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2080*833e5d42SEmmanuel Vadot <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 2081*833e5d42SEmmanuel Vadot <&actmon THERMAL_NO_LIMIT 2082*833e5d42SEmmanuel Vadot THERMAL_NO_LIMIT>; 2083*833e5d42SEmmanuel Vadot }; 2084*833e5d42SEmmanuel Vadot }; 2085*833e5d42SEmmanuel Vadot }; 2086*833e5d42SEmmanuel Vadot }; 2087*833e5d42SEmmanuel Vadot}; 2088