| 1f67707f | 24-Nov-2025 |
Ulf Hansson <ulf.hansson@linaro.org> |
pmdomain: Merge branch fixes into next
Merge the pmdomain fixes for v6.18-rc[n] into the next branch, to allow
them to get tested together with the new changes that are targeted for
v6.19.
Signed-o
pmdomain: Merge branch fixes into next
Merge the pmdomain fixes for v6.18-rc[n] into the next branch, to allow
them to get tested together with the new changes that are targeted for
v6.19.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 80ed617a | 07-Nov-2025 |
Brian Masney <bmasney@redhat.com> |
pmdomain: mediatek: convert from clk round_rate() to determine_rate()
The round_rate() clk ops is deprecated in the clk framework in favor
of the determine_rate() clk ops, so let's convert this driv
pmdomain: mediatek: convert from clk round_rate() to determine_rate()
The round_rate() clk ops is deprecated in the clk framework in favor
of the determine_rate() clk ops, so let's convert this driver so that
round_rate() can be removed from the clk core.
Signed-off-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| b0671a5f | 30-Oct-2025 |
Nicolas Frattaroli <nicolas.frattaroli@collabora.com> |
pmdomain: mediatek: mtk-mfg: select MAILBOX in Kconfig
The mtk-mfg pmdomain driver calls common mailbox framework functions. If
the common mailbox framework is not selected in the kernel's
configura
pmdomain: mediatek: mtk-mfg: select MAILBOX in Kconfig
The mtk-mfg pmdomain driver calls common mailbox framework functions. If
the common mailbox framework is not selected in the kernel's
configuration, the build runs into a linker error, as the symbols are
absent.
The hardware mailbox Kconfig system, MAILBOX, has no dependencies of its
own. It's therefore safe to "select" it rather than use "depend on".
Declare this "select" dependency in the Kconfig for the driver.
Fixes: 1ff1f0db6aec ("pmdomain: mediatek: Add support for MFlexGraphics")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202510301311.TcOCnZ1s-lkp@intel.com/
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| f08e7a4e | 17-Oct-2025 |
Nicolas Frattaroli <nicolas.frattaroli@collabora.com> |
pmdomain: mediatek: Add support for MFlexGraphics
Various MediaTek SoCs use GPU integration silicon named "MFlexGraphics"
by MediaTek. On the MT8196 and MT6991 SoCs, interacting with this
integratio
pmdomain: mediatek: Add support for MFlexGraphics
Various MediaTek SoCs use GPU integration silicon named "MFlexGraphics"
by MediaTek. On the MT8196 and MT6991 SoCs, interacting with this
integration silicon is required to power on the GPU.
This glue silicon is in the form of an embedded microcontroller running
special-purpose firmware, which autonomously adjusts clocks and
regulators.
Implement a driver, modelled as a pmdomain driver with a
set_performance_state operation, to support these SoCs.
The driver also exposes the actual achieved clock rate, as read back
from the MCU, as common clock framework clocks, by acting as a clock
provider as well.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 19e668e8 | 23-Oct-2025 |
Ulf Hansson <ulf.hansson@linaro.org> |
pmdomain: mediatek: Fix build-errors
Let's add the missing header to fix the reported build-errors.
Fixes: df4e9ec1ed86 ("pmdomain: mediatek: Add support for secure HWCCF infra power on")
Reported-
pmdomain: mediatek: Fix build-errors
Let's add the missing header to fix the reported build-errors.
Fixes: df4e9ec1ed86 ("pmdomain: mediatek: Add support for secure HWCCF infra power on")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202510231317.ZZxNaFG0-lkp@intel.com/
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 56b0d230 | 25-Sep-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Add support for MT8196 HFRPSYS power domains
Add support for the HFRPSYS Multimedia power domains found in the
MediaTek MT8196 Chromebook SoC.
Those power domains are all managed
pmdomain: mediatek: Add support for MT8196 HFRPSYS power domains
Add support for the HFRPSYS Multimedia power domains found in the
MediaTek MT8196 Chromebook SoC.
Those power domains are all managed by the Hardware Voter MCU.
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 5437b281 | 25-Sep-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Add support for MT8196 SCPSYS power domains
Add a new SPM bus protection block and add support for both the
direct control and HW Voter control SCPSYS power domains found
in the
pmdomain: mediatek: Add support for MT8196 SCPSYS power domains
Add a new SPM bus protection block and add support for both the
direct control and HW Voter control SCPSYS power domains found
in the MT8196 and MT6991 SoCs.
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 8e98bade | 25-Sep-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Add support for secure HWCCF infra power on
Some SoCs, like the MediaTek Dimensity 9400 (MT6991), have granular
power controls and will disable power to the infracfg to save powe
pmdomain: mediatek: Add support for secure HWCCF infra power on
Some SoCs, like the MediaTek Dimensity 9400 (MT6991), have granular
power controls and will disable power to the infracfg to save power
when the platform is in deeper sleep states (or when no IP in the
the infracfg macro-block is in use).
These chips also cannot control the infracfg power states directly
via AP register writes as those are protected by the secure world.
Add a new MTK_SCPD_INFRA_PWR_CTL cap and, if present, make a call
to the secure world to poweron the infracfg block, as the HWV IP
resides in there, when executing HWV domains power sequences.
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| de023206 | 23-Sep-2025 |
Ulf Hansson <ulf.hansson@linaro.org> |
pmdomain: Merge branch fixes into next
Merge the pmdomain fixes for v6.17-rc[n] into the next branch, to allow
them to get tested together with the new changes that are targeted for
v6.18.
Signed-o
pmdomain: Merge branch fixes into next
Merge the pmdomain fixes for v6.17-rc[n] into the next branch, to allow
them to get tested together with the new changes that are targeted for
v6.18.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| ffeebf75 | 05-Aug-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Convert all SoCs to new style regmap retrieval
Add the bus_prot_blocks handle and declare num_bus_prot_blocks to
allow all of the currently supported AArch64 MediaTek SoCs to use
pmdomain: mediatek: Convert all SoCs to new style regmap retrieval
Add the bus_prot_blocks handle and declare num_bus_prot_blocks to
allow all of the currently supported AArch64 MediaTek SoCs to use
the new style regmap retrieval in the driver when a new style
devicetree declaring the mediatek,bus-protection phandle(s) in
the main power controller node is found.
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250805074746.29457-10-angelogioacchino.delregno@collabora.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 9d02c943 | 05-Aug-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Add support for RTFF Hardware in MT8196/MT6991
New generation SoCs use a new RTFF Hardware to save power during
operation of various IPs, other than managing isolation of the
int
pmdomain: mediatek: Add support for RTFF Hardware in MT8196/MT6991
New generation SoCs use a new RTFF Hardware to save power during
operation of various IPs, other than managing isolation of the
internal buck converters during powerup/down of power domains.
Since some of the power domains need different RTFF handling, add
a new scpys_rtff_type enumeration and hold the value for each
power domain in struct scpsys_domain_data.
If RTFF HW is available, the RTFF additional power sequences are
handled in scpsys_ctl_pwrseq_{on,off}().
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250805074746.29457-9-angelogioacchino.delregno@collabora.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 16d861d2 | 05-Aug-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Add support for modem power sequences
Add support for the modem power domains by adding its specific
power sequence in functions scpsys_modem_pwrseq_{on,off}() and
call them if t
pmdomain: mediatek: Add support for modem power sequences
Add support for the modem power domains by adding its specific
power sequence in functions scpsys_modem_pwrseq_{on,off}() and
call them if the flag MTK_SCPD_MODEM_PWRSEQ is present.
While at it, since some SoC models need to skip setting/clearing
the PWR_RST_B_BIT, also add a MTK_SCPD_SKIP_RESET_B flag for that.
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250805074746.29457-8-angelogioacchino.delregno@collabora.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 0e8e6b5f | 05-Aug-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Move ctl sequences out of power_on/off functions
In preparation to support power domains of new SoCs and the modem
power domains for both new and already supported chips, move th
pmdomain: mediatek: Move ctl sequences out of power_on/off functions
In preparation to support power domains of new SoCs and the modem
power domains for both new and already supported chips, move the
generic control power sequences out of the scpsys_power_on() and
scpsys_power_off() and put them in new scpsys_ctl_pwrseq_on(),
scpsys_ctl_pewseq_off() functions.
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250805074746.29457-7-angelogioacchino.delregno@collabora.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| ad4bbdc5 | 05-Aug-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Handle SoCs with inverted SRAM power-down bits
Some SoCs, and even some subsystems in the same SoC, may have the
logic for SRAM power-down inverted, as in, setting the bit means
pmdomain: mediatek: Handle SoCs with inverted SRAM power-down bits
Some SoCs, and even some subsystems in the same SoC, may have the
logic for SRAM power-down inverted, as in, setting the bit means
"power down" and unsetting means "power up": this is because some
hardware subsystems use this as a power-lock indication and some
use this as a power down one (for example, usually, the modem ss
has it inverted!).
In preparation for adding support for power domains with inverted
SRAM_PDN bits, add a new MTK_SCPD_SRAM_PDN_INVERTED flag and check
for it in scpsys_sram_enable() and scpsys_sram_disable().
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250805074746.29457-6-angelogioacchino.delregno@collabora.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 0c1ddc7b | 21-Apr-2025 |
Chen-Yu Tsai <wenst@chromium.org> |
pmdomain: mediatek: Add error messages for missing regmaps
A recent change to the syscon regmap API caused the MediaTek power
controller drivers to fail, as the required regmap could no longer be
re
pmdomain: mediatek: Add error messages for missing regmaps
A recent change to the syscon regmap API caused the MediaTek power
controller drivers to fail, as the required regmap could no longer be
retrieved. The error did not have an accompanying message, making the
failure less obvious. The aforementioned change has since been reverted.
Add error messages to all the regmap retrievals, thereby making all
error paths in scpsys_add_one_domain() have visible error messages.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250421090951.395467-1-wenst@chromium.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 5342f018 | 10-Apr-2025 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
pmdomain: mediatek: Add support for Dimensity 1200 MT6893
Add power domains definitions to implement support for the
MediaTek Dimensity 1200 (MT6893) SoC.
Since this chip's MTCMOS are similar to th
pmdomain: mediatek: Add support for Dimensity 1200 MT6893
Add power domains definitions to implement support for the
MediaTek Dimensity 1200 (MT6893) SoC.
Since this chip's MTCMOS are similar to the ones of Kompanio
820 (MT8192), the definitions from that have been reused where
possible.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Link: https://lore.kernel.org/r/20250410143944.475773-4-angelogioacchino.delregno@collabora.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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| 885f5669 | 20-Jan-2025 |
Christian Marangi <ansuelsmth@gmail.com> |
pmdomain: airoha: Fix compilation error with Clang-20 and Thumb2 mode
The use of R7 in the SMCCC conflicts with the compiler's use of R7 as a frame
pointer in Thumb2 mode, which is forcibly enabled
pmdomain: airoha: Fix compilation error with Clang-20 and Thumb2 mode
The use of R7 in the SMCCC conflicts with the compiler's use of R7 as a frame
pointer in Thumb2 mode, which is forcibly enabled by Clang when profiling
hooks are inserted via the -pg switch.
This is a known issue and similar driver workaround this with a Makefile
ifdef. Exact workaround are applied in
drivers/firmware/arm_scmi/transports/Makefile and other similar driver.
Suggested-by: Sudeep Holla <sudeep.holla@arm.com>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202501201840.XmpHXpQ4-lkp@intel.com/
Fixes: 82e703dd438b ("pmdomain: airoha: Add Airoha CPU PM Domain support")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20250120153817.11807-1-ansuelsmth@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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