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Searched refs:reg_name_post (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c709 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
710 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
711 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
712 reg ## reg_name_pre ## id ## _ ## reg_name_post
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c722 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
723 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
724 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
725 reg ## reg_name_pre ## id ## _ ## reg_name_post
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/
H A Ddcn36_resource.c571 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
572 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
573 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
574 reg ## reg_name_pre ## id ## _ ## reg_name_post
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c715 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
716 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
717 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
718 reg ## reg_name_pre ## id ## _ ## reg_name_post
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.c584 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
585 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
586 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
587 reg ## reg_name_pre ## id ## _ ## reg_name_post
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c714 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
715 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
716 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
717 reg ## reg_name_pre ## id ## _ ## reg_name_post
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/
H A Ddcn351_resource.c564 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
565 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
566 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
567 reg ## reg_name_pre ## id ## _ ## reg_name_post
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c558 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
559 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
560 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
561 reg ## reg_name_pre ## id ## _ ## reg_name_post
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn60/
H A Ddcn60_resource.c527 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
528 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
529 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
530 reg ## reg_name_pre ## id ## _ ## reg_name_post
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn42b/
H A Ddcn42b_resource.c555 #define SRII2(reg_name_pre, reg_name_post, id) … argument
556 .reg_name_pre##_##reg_name_post[id] = \
557 BASE(reg##reg_name_pre##id##_##reg_name_post##_BASE_IDX) + \
558 reg##reg_name_pre##id##_##reg_name_post
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn42/
H A Ddcn42_resource.c505 #define SRII2(reg_name_pre, reg_name_post, id) … argument
506 .reg_name_pre##_##reg_name_post[id] = \
507 BASE(reg##reg_name_pre##id##_##reg_name_post##_BASE_IDX) + \
508 reg##reg_name_pre##id##_##reg_name_post
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.c540 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
541 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
542 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
543 reg ## reg_name_pre ## id ## _ ## reg_name_post
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c568 #define SRII2(reg_name_pre, reg_name_post, id)\ argument
569 .reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
570 ## id ## _ ## reg_name_post ## _BASE_IDX) + \
571 reg ## reg_name_pre ## id ## _ ## reg_name_post