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Searched refs:post_div_table (Results 1 – 25 of 72) sorted by relevance

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/linux/drivers/clk/qcom/
H A Dcamcc-sc7280.c85 .post_div_table = post_div_table_cam_cc_pll0_out_even,
108 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
160 .post_div_table = post_div_table_cam_cc_pll1_out_even,
210 .post_div_table = post_div_table_cam_cc_pll2_out_aux,
233 .post_div_table = post_div_table_cam_cc_pll2_out_aux2,
285 .post_div_table = post_div_table_cam_cc_pll3_out_even,
337 .post_div_table = post_div_table_cam_cc_pll4_out_even,
389 .post_div_table = post_div_table_cam_cc_pll5_out_even,
441 .post_div_table = post_div_table_cam_cc_pll6_out_even,
464 .post_div_table = post_div_table_cam_cc_pll6_out_odd,
H A Dcamcc-sm8550.c99 .post_div_table = post_div_table_cam_cc_pll0_out_even,
122 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
177 .post_div_table = post_div_table_cam_cc_pll1_out_even,
260 .post_div_table = post_div_table_cam_cc_pll3_out_even,
315 .post_div_table = post_div_table_cam_cc_pll4_out_even,
370 .post_div_table = post_div_table_cam_cc_pll5_out_even,
425 .post_div_table = post_div_table_cam_cc_pll6_out_even,
480 .post_div_table = post_div_table_cam_cc_pll7_out_even,
535 .post_div_table = post_div_table_cam_cc_pll8_out_even,
590 .post_div_table = post_div_table_cam_cc_pll9_out_even,
[all …]
H A Dcamcc-sm4450.c84 .post_div_table = post_div_table_cam_cc_pll0_out_even,
107 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
158 .post_div_table = post_div_table_cam_cc_pll1_out_even,
209 .post_div_table = post_div_table_cam_cc_pll2_out_even,
260 .post_div_table = post_div_table_cam_cc_pll3_out_even,
311 .post_div_table = post_div_table_cam_cc_pll4_out_even,
H A Dcamcc-kaanapali.c88 .post_div_table = post_div_table_cam_cc_pll0_out_even,
111 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
164 .post_div_table = post_div_table_cam_cc_pll1_out_even,
217 .post_div_table = post_div_table_cam_cc_pll2_out_even,
270 .post_div_table = post_div_table_cam_cc_pll3_out_even,
323 .post_div_table = post_div_table_cam_cc_pll4_out_even,
376 .post_div_table = post_div_table_cam_cc_pll5_out_even,
429 .post_div_table = post_div_table_cam_cc_pll6_out_even,
452 .post_div_table = post_div_table_cam_cc_pll6_out_odd,
505 .post_div_table = post_div_table_cam_cc_pll7_out_even,
H A Dcamcc-sm8650.c97 .post_div_table = post_div_table_cam_cc_pll0_out_even,
120 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
175 .post_div_table = post_div_table_cam_cc_pll1_out_even,
258 .post_div_table = post_div_table_cam_cc_pll3_out_even,
313 .post_div_table = post_div_table_cam_cc_pll4_out_even,
368 .post_div_table = post_div_table_cam_cc_pll5_out_even,
423 .post_div_table = post_div_table_cam_cc_pll6_out_even,
478 .post_div_table = post_div_table_cam_cc_pll7_out_even,
533 .post_div_table = post_div_table_cam_cc_pll8_out_even,
588 .post_div_table = post_div_table_cam_cc_pll9_out_even,
[all …]
H A Dgpucc-sm6115.c89 .post_div_table = post_div_table_gpu_cc_pll0_out_aux2,
144 .post_div_table = post_div_table_gpu_cc_pll1_out_aux,
H A Dcamcc-sm8750.c84 .post_div_table = post_div_table_cam_cc_pll0_out_even,
107 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
158 .post_div_table = post_div_table_cam_cc_pll1_out_even,
209 .post_div_table = post_div_table_cam_cc_pll2_out_even,
260 .post_div_table = post_div_table_cam_cc_pll3_out_even,
311 .post_div_table = post_div_table_cam_cc_pll4_out_even,
362 .post_div_table = post_div_table_cam_cc_pll5_out_even,
413 .post_div_table = post_div_table_cam_cc_pll6_out_even,
436 .post_div_table = post_div_table_cam_cc_pll6_out_odd,
H A Dcamcc-milos.c104 .post_div_table = post_div_table_cam_cc_pll0_out_even,
127 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
183 .post_div_table = post_div_table_cam_cc_pll1_out_even,
268 .post_div_table = post_div_table_cam_cc_pll3_out_even,
324 .post_div_table = post_div_table_cam_cc_pll4_out_even,
380 .post_div_table = post_div_table_cam_cc_pll5_out_even,
436 .post_div_table = post_div_table_cam_cc_pll6_out_even,
H A Dlpassaudiocc-sc7280.c106 .post_div_table = post_div_table_lpass_audio_cc_pll_out_aux2,
161 .post_div_table = post_div_table_lpass_aon_cc_pll_out_even,
183 .post_div_table = post_div_table_lpass_aon_cc_pll_out_odd,
H A Dcamcc-sm8450.c120 .post_div_table = post_div_table_cam_cc_pll0_out_even,
153 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
226 .post_div_table = post_div_table_cam_cc_pll1_out_even,
333 .post_div_table = post_div_table_cam_cc_pll3_out_even,
406 .post_div_table = post_div_table_cam_cc_pll4_out_even,
479 .post_div_table = post_div_table_cam_cc_pll5_out_even,
552 .post_div_table = post_div_table_cam_cc_pll6_out_even,
625 .post_div_table = post_div_table_cam_cc_pll7_out_even,
698 .post_div_table = post_div_table_cam_cc_pll8_out_even,
H A Dcamcc-sc8280xp.c93 .post_div_table = post_div_table_camcc_pll0_out_even,
115 .post_div_table = post_div_table_camcc_pll0_out_odd,
168 .post_div_table = post_div_table_camcc_pll1_out_even,
246 .post_div_table = post_div_table_camcc_pll3_out_even,
299 .post_div_table = post_div_table_camcc_pll4_out_even,
352 .post_div_table = post_div_table_camcc_pll5_out_even,
405 .post_div_table = post_div_table_camcc_pll6_out_even,
458 .post_div_table = post_div_table_camcc_pll7_out_even,
480 .post_div_table = post_div_table_camcc_pll7_out_odd,
H A Dcamcc-sm8150.c88 .post_div_table = post_div_table_cam_cc_pll0_out_even,
111 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
165 .post_div_table = post_div_table_cam_cc_pll1_out_even,
219 .post_div_table = post_div_table_cam_cc_pll2_out_main,
273 .post_div_table = post_div_table_cam_cc_pll3_out_even,
327 .post_div_table = post_div_table_cam_cc_pll4_out_even,
H A Dcamcc-glymur.c88 .post_div_table = post_div_table_cam_cc_pll0_out_even,
111 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
163 .post_div_table = post_div_table_cam_cc_pll1_out_even,
243 .post_div_table = post_div_table_cam_cc_pll3_out_even,
295 .post_div_table = post_div_table_cam_cc_pll4_out_even,
347 .post_div_table = post_div_table_cam_cc_pll5_out_even,
H A Dcamcc-x1e80100.c92 .post_div_table = post_div_table_cam_cc_pll0_out_even,
115 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
170 .post_div_table = post_div_table_cam_cc_pll1_out_even,
253 .post_div_table = post_div_table_cam_cc_pll3_out_even,
308 .post_div_table = post_div_table_cam_cc_pll4_out_even,
363 .post_div_table = post_div_table_cam_cc_pll6_out_even,
418 .post_div_table = post_div_table_cam_cc_pll8_out_even,
H A Dgcc-sm6115.c84 .post_div_table = post_div_table_gpll0_out_aux2,
104 .post_div_table = post_div_table_gpll0_out_main,
154 .post_div_table = post_div_table_gpll10_out_main,
208 .post_div_table = post_div_table_gpll11_out_main,
267 .post_div_table = post_div_table_gpll4_out_main,
306 .post_div_table = post_div_table_gpll6_out_main,
345 .post_div_table = post_div_table_gpll7_out_main,
402 .post_div_table = post_div_table_gpll8_out_main,
454 .post_div_table = post_div_table_gpll9_out_main,
H A Dmmcc-msm8998.c74 .post_div_table = post_div_table_fabia_even,
106 .post_div_table = post_div_table_fabia_even,
134 .post_div_table = post_div_table_fabia_even,
162 .post_div_table = post_div_table_fabia_even,
190 .post_div_table = post_div_table_fabia_even,
218 .post_div_table = post_div_table_fabia_even,
246 .post_div_table = post_div_table_fabia_even,
274 .post_div_table = post_div_table_fabia_even,
H A Dcamcc-sa8775p.c89 .post_div_table = post_div_table_cam_cc_pll0_out_even,
112 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
189 .post_div_table = post_div_table_cam_cc_pll3_out_even,
239 .post_div_table = post_div_table_cam_cc_pll4_out_even,
289 .post_div_table = post_div_table_cam_cc_pll5_out_even,
H A Dcamcc-sm8250.c78 .post_div_table = post_div_table_cam_cc_pll0_out_even,
101 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
152 .post_div_table = post_div_table_cam_cc_pll1_out_even,
203 .post_div_table = post_div_table_cam_cc_pll2_out_main,
254 .post_div_table = post_div_table_cam_cc_pll3_out_even,
305 .post_div_table = post_div_table_cam_cc_pll4_out_even,
H A Dclk-alpha-pll.h129 const struct clk_div_table *post_div_table; member
H A Dcamcc-x1p42100.c91 .post_div_table = post_div_table_cam_cc_pll0_out_even,
114 .post_div_table = post_div_table_cam_cc_pll0_out_odd,
170 .post_div_table = post_div_table_cam_cc_pll1_out_even,
255 .post_div_table = post_div_table_cam_cc_pll3_out_even,
311 .post_div_table = post_div_table_cam_cc_pll6_out_even,
H A Dcamcc-sdm845.c52 .post_div_table = post_div_table_fabia_even,
84 .post_div_table = post_div_table_fabia_even,
116 .post_div_table = post_div_table_fabia_even,
148 .post_div_table = post_div_table_fabia_even,
/linux/drivers/clk/imx/
H A Dclk-imx6sl.c80 static const struct clk_div_table post_div_table[] = { variable
266 …v", "pll4_audio", CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6sl_clocks_init()
268 …v", "pll5_video", CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock… in imx6sl_clocks_init()
H A Dclk-imx6sll.c59 static const struct clk_div_table post_div_table[] = { variable
175 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
179 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sll_clocks_init()
H A Dclk-imx6ul.c83 static const struct clk_div_table post_div_table[] = { variable
232 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
236 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6ul_clocks_init()
H A Dclk-imx6sx.c96 static const struct clk_div_table post_div_table[] = { variable
248 CLK_SET_RATE_PARENT, base + 0x70, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sx_clocks_init()
252 CLK_SET_RATE_PARENT, base + 0xa0, 19, 2, 0, post_div_table, &imx_ccm_lock); in imx6sx_clocks_init()

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