| /linux/Documentation/admin-guide/hw-vuln/ |
| H A D | indirect-target-selection.rst | 3 Indirect Target Selection (ITS) 6 ITS is a vulnerability in some Intel CPUs that support Enhanced IBRS and were 7 released before Alder Lake. ITS may allow an attacker to control the prediction 10 ITS is assigned CVE-2024-28956 with a CVSS score of 4.7 (Medium). 28 Below is the list of ITS affected CPUs [#f2]_ [#f3]_: 48 - IBPB isolation is affected on all ITS affected CPUs, and need a microcode 53 - Intel Atom CPUs are not affected by ITS. 58 in the lower half of the cacheline are vulnerable to ITS, the basic idea behind 62 compilers. ITS-vulnerable retpoline sites are runtime patched to point to newly 63 added ITS-safe thunks. These safe thunks consists of indirect branch in the [all …]
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| H A D | vmscape.rst | 20 - Cascade Lake generation - (Parts affected by ITS guest/host separation)
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| H A D | attack_vector_controls.rst | 205 ITS X X
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| /linux/arch/x86/kernel/cpu/ |
| H A D | common.c | 1276 #define ITS BIT(8) 1298 VULNBL_INTEL_STEPS(INTEL_SKYLAKE_X, X86_STEP_MAX, MMIO | RETBLEED | GDS | ITS | VMSCAPE), 1302 VULNBL_INTEL_STEPS(INTEL_KABYLAKE_L, X86_STEP_MAX, MMIO | RETBLEED | GDS | SRBDS | ITS | VMSCAPE), 1304 VULNBL_INTEL_STEPS(INTEL_KABYLAKE, X86_STEP_MAX, MMIO | RETBLEED | GDS | SRBDS | ITS | VMSCAPE), 1306 VULNBL_INTEL_STEPS(INTEL_ICELAKE_L, X86_STEP_MAX, MMIO | MMIO_SBDS | RETBLEED | GDS | ITS | ITS_NATIVE_ONLY), 1307 VULNBL_INTEL_STEPS(INTEL_ICELAKE_D, X86_STEP_MAX, MMIO | GDS | ITS | ITS_NATIVE_ONLY), 1308 VULNBL_INTEL_STEPS(INTEL_ICELAKE_X, X86_STEP_MAX, MMIO | GDS | ITS | ITS_NATIVE_ONLY), 1309 VULNBL_INTEL_STEPS(INTEL_COMETLAKE, X86_STEP_MAX, MMIO | MMIO_SBDS | RETBLEED | GDS | ITS | VMSCAPE), 1310 VULNBL_INTEL_STEPS(INTEL_COMETLAKE_L, 0x0, MMIO | RETBLEED | ITS | VMSCAPE), 1311 VULNBL_INTEL_STEPS(INTEL_COMETLAKE_L, X86_STEP_MAX, MMIO | MMIO_SBDS | RETBLEED | GDS | ITS | VMSCAP 1279 #define ITS global() macro [all...] |
| /linux/arch/mips/alchemy/ |
| H A D | Platform | 26 # Trapeze ITS GRP board
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| /linux/Documentation/arch/arm64/ |
| H A D | silicon-errata.rst | 294 | Cavium | ThunderX ITS | #22375, | CAVIUM_ERRATUM_22375 | 297 | Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 | 361 | Qualcomm Tech. | QDF2400 ITS | E0065 | QCOM_QDF2400_ERRATUM_0065 |
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| H A D | acpi_object_usage.rst | 244 when using GICv3-ITS and an SMMU); on SBSA Level 0 platforms, it
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| /linux/Documentation/translations/zh_CN/arch/arm64/ |
| H A D | silicon-errata.txt | 73 | Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
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| /linux/Documentation/translations/zh_TW/arch/arm64/ |
| H A D | silicon-errata.txt | 77 | Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
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| /linux/Documentation/virt/kvm/devices/ |
| H A D | arm-vgic.rst | 18 device and guest ITS devices, see arm-vgic-v3.txt. It is not possible to 146 request the initialization of the VGIC or ITS, no additional parameter
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| /linux/Documentation/tee/ |
| H A D | ts-tee.rst | 21 protocol. A TS SP can host one or more services (e.g. PSA Crypto, PSA ITS, etc).
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| /linux/arch/mips/boot/compressed/ |
| H A D | Makefile | 188 quiet_cmd_cpp_its_S = ITS $@
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| /linux/arch/arm64/boot/dts/amd/ |
| H A D | elba.dtsi | 159 * Elba specific pre-ITS is enabled using the
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| /linux/Documentation/arch/arm/nwfpe/ |
| H A D | nwfpe.rst | 73 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
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| /linux/arch/m68k/fpsp040/ |
| H A D | satan.S | 291 |--WHILE THE DIVISION IS TAKING ITS TIME, WE FETCH ATAN(|F|)
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| /linux/arch/arm/nwfpe/ |
| H A D | softfloat-specialize | 22 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
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| H A D | softfloat-macros | 22 AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
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| /linux/Documentation/admin-guide/perf/ |
| H A D | hisi-pmu.rst | 131 8. int_id: ITS PMU supports filtering by interrupt id, which is defined by
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| /linux/Documentation/scsi/ |
| H A D | FlashPoint.rst | 13 MYLEX INTRODUCES LINUX OPERATING SYSTEM SUPPORT FOR ITS
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| /linux/arch/arm64/ |
| H A D | Kconfig | 1257 with a small impact affecting only ITS table allocation. 1262 The fixes are in ITS initialization and basically ignore memory access 1268 bool "Cavium erratum 23144: ITS SYNC hang on dual socket system" 1272 ITS SYNC command hang for cross node io and collections/cpu mapping. 1353 when issued ITS commands such as VMOVP and VMAPP, and requires 1411 On Qualcomm Datacenter Technologies QDF2400 SoC, ITS hardware reports 1468 so the ITS cannot access memory above 4GB. 1523 bool "Socionext Synquacer: Workaround for GICv3 pre-ITS"
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| /linux/Documentation/PCI/endpoint/ |
| H A D | pci-ntb-function.rst | 184 using GIC ITS will have the same MSI-X address for all the interrupts.
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| /linux/Documentation/virt/hyperv/ |
| H A D | vpci.rst | 210 arm64 guest VMs because it does not emulate a GICv3 ITS.
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| /linux/arch/x86/ |
| H A D | Kconfig | 2675 Enable Indirect Target Selection (ITS) mitigation. ITS is a bug in
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| /linux/Documentation/admin-guide/ |
| H A D | kernel-parameters.txt | 2407 Target Selection(ITS) bug in Intel CPUs. Updated 2412 force: Force the ITS bug and deploy default 2415 guest/host isolation part of ITS.
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| /linux/arch/m68k/ifpsp060/src/ |
| H A D | fpsp.S | 6397 #--WHILE THE DIVISION IS TAKING ITS TIME, WE FETCH ATAN(|F|)
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