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Searched refs:SDValue (Results 1 – 25 of 160) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypes.h93 SmallDenseMap<SDValue, TableId, 8> ValueToIdMap;
94 SmallDenseMap<TableId, SDValue, 8> IdToValueMap;
140 TableId getTableId(SDValue V) { in getTableId()
159 const SDValue &getSDValue(TableId &Id) { in getSDValue()
181 TableId NewId = getTableId(SDValue(New, i)); in NoteDeletion()
182 TableId OldId = getTableId(SDValue(Old, i)); in NoteDeletion()
202 ValueToIdMap.erase(SDValue(Old, i)); in NoteDeletion()
210 void AnalyzeNewValue(SDValue &Val);
213 void RemapValue(SDValue &V);
216 SDValue BitConvertToInteger(SDValue Op);
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.h26 static inline bool getConstantValue(SDValue N, uint32_t &Out) { in getConstantValue()
92 std::pair<SDValue, SDValue> foldFrameIndex(SDValue N) const;
112 bool isBaseWithConstantOffset64(SDValue Addr, SDValue &LHS,
113 SDValue &RHS) const;
117 SDNode *glueCopyToOp(SDNode *N, SDValue NewChain, SDValue Glue) const;
118 SDNode *glueCopyToM0(SDNode *N, SDValue Val) const;
122 virtual bool SelectADDRVTX_READ(SDValue Addr, SDValue &Base, SDValue &Offset);
123 virtual bool SelectADDRIndirect(SDValue Addr, SDValue &Base, SDValue &Offset);
124 bool isDSOffsetLegal(SDValue Base, unsigned Offset) const;
125 bool isDSOffset2Legal(SDValue Base, unsigned Offset0, unsigned Offset1,
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H A DSIISelLowering.h48 SDValue lowerKernArgParameterPtr(SelectionDAG &DAG, const SDLoc &SL,
49 SDValue Chain, uint64_t Offset) const;
50 SDValue getImplicitArgPtr(SelectionDAG &DAG, const SDLoc &SL) const;
51 SDValue getLDSKernelId(SelectionDAG &DAG, const SDLoc &SL) const;
52 SDValue lowerKernargMemParameter(SelectionDAG &DAG, EVT VT, EVT MemVT,
53 const SDLoc &SL, SDValue Chain,
57 SDValue loadImplicitKernelArgument(SelectionDAG &DAG, MVT VT, const SDLoc &DL,
61 SDValue lowerStackParameter(SelectionDAG &DAG, CCValAssign &VA,
62 const SDLoc &SL, SDValue Chain,
64 SDValue getPreloadedValue(SelectionDAG &DAG,
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H A DAMDGPUISelLowering.h35 SDValue getFFBX_U32(SelectionDAG &DAG, SDValue Op, const SDLoc &DL, unsigned Opc) const;
41 static unsigned numBitsUnsigned(SDValue Op, SelectionDAG &DAG);
46 static unsigned numBitsSigned(SDValue Op, SelectionDAG &DAG);
49 SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
54 SDValue LowerFREM(SDValue Op, SelectionDAG &DAG) const;
55 SDValue LowerFCEIL(SDValue Op, SelectionDAG &DAG) const;
56 SDValue LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const;
57 SDValue LowerFRINT(SDValue Op, SelectionDAG &DAG) const;
58 SDValue LowerFNEARBYINT(SDValue Op, SelectionDAG &DAG) const;
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H A DR600ISelLowering.h35 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
36 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
38 SmallVectorImpl<SDValue> &Results,
41 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
45 SmallVectorImpl<SDValue> &InVals) const override;
72 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT, const SDLoc &DL,
77 SDValue OptimizeSwizzle(SDValue BuildVector, SDValue Swz[],
79 SDValue vectorToVerticalVector(SelectionDAG &DAG, SDValue Vector) const;
81 SDValue lowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
82 SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h139 bool IsEligibleForTailCallOptimization(SDValue Callee,
142 const SmallVectorImpl<SDValue> &OutVals,
156 bool hasBitTest(SDValue X, SDValue Y) const override;
173 bool isTargetCanonicalConstantNode(SDValue Op) const override;
179 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
180 void LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results,
182 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
190 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
191 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
192 SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h69 bool isReassocProfitable(SelectionDAG &DAG, SDValue N0,
70 SDValue N1) const override;
80 void computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known,
85 unsigned ComputeNumSignBitsForTargetNode(SDValue Op,
111 bool targetShrinkDemandedConstant(SDValue Op, const APInt &DemandedBits,
130 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
132 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
156 SDValue ReconstructShuffle(SDValue Op, SelectionDAG &DAG) const;
196 bool shouldRemoveRedundantExtend(SDValue Op) const override;
205 bool isZExtFree(SDValue Val, EVT VT2) const override;
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h267 SDValue Root;
446 void createOperands(SDNode *Node, ArrayRef<SDValue> Vals);
582 const SDValue &getRoot() const { return Root; }
585 SDValue getEntryNode() const {
586 return SDValue(const_cast<SDNode *>(&EntryNode), 0);
591 const SDValue &setRoot(SDValue N) {
687 LLVM_ABI SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT,
689 LLVM_ABI SDValue getConstant(const APInt &Val, const SDLoc &DL, EVT VT,
692 LLVM_ABI SDValue getSignedConstant(int64_t Val, const SDLoc &DL, EVT VT,
696 LLVM_ABI SDValue getAllOnesConstant(const SDLoc &DL, EVT VT,
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H A DSelectionDAGTargetInfo.h75 virtual SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, in EmitTargetCodeForMemcpy()
76 SDValue Chain, SDValue Op1, in EmitTargetCodeForMemcpy()
77 SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcpy()
82 return SDValue(); in EmitTargetCodeForMemcpy()
91 virtual SDValue EmitTargetCodeForMemmove( in EmitTargetCodeForMemmove()
92 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, in EmitTargetCodeForMemmove()
93 SDValue Op2, SDValue Op3, Align Alignment, bool isVolatile, in EmitTargetCodeForMemmove()
95 return SDValue(); in EmitTargetCodeForMemmove()
105 virtual SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, in EmitTargetCodeForMemset()
106 SDValue Chain, SDValue Op1, in EmitTargetCodeForMemset()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.h33 MCRegister getMSACtrlReg(const SDValue RegIdx) const;
43 bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const;
44 bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset,
48 bool selectAddrRegImm(SDValue Addr, SDValue &Base,
49 SDValue &Offset) const override;
51 bool selectAddrDefault(SDValue Addr, SDValue &Base,
52 SDValue &Offset) const override;
54 bool selectIntAddr(SDValue Addr, SDValue &Base,
55 SDValue &Offset) const override;
57 bool selectAddrRegImm9(SDValue Addr, SDValue &Base,
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H A DMipsISelDAGToDAG.h53 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base,
54 SDValue &Offset) const;
57 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base,
58 SDValue &Offset) const;
61 virtual bool selectIntAddr(SDValue Addr, SDValue &Base,
62 SDValue &Offset) const;
64 virtual bool selectIntAddr11MM(SDValue Addr, SDValue &Base,
65 SDValue &Offset) const;
67 virtual bool selectIntAddr12MM(SDValue Addr, SDValue &Base,
68 SDValue &Offset) const;
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVECustomDAG.h36 bool isMaskArithmetic(SDValue Op);
44 bool maySafelyIgnoreMask(SDValue Op);
77 bool isLegalAVL(SDValue AVL);
80 SDValue getNodeAVL(SDValue);
85 SDValue getNodeMask(SDValue);
89 std::pair<SDValue, bool> getAnnotatedNodeAVL(SDValue);
97 SDValue getLoadStoreStride(SDValue Op, VECustomDAG &CDAG);
99 SDValue getMemoryPtr(SDValue Op);
101 SDValue getNodeChain(SDValue Op);
103 SDValue getStoredValue(SDValue Op);
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H A DVEISelLowering.h182 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
186 SmallVectorImpl<SDValue> &InVals) const override;
188 SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI,
189 SmallVectorImpl<SDValue> &InVals) const override;
196 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
198 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
220 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
226 SDValue getPICJumpTableRelocBase(SDValue Table,
231 SDValue lowerATOMIC_FENCE(SDValue Op, SelectionDAG &DAG) const;
232 SDValue lowerATOMIC_SWAP(SDValue Op, SelectionDAG &DAG) const;
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.h44 bool SelectInlineAsmMemoryOperand(const SDValue &Op,
46 std::vector<SDValue> &OutOps) override;
48 bool SelectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset);
49 bool SelectAddrRegImm(SDValue Addr, SDValue &Base, SDValue &Offset);
50 bool SelectAddrRegImm9(SDValue Addr, SDValue &Base, SDValue &Offset);
51 bool SelectAddrRegImmLsb00000(SDValue Addr, SDValue &Base, SDValue &Offset);
53 bool SelectAddrRegRegScale(SDValue Addr, unsigned MaxShiftAmount,
54 SDValue &Base, SDValue &Index, SDValue &Scale);
57 bool SelectAddrRegRegScale(SDValue Addr, SDValue &Base, SDValue &Index, in SelectAddrRegRegScale()
58 SDValue &Scale) { in SelectAddrRegRegScale()
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H A DRISCVISelLowering.h48 bool isTruncateFree(SDValue Val, EVT VT2) const override;
49 bool isZExtFree(SDValue Val, EVT VT2) const override;
55 bool hasAndNotCompare(SDValue Y) const override;
56 bool hasAndNot(SDValue Y) const override;
57 bool hasBitTest(SDValue X, SDValue Y) const override;
59 SDValue X, ConstantSDNode *XC, ConstantSDNode *CC, SDValue Y,
62 bool shouldScalarizeBinop(SDValue VecOp) const override;
99 unsigned SelectOpcode, SDValue X,
100 SDValue Y) const override;
137 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h710 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
831 bool hasAndNotCompare(SDValue) const override { in hasAndNotCompare() argument
841 SDValue getNegatedExpression(SDValue Op, SelectionDAG &DAG, bool LegalOps,
857 bool getPreIndexedAddressParts(SDNode *N, SDValue &Base,
858 SDValue &Offset,
864 bool SelectAddressEVXRegReg(SDValue N, SDValue &Base, SDValue &Index,
871 bool SelectAddressRegReg(SDValue N, SDValue &Base, SDValue &Index,
880 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base,
883 bool SelectAddressRegImm34(SDValue N, SDValue &Disp, SDValue &Base,
888 bool SelectAddressRegRegOnly(SDValue N, SDValue &Base, SDValue &Index,
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h542 void LowerAsmOperandForConstraint(SDValue Op, StringRef Constraint,
543 std::vector<SDValue> &Ops,
601 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
602 void LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results,
604 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
610 SelectionDAG & DAG, const SDLoc &DL, SDValue Val, SDValue *Parts,
613 SDValue joinRegisterPartsIntoValue(
614 SelectionDAG & DAG, const SDLoc &DL, const SDValue *Parts,
617 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
621 SmallVectorImpl<SDValue> &InVals) const override;
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H A DSystemZSelectionDAGInfo.h28 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &DL,
29 SDValue Chain, SDValue Dst, SDValue Src,
30 SDValue Size, Align Alignment,
35 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &DL,
36 SDValue Chain, SDValue Dst, SDValue Byte,
37 SDValue Size, Align Alignment,
41 std::pair<SDValue, SDValue>
42 EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
43 SDValue Src1, SDValue Src2, SDValue Size,
47 std::pair<SDValue, SDValue>
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/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h36 bool isZExtFree(SDValue Val, EVT VT2) const override;
45 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
50 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
80 SDValue LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv,
84 SmallVectorImpl<SDValue> &InVals) const;
85 SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
89 const SmallVectorImpl<SDValue> &OutVals,
92 SmallVectorImpl<SDValue> &InVals) const;
93 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
94 SDValue getGlobalAddressWrapper(SDValue GA, const GlobalValue *GV,
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.h64 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
77 SDValue getPICJumpTableRelocBase(SDValue Table,
93 void LowerAsmOperandForConstraint(SDValue Op, StringRef Constraint,
94 std::vector<SDValue> &Ops,
137 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
141 SDValue EmitTailCallLoadRetAddr(SelectionDAG &DAG, SDValue &OutRetAddr,
142 SDValue Chain, bool IsTailCall, int FPDiff,
147 SDValue EmitTailCallStoreRetAddr(SelectionDAG &DAG, MachineFunction &MF,
148 SDValue Chain, SDValue RetAddrFrIdx,
152 SDValue LowerMemArgument(SDValue Chain, CallingConv::ID CallConv,
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h31 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
33 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
34 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
35 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
36 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
39 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
40 SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) const;
41 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.h51 bool shouldScalarizeBinop(SDValue VecOp) const override;
71 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
79 void computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known,
87 SDValue LowerCall(CallLoweringInfo &CLI,
88 SmallVectorImpl<SDValue> &InVals) const override;
94 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
96 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
98 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
102 SmallVectorImpl<SDValue> &InVals) const override;
104 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.h106 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
166 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
170 SmallVectorImpl<SDValue> &InVals) const override;
172 SDValue LowerCall(CallLoweringInfo &CLI,
173 SmallVectorImpl<SDValue> &InVals) const override;
175 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
176 SDValue LowerSTACKSAVE(SDValue Op, SelectionDAG &DAG) const;
177 SDValue LowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG) const;
184 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
186 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.h196 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
197 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
200 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
206 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
210 SmallVectorImpl<SDValue> &InVals) const override;
215 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
217 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
219 SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI,
220 SmallVectorImpl<SDValue> &InVals) const override;
223 bool hasAndNot(SDValue Y) const override;
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.h123 void LowerAsmOperandForConstraint(SDValue Op, StringRef Constraint,
124 std::vector<SDValue> &Ops,
127 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
129 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
133 SmallVectorImpl<SDValue> &InVals) const override;
135 SDValue LowerCall(CallLoweringInfo &CLI,
136 SmallVectorImpl<SDValue> &InVals) const override;
143 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
145 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
149 SDValue C) const override;
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