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/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/hsi_repository/
H A Decore_hsi_debug_tools.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
268 * Attention block per-type data
284 …struct dbg_attn_block_type_data per_type_data[2] /* attention block per-type data. Count must matc…
294 #define DBG_ATTN_REG_RESULT_STS_ADDRESS_MASK 0xFFFFFF /* STS attention register GRC address (in d…
298 …ntions within the blocks attentions list (a value in the range 0..number of block attentions-1) */;
339 …ntions within the blocks attentions list (a value in the range 0..number of block attentions-1) */;
341 #define DBG_ATTN_REG_STS_ADDRESS_MASK 0xFFFFFF /* STS attention register GRC address (in dwords) …
345 __le32 sts_clr_address /* STS_CLR attention register GRC address (in dwords) */;
[all …]
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/
H A Decore_hsi_debug_tools.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
268 * Attention block per-type data
284 …struct dbg_attn_block_type_data per_type_data[2] /* attention block per-type data. Count must matc…
294 #define DBG_ATTN_REG_RESULT_STS_ADDRESS_MASK 0xFFFFFF /* STS attention register GRC address (in d…
298 …ntions within the blocks attentions list (a value in the range 0..number of block attentions-1) */;
339 …ntions within the blocks attentions list (a value in the range 0..number of block attentions-1) */;
341 #define DBG_ATTN_REG_STS_ADDRESS_MASK 0xFFFFFF /* STS attention register GRC address (in dwords) …
345 __le32 sts_clr_address /* STS_CLR attention register GRC address (in dwords) */;
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H A Decore_dbg_fw_funcs.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
41 * @brief ecore_dbg_set_bin_ptr - Sets a pointer to the binary data with debug
44 * @param bin_ptr - a pointer to the binary data with debug arrays.
49 * @brief ecore_dbg_set_app_ver - Sets the version of the calling app.
55 * - the specified app version is not supported
61 * @brief ecore_dbg_get_fw_func_ver - Returns the FW func version.
68 * @brief ecore_dbg_get_chip_id - Returns the FW func version.
70 * @param p_hwfn - HW device data
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/illumos-gate/usr/src/man/man1/
H A Dkmdb.18 kmdb \- in situ kernel debugger
10 .SS "Boot-time Loading"
14 \fBok boot\fR [\fIdevice-specifier\fR] \fB-k\fR [\fB-d\fR] [\fIboot-flags\fR]
19 \fBok boot\fR [\fIdevice-specifier\fR] kmdb [\fB-d\fR] [\fIboot-flags\fR]
27 \fBkernel$\fR \fB/platform/i86pc/kernel/$ISADIR/unix\fR \fB-k\fR [\fB-d\fR] [\fIboot-flags\fR]
32 \fBmdb\fR \fB-K\fR
51 \fBBoot-time Loading\fR
55 to the transfer of control to the kernel. If the \fB-d\fR flag is used, the
57 function in the 'unix' object. If \fB-d\fR is not used, \fBkmdb\fR is loaded
62 Boot-loaded \fBkmdb\fR can be unloaded only by means of a system reboot.
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/illumos-gate/usr/src/uts/sparc/ml/
H A Dfd_asm.S54 #define Adr %l5 /* data address pointer */
57 #define TRIGGER 0x33 macro
59 save %sp, -SA(MINFRAME), %sp
74 tst Tmp2 ! non-zero?
101 ! read/write/format data-xfer case - they have a result phase
106 ! XXX- test for null raddr
138 ! END OF TRANSFER - if read/write, toggle the TC
188 ! recalibrate/seek - no result phase, must do sense interrupt status.
211 ! fdc->c_csb.csb_rslt[0] = *fifo;
220 ! fdc->c_csb.csb_rslt[1] = *fifo;
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/illumos-gate/usr/src/cmd/acpi/common/
H A Ddmtbinfo2.c3 * Module Name: dmtbinfo2 - Table info for non-AML tables
11 * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
108 * any of its subsidiaries will export/re-export any technical data, process,
130 * 3. Neither the names of the above-listed copyright holders nor the names
157 /* This module used for application-level code only */
165 * - Add the C table definition to the actbl1.h or actbl2.h header.
166 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below.
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H A Ddmtbinfo1.c3 * Module Name: dmtbinfo1 - Table info for non-AML tables
11 * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
108 * any of its subsidiaries will export/re-export any technical data, process,
130 * 3. Neither the names of the above-listed copyright holders nor the names
157 /* This module used for application-level code only */
165 * - Add the C table definition to the actbl1.h or actbl2.h header.
166 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below.
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/illumos-gate/usr/src/uts/common/io/ena/
H A Dena_hw.c22 caddr_t addr = ena->ena_reg_base + offset; in ena_hw_bar_read32()
29 VERIFY3U(addr, >=, ena->ena_reg_base); in ena_hw_abs_read32()
30 VERIFY3U(addr, <, ena->ena_reg_base + (ena->ena_reg_size - 4)); in ena_hw_abs_read32()
32 return (ddi_get32(ena->ena_reg_hdl, addr)); in ena_hw_abs_read32()
38 caddr_t addr = ena->ena_reg_base + offset; in ena_hw_bar_write32()
47 VERIFY3U(addr, >=, ena->ena_reg_base); in ena_hw_abs_write32()
48 VERIFY3U(addr, <, ena->ena_reg_base + (ena->ena_reg_size - 4)); in ena_hw_abs_write32()
50 ddi_put32(ena->ena_reg_hdl, addr, val); in ena_hw_abs_write32()
102 return ("keep-alive timeout"); in enahw_reset_reason()
118 return ("OS trigger"); in enahw_reset_reason()
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/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Dpic8259.c16 /* Install a handler for the specified IRQ. Address of previous
21 * picks up its chain-to address.
35 previous_handler->segment = irq_vector->segment; in install_irq_handler()
36 previous_handler->offset = irq_vector->offset; in install_irq_handler()
39 handler->segment, handler->offset, irq, in install_irq_handler()
42 previous_handler->segment, previous_handler->offset ); in install_irq_handler()
43 irq_vector->segment = handler->segment; in install_irq_handler()
44 irq_vector->offset = handler->offset; in install_irq_handler()
64 if ( ( irq_vector->segment != handler->segment ) || in remove_irq_handler()
65 ( irq_vector->offset != handler->offset ) ) { in remove_irq_handler()
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/illumos-gate/usr/src/uts/common/sys/
H A Dasy.h47 #define ASY_BUS_UNKNOWN (-1)
109 ASY_TTL, /* Transmitter Trigger Level (R/W) */
110 ASY_RTL, /* Receiver Trigger Level (R/W) */
111 ASY_FCL, /* Flow Control Low-Level (R/W) */
112 ASY_FCH, /* Flow Control High-Level (R/W) */
118 ASY_NMR, /* Nine-Bit Mode Register (R/W) */
124 * INTEL 8210-A/B & 16450/16550 Registers Structure.
140 #define ASY_FCR_THR_TR0 0x10 /* transmitter trigger level bit 0 (16650) */
141 #define ASY_FCR_THR_TR1 0x20 /* transmitter trigger level bit 1 (16650) */
143 #define ASY_FCR_RHR_TR0 0x40 /* receiver trigger level bit 0 */
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H A Dddi_intr.h83 #define DDI_INTR_FLAG_LEVEL 0x0001 /* (RW) level trigger */
105 #define DDI_INTR_ALLOC_NORMAL 0 /* Non-strict alloc */
222 * Return non-zero if the specified interrupt exists and the handler
247 * information for non-self identifying devices. If only one interrupt
261 * The interrupt handler "int_handler" is the address of the routine
311 * Like ddi_add_intr, only for system interrupts that you can trigger
313 * want. You get an identifier back which you can use to either trigger
/illumos-gate/usr/src/contrib/bhyve/dev/ic/
H A Di8259.h1 /*-
26 * $FreeBSD: head/sys/dev/ic/i8259.h 151580 2005-10-23 09:05:51Z glebius $
36 /* Initialization control word 1. Written to even address. */
40 #define ICW1_LTIM 0x08 /* 1 = level trigger, 0 = edge */
42 /* 0x20 - 0x80 - in 8080/8085 mode only */
44 /* Initialization control word 2. Written to the odd address. */
47 /* Initialization control word 3. Written to the odd address. */
51 /* Initialization control word 4. Written to the odd address. */
62 * No definitions. Written to the odd address. Bitmask for interrupts.
66 /* Operation control word type 2. Bit 3 (0x08) must be zero. Even address. */
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/illumos-gate/usr/src/cmd/cmd-inet/usr.lib/in.mpathd/
H A Dmpd_defs.h113 /* trigger NIC failure detection */
115 /* trigger NIC repair detection */
137 * address. To give them time to configure a test address, we delay whining
164 #define GET_RANDOM(LOW, HIGH) (random() % ((HIGH) - (LOW) + 1) + (LOW))
169 * Comparing unsigned 32 bit time values in a circular 32-bit sequence space
171 #define TIME_GE(a, b) ((int32_t)((a) - (b)) >= 0)
172 #define TIME_GT(a, b) ((int32_t)((a) - (b)) > 0)
173 #define TIME_LT(a, b) ((int32_t)((a) - (b)) < 0)
174 #define TIME_LE(a, b) ((int32_t)((a) - (b)) <= 0)
177 * Comparing unsigned 16 bit sequence numbers in a circular 16-bit
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/illumos-gate/usr/src/uts/common/io/ib/adapters/hermon/
H A Dhermon_fm.c41 * .---->*
49 * `--< a HW error detected && retry count < 3 >
98 static char *fm_cap = "fm-capable"; /* FM capability */
151 state->hs_fm_hca_fm = hca_fm; in hermon_hca_fm_init()
175 i_hca_fm_fini((struct i_hca_fm *)state->hs_fm_hca_fm); in hermon_hca_fm_fini()
176 state->hs_fm_hca_fm = NULL; in hermon_hca_fm_fini()
191 * HCA_PIO_FM PIO is fma-protected
192 * HCA_DMA_FM DMA is fma-protected
210 state->hs_fm_state &= ~fm_state; in hermon_clr_state_nolock()
226 * HCA_PIO_FM PIO is fma-protected
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/illumos-gate/usr/src/man/man4d/
H A Dibd.4d8 ibd \- Infiniband IPoIB device driver
21 The \fBibd\fR driver is a multi-threaded, loadable, clonable, STREAMS hardware
29 Use the cloning, character-special device \fB/dev/ibd\fR to access all
45 address 255.255.255.255 (also defined as broadcast-GID in IETF documents) must
49 for the existence of this broadcast-GID during \fBattach\fR(9E).
58 Maximum SDU is the MTU associated with the broadcast-GID group, less the 4 byte
71 dlsap address length is 22.
83 The sap length value is -2, meaning the physical address component is followed
84 immediately by a 2-byte sap component within the DLSAP address.
90 Broadcast address value is the MAC address consisting of the 4 bytes of QPN
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/illumos-gate/usr/src/man/man3c/
H A Ddlsym.3c8 dlsym \- get the address of a symbol in a shared object or executable
20 The \fBdlsym()\fR function allows a process to obtain the address of a symbol
67 symbol. This handle does not trigger an exhaustive load of any lazy loadable
140 /* find the address of function and data objects */
174 to dynamically-linked processes only. See the \fILinker and Libraries Guide\fR.
190 MT-Level MT-Safe
213 address of any symbol obtained using a handle to this object. For example,
215 returning the address of the symbol \fI_end\fR within the filtee, not the
/illumos-gate/usr/src/uts/sparc/v9/ml/
H A Dsparcv9_subr.S32 * architecture-dependent routines change, the routines should be moved
33 * from this file into the respective ../`arch -k`/subr.s file.
58 * Also avoid going below CPU->cpu_base_spl, which could've just been set by
59 * a higher-level interrupt thread that just blocked.
80 * Doesn't require comparison to CPU->cpu_base_spl.
96 * Avoid dropping the priority below CPU->cpu_base_spl.
114 * Doesn't require comparison to CPU->cpu_base_spl.
177 /* sun specific - highest priority onboard serial i/o zs ports */
202 * splx - set PIL back to that indicated by the old %pil passed as an argument,
216 * Be careful not to set priority lower than CPU->cpu_base_pri,
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/illumos-gate/usr/src/uts/common/sys/fs/
H A Dautofs.h58 * Tracing macro; expands to nothing for non-debug kernels.
70 struct vfs *fi_mountvfs; /* mounted-here VFS */
73 struct netbuf fi_addr; /* daemon address */
75 char *fi_map; /* context/map-name */
105 * - Grab readers when checking if certain fn_node exists
107 * - Grab readers when attempting to reference a node
109 * - Grab writers to add a new fnnode under fn_dirents and
117 * - Indicates a mount request has been sent to the daemon.
118 * - If this flag is set, the thread sets MF_WAITING on the
122 * - Set by a thread when it puts itself to sleep waiting for
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/illumos-gate/usr/src/test/os-tests/tests/pf_key/
H A Dacquire-compare.sh28 if [[ `id -u` != 0 ]]; then
33 if [[ ! -x "$(type -p curl)" ]]; then
39 MY_IP=`netstat -in -f inet | egrep -v "Name|lo0" | awk '{print $4}' | head -1`
57 MONITOR_LOG=/tmp/ipseckey-monitor.$$
59 EACQ_PROG=/opt/os-tests/tests/pf_key/eacq-enabler
65 ipsecconf -Fq
68 ipsecconf -qa - << EOF
70 # Remote-port-based policy. Use different algorithms...
76 # Simple IP address policy. Use an AH + ESP for it.
81 { tunnel rush0 raddr $T1_PREFIX negotiate tunnel } ipsec { encr_algs aes-gcm(256) }
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/illumos-gate/usr/src/man/man3m/
H A Dfex_set_log.3m9 \- log retrospective diagnostics for floating point exceptions
12 c99 [ \fIflag\fR... ] \fIfile\fR... -lm [ \fIlibrary\fR... ]
49 \fIsite\fR in the program. The site is identified by the address of the
72 log entry shows the type of exception, the address of the instruction that
74 available, the address of the excepting instruction and the addresses in the
90 The \fBfex_log_entry()\fR function adds a user-supplied entry to the log. The
92 entries for floating point exceptions, redundant user-supplied entries are
93 eliminated: only the first user-supplied entry with a given \fImsg\fR to be
94 requested from a given site will be logged. For the purpose of a user-supplied
98 The \fBfex_set_log()\fR function returns a non-zero value if logging is enabled
[all …]
/illumos-gate/usr/src/uts/common/io/audio/drv/audiosolo/
H A Daudiosolo.c32 * Copyright (C) 4Front Technologies 1996-2008.
42 * NB: The Solo-1 is a bit schizophrenic compared to most devices.
50 * are configured for 48 kHz stereo 16-bit signed PCM.
54 * ESS Solo-1 only implements the low 24-bits on Audio1, and requires
55 * 64KB alignment. For Audio2, it implements the full 32-bit address
56 * space, but requires a 1MB address boundary. Audio1 is used for
120 #define INSRCS 0x1f /* bits 0-4 */
129 AUDIO_PORT_AUX2IN, /* this is really mono-in */
147 bool trigger; member
240 return ((PORT_RD8(dev->sb, 0xc) & 0x80) == 0 ? true : false); in solo_dspready()
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/illumos-gate/usr/src/uts/sun4/sys/
H A Dsudev.h61 #define OUTB(offset, value) ddi_put8(asy->asy_handle, \
62 asy->asy_ioaddr+offset, value)
63 #define INB(offset) ddi_get8(asy->asy_handle, asy->asy_ioaddr+offset)
66 * INTEL 8210-A/B & 16450/16550 Registers Structure.
116 #define FFTMOUT 0x0c /* FIFO timeout - 16550AF */
128 #define OUT1 0x04 /* Aux output - not used */
148 #define FIFOEN 0x8f /* fifo enabled, w/ 8 byte trigger */
154 #define FIFO_TRIG_1 0x00 /* 1 byte trigger level */
155 #define FIFO_TRIG_4 0x40 /* 4 byte trigger level */
156 #define FIFO_TRIG_8 0x80 /* 8 byte trigger level */
[all …]
/illumos-gate/usr/src/lib/libwrap/
H A Dsocket.c8 * socket address and port, the server socket address and port. In addition,
9 * it provides methods to map a transport address to a printable host name
10 * or address. Socket address information results are in static memory.
54 * that lack DNS-style trailing dot magic, such as local files or NIS maps.
68 if (strchr(name, '.') == 0 || strlen(name) >= MAXHOSTNAMELEN - 1) {
79 /* sock_host - look up endpoint addresses and install conversion methods */
88 int fd = request->fd;
93 * Look up the client host address. Hal R. Brand <BRAND@addvax.llnl.gov>
103 request->sink = sock_sink;
107 tcpd_warn("can't get client address: %m");
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/illumos-gate/usr/src/uts/intel/ml/
H A Di86_subr.S46 * architecture-dependent routines change, the routines should be moved
47 * from this file into the respective ../`arch -k`/subr.s file.
83 movq T_ONFAULT(%rsi), %rdi /* address of save area */
102 * do a longjmp(&curthread->t_ontrap->ot_jmpbuf) if this is ever called.
127 movq T_ONTRAP(%rdx), %rcx /* rcx = curthread->t_ontrap */
132 movq %rdi, T_ONTRAP(%rdx) /* curthread->t_ontrap = otp */
139 * Setjmp and longjmp implement non-local gotos using state vectors
155 movq (%rsp), %rdx /* return address */
169 movq (%rdi), %rdx /* return address; LABEL_PC is 0 */
178 * caller() returns return address in a().
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/illumos-gate/usr/src/boot/efi/include/Protocol/
H A DLegacy8259.h5 Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
51 Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
52 the legacy mode mask and the protected mode mask. The base address for the 8259
72 Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
73 the legacy mode mask and the protected mode mask. The base address for the 8259
77 @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.
78 @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
79 @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.
80 @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.
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