Lines Matching +full:trigger +full:- +full:address
61 #define OUTB(offset, value) ddi_put8(asy->asy_handle, \
62 asy->asy_ioaddr+offset, value)
63 #define INB(offset) ddi_get8(asy->asy_handle, asy->asy_ioaddr+offset)
66 * INTEL 8210-A/B & 16450/16550 Registers Structure.
116 #define FFTMOUT 0x0c /* FIFO timeout - 16550AF */
128 #define OUT1 0x04 /* Aux output - not used */
148 #define FIFOEN 0x8f /* fifo enabled, w/ 8 byte trigger */
154 #define FIFO_TRIG_1 0x00 /* 1 byte trigger level */
155 #define FIFO_TRIG_4 0x40 /* 4 byte trigger level */
156 #define FIFO_TRIG_8 0x80 /* 8 byte trigger level */
157 #define FIFO_TRIG_14 0xC0 /* 14 byte trigger level */
185 #define SIO_MASK(elem) (1<<((elem)-1))
197 #define RINGMASK (RINGSIZE-1)
200 #define RING_INIT(ap) ((ap)->async_rput = (ap)->async_rget = 0)
201 #define RING_CNT(ap) (((ap)->async_rput - (ap)->async_rget) & RINGMASK)
203 #define RING_POK(ap, n) ((int)RING_CNT(ap) < (int)(RINGSIZE-(n)))
205 ((ap)->async_ring[(ap)->async_rput++ & RINGMASK] = (uchar_t)(c))
206 #define RING_UNPUT(ap) ((ap)->async_rput--)
208 #define RING_GET(ap) ((ap)->async_ring[(ap)->async_rget++ & RINGMASK])
209 #define RING_EAT(ap, n) ((ap)->async_rget += (n))
211 ((ap)->async_ring[(ap)->async_rput++ & RINGMASK] = ((uchar_t)(c)|(s)))
213 ((ap)->async_ring[((ap)->async_rget) & RINGMASK] &= ~S_ERRORS)
215 ((ap)->async_ring[((ap)->async_rget) & RINGMASK] & (c))
225 #define INC64_KSTAT(asy, stat) (asy)->kstats.stat.value.ui64++;
242 uchar_t *asy_ioaddr; /* i/o address of ASY port */
289 bufcall_id_t async_wbufcid; /* id for pending write-side bufcall */
372 #define RSC_DEVICE (1 << (NBITSMINOR32 - 4))
375 * OUTLINE defines the high-order flag bit in the minor device number that
378 #define OUTLINE (1 << (NBITSMINOR32 - 1))
389 if (mutex_tryenter(asy->asy_soft_lock)) { \
390 asy->asy_flags |= ASY_NEEDSOFT; \
391 if (!asy->asysoftpend) { \
392 asy->asysoftpend = 1; \
393 mutex_exit(asy->asy_soft_lock);\
394 ddi_trigger_softintr(asy->asy_softintr_id);\
396 mutex_exit(asy->asy_soft_lock);\