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/linux/drivers/clk/sophgo/
H A DKconfig14 tristate "Sophgo SG2042 PLL clock support"
18 Sophgo SG2042 SoC. This clock IP uses three oscillators with
23 tristate "Sophgo SG2042 Clock Generator support"
27 Sophgo SG2042 SoC. This clock IP depends on SG2042 PLL clock
32 tristate "Sophgo SG2042 RP subsystem clock controller support"
36 controller on the Sophgo SG2042 SoC.
37 This clock IP depends on SG2042 Clock Generator because it uses
H A DMakefile9 obj-$(CONFIG_CLK_SOPHGO_SG2042_CLKGEN) += clk-sg2042-clkgen.o
10 obj-$(CONFIG_CLK_SOPHGO_SG2042_PLL) += clk-sg2042-pll.o
11 obj-$(CONFIG_CLK_SOPHGO_SG2042_RPGATE) += clk-sg2042-rpgate.o
H A Dclk-sg2042-rpgate.c3 * Sophgo SG2042 RP clock Driver
13 #include <dt-bindings/clock/sophgo,sg2042-rpgate.h>
15 #include "clk-sg2042.h"
274 { .compatible = "sophgo,sg2042-rpgate" },
282 .name = "clk-sophgo-sg2042-rpgate",
290 MODULE_DESCRIPTION("Sophgo SG2042 rp subsystem clock driver");
H A Dclk-sg2042-pll.c3 * Sophgo SG2042 PLL clock Driver
18 #include <dt-bindings/clock/sophgo,sg2042-pll.h>
20 #include "clk-sg2042.h"
542 { .compatible = "sophgo,sg2042-pll" },
550 .name = "clk-sophgo-sg2042-pll",
558 MODULE_DESCRIPTION("Sophgo SG2042 pll clock driver");
/linux/Documentation/devicetree/bindings/reset/
H A Dsophgo,sg2042-reset.yaml4 $id: http://devicetree.org/schemas/reset/sophgo,sg2042-reset.yaml#
7 title: Sophgo SG2042 SoC Reset Controller
18 - const: sophgo,sg2042-reset
21 - sophgo,sg2042-reset
39 compatible = "sophgo,sg2042-reset";
/linux/Documentation/devicetree/bindings/clock/
H A Dsophgo,sg2042-rpgate.yaml4 $id: http://devicetree.org/schemas/clock/sophgo,sg2042-rpgate.yaml#
7 title: Sophgo SG2042 Gate Clock Generator for RP(riscv processors) subsystem
14 const: sophgo,sg2042-rpgate
30 See <dt-bindings/clock/sophgo,sg2042-rpgate.h> for valid indices.
44 compatible = "sophgo,sg2042-rpgate";
H A Dsophgo,sg2042-pll.yaml4 $id: http://devicetree.org/schemas/clock/sophgo,sg2042-pll.yaml#
7 title: Sophgo SG2042 PLL Clock Generator
14 const: sophgo,sg2042-pll
34 See <dt-bindings/clock/sophgo,sg2042-pll.h> for valid indices.
48 compatible = "sophgo,sg2042-pll";
H A Dsophgo,sg2042-clkgen.yaml4 $id: http://devicetree.org/schemas/clock/sophgo,sg2042-clkgen.yaml#
7 title: Sophgo SG2042 Clock Generator for divider/mux/gate
14 const: sophgo,sg2042-clkgen
36 See <dt-bindings/clock/sophgo,sg2042-clkgen.h> for valid indices.
50 compatible = "sophgo,sg2042-clkgen";
/linux/Documentation/devicetree/bindings/pwm/
H A Dsophgo,sg2042-pwm.yaml4 $id: http://devicetree.org/schemas/pwm/sophgo,sg2042-pwm.yaml#
7 title: Sophgo SG2042 PWM controller
21 - sophgo,sg2042-pwm
51 #include <dt-bindings/reset/sophgo,sg2042-reset.h>
54 compatible = "sophgo,sg2042-pwm";
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dsophgo,sg2042-msi.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-msi.yaml#
7 title: Sophgo SG2042 MSI Controller
13 This interrupt controller is in Sophgo SG2042 for transforming interrupts from
22 - sophgo,sg2042-msi
57 compatible = "sophgo,sg2042-msi";
/linux/arch/riscv/boot/dts/sophgo/
H A DMakefile5 dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb
6 dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-evb-v1.dtb
7 dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-evb-v2.dtb
H A Dsg2042-evb-v2.dts6 #include "sg2042.dtsi"
12 model = "Sophgo SG2042 EVB V2.0";
13 compatible = "sophgo,sg2042-evb-v2", "sophgo,sg2042";
133 compatible = "sophgo,sg2042-hwmon-mcu";
H A Dsg2042-evb-v1.dts6 #include "sg2042.dtsi"
12 model = "Sophgo SG2042 EVB V1.X";
13 compatible = "sophgo,sg2042-evb-v1", "sophgo,sg2042";
145 compatible = "sophgo,sg2042-hwmon-mcu";
H A Dsg2044-sophgo-srd3-10.dts60 compatible = "sophgo,sg2044-hwmon-mcu", "sophgo,sg2042-hwmon-mcu";
H A Dsg2044.dtsi388 compatible = "sophgo,sg2044-dwcmshc", "sophgo,sg2042-dwcmshc";
400 compatible = "sophgo,sg2044-dwcmshc", "sophgo,sg2042-dwcmshc";
580 "sophgo,sg2042-reset";
/linux/drivers/pwm/
H A Dpwm-sophgo-sg2042.c3 * Sophgo SG2042 PWM Controller Driver
16 * - SG2044 supports both polarities, SG2042 only normal polarity.
18 * [1]:https://github.com/sophgo/sophgo-doc/tree/main/SG2042/TRM
227 .compatible = "sophgo,sg2042-pwm",
291 .name = "sg2042-pwm",
300 MODULE_DESCRIPTION("Sophgo SG2042 PWM driver");
/linux/Documentation/hwmon/
H A Dsg2042-mcu.rst3 Kernel driver sg2042-mcu
8 * Onboard MCU for sg2042
12 Prefix: 'sg2042-mcu'
69 data in ``/sys/kernel/debug/sg2042-mcu/*/``.
/linux/Documentation/devicetree/bindings/timer/
H A Dthead,c900-aclint-mtimer.yaml17 - sophgo,sg2042-aclint-mtimer
48 compatible = "sophgo,sg2042-aclint-mtimer", "thead,c900-aclint-mtimer";
/linux/drivers/irqchip/
H A Dirq-sg2042-msi.c3 * SG2042 MSI Controller
89 .name = "SG2042 MSI",
207 .prefix = "SG2042-",
328 { .compatible = "sophgo,sg2042-msi", .data = &sg2042_chip_info },
335 .name = "sg2042-msi",
/linux/Documentation/devicetree/bindings/spi/
H A Dspi-sg2044-nor.yaml18 - sophgo,sg2042-spifmc-nor
/linux/drivers/reset/
H A Dreset-simple.c156 { .compatible = "sophgo,sg2042-reset",