xref: /linux/Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm.yaml (revision f38b7512903a50eaeb300e9c8d9448187dd3959c) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/sophgo,sg2042-pwm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Sophgo SG2042 PWM controller
8
9maintainers:
10  - Chen Wang <unicorn_wang@outlook.com>
11
12description:
13  This controller contains 4 channels which can generate PWM waveforms.
14
15allOf:
16  - $ref: pwm.yaml#
17
18properties:
19  compatible:
20    enum:
21      - sophgo,sg2042-pwm
22      - sophgo,sg2044-pwm
23
24  reg:
25    maxItems: 1
26
27  clocks:
28    maxItems: 1
29
30  clock-names:
31    items:
32      - const: apb
33
34  resets:
35    maxItems: 1
36
37  "#pwm-cells":
38    const: 3
39
40required:
41  - compatible
42  - reg
43  - clocks
44  - clock-names
45  - resets
46
47unevaluatedProperties: false
48
49examples:
50  - |
51    #include <dt-bindings/reset/sophgo,sg2042-reset.h>
52
53    pwm@7f006000 {
54        compatible = "sophgo,sg2042-pwm";
55        reg = <0x7f006000 0x1000>;
56        #pwm-cells = <3>;
57        clocks = <&clock 67>;
58        clock-names = "apb";
59        resets = <&rstgen RST_PWM>;
60    };
61