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/linux/Documentation/devicetree/bindings/mmc/
H A Dmtk-sd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chaotian Jing <chaotian.jing@mediatek.com>
11 - Wenbin Mei <wenbin.mei@mediatek.com>
16 - enum:
17 - mediatek,mt2701-mmc
18 - mediatek,mt2712-mmc
19 - mediatek,mt6779-mmc
[all …]
H A Dmmc-controller-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MMC Controller & Slots Common Properties
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 These properties are common to multiple MMC host controllers and the
14 possible slots or ports for multi-slot controllers.
17 "#address-cells":
22 "#size-cells":
[all …]
H A Dsprd,sdhci-r11.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/sprd,sdhci-r11.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
16 const: sprd,sdhci-r11
27 - description: SDIO source clock
28 - description: gate clock for enabling/disabling the device
[all …]
H A Dmarvell,xenon-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This file documents differences between the core MMC properties described by
11 mmc-controller.yaml and the properties used by the Xenon implementation.
20 - Ulf Hansson <ulf.hansson@linaro.org>
25 - enum:
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-emmc.dtso1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
11 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
14 &{/soc/mmc@11230000} {
15 bus-width = <8>;
16 max-frequency = <200000000>;
17 cap-mmc-highspeed;
18 mmc-hs200-1_8v;
19 mmc-hs400-1_8v;
20 hs400-ds-delay = <0x14014>;
[all …]
H A Dmt8188-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
11 compatible = "mediatek,mt8188-evb", "mediatek,mt8188";
26 stdout-path = "serial0:115200n8";
34 reserved_memory: reserved-memory {
35 #address-cells = <2>;
36 #size-cells = <2>;
40 compatible = "shared-dma-pool";
42 no-map;
52 pinctrl-names = "default";
[all …]
H A Dmt8183-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 chassis-type = "embedded";
15 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
27 stdout-path = "serial0:921600n8";
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
35 compatible = "shared-dma-pool";
37 no-map;
[all …]
H A Dmt7986a-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/mt65xx.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
22 stdout-path = "serial0:115200n8";
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
33 regulator-min-microvolt = <1800000>;
[all …]
H A Dmt8365-evk.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022 BayLibre, SAS.
10 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/pinctrl/mt8365-pinfunc.h>
20 compatible = "mediatek,mt8365-evk", "mediatek,mt8365";
28 stdout-path = "serial0:921600n8";
32 compatible = "hdmi-connector";
37 #address-cells = <1>;
[all …]
/linux/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/sprd,sc9860-clk.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 compatible = "simple-bus";
17 #address-cells = <2>;
18 #size-cells = <2>;
66 ap-apb@70000000 {
67 compatible = "simple-bus";
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3562-evb2-v10.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2024-2025 Rockchip Electronics Co., Ltd.
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/rockchip.h>
17 compatible = "rockchip,rk3562-evb2-v10", "rockchip,rk3562";
20 stdout-path = "serial0:1500000n8";
23 adc_keys: adc-keys {
[all …]
H A Drk3399-evb-ind.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 compatible = "rockchip,rk3399-evb-ind", "rockchip,rk3399";
19 stdout-path = "serial2:1500000n8";
22 vcc5v0_sys: regulator-vcc5v0-sys {
23 compatible = "regulator-fixed";
24 enable-active-high;
26 regulator-name = "vcc5v0_sys";
27 regulator-always-on;
28 regulator-boot-on;
[all …]
H A Drk3588-coolpi-cm5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pwm/pwm.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
15 compatible = "coolpi,pi-cm5", "rockchip,rk3588";
24 analog-sound {
25 compatible = "audio-graph-card";
27 label = "rk3588-es8316";
36 stdout-path = "serial2:1500000n8";
[all …]
H A Drk3588-edgeble-neu6a-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
14 gpio-leds {
15 compatible = "gpio-leds";
17 led_user: led-0 {
21 linux,default-trigger = "heartbeat";
22 pinctrl-names = "default";
23 pinctrl-0 = <&led_user_en>;
27 vcc12v_dcin: regulator-vcc12v-dcin {
[all …]
H A Drk3588-armsom-lm7.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
17 stdout-path = "serial2:1500000n8";
20 vcc5v0_sys: regulator-vcc5v0-sys {
21 compatible = "regulator-fixed";
22 regulator-name = "vcc5v0_sys";
23 regulator-always-on;
24 regulator-boot-on;
[all …]
H A Drk3588-firefly-core-3588j.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/pinctrl/rockchip.h>
9 compatible = "firefly,core-3588j", "rockchip,rk3588";
17 cpu-supply = <&vdd_cpu_big0_s0>;
21 cpu-supply = <&vdd_cpu_big0_s0>;
25 cpu-supply = <&vdd_cpu_big1_s0>;
29 cpu-supply = <&vdd_cpu_big1_s0>;
33 cpu-supply = <&vdd_cpu_lit_s0>;
37 cpu-supply = <&vdd_cpu_lit_s0>;
[all …]
H A Drk3588-firefly-icore-3588q.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/pinctrl/rockchip.h>
9 compatible = "firefly,icore-3588q", "rockchip,rk3588";
17 cpu-supply = <&vdd_cpu_big0_s0>;
21 cpu-supply = <&vdd_cpu_big0_s0>;
25 cpu-supply = <&vdd_cpu_big1_s0>;
29 cpu-supply = <&vdd_cpu_big1_s0>;
33 cpu-supply = <&vdd_cpu_lit_s0>;
37 cpu-supply = <&vdd_cpu_lit_s0>;
[all …]
H A Drk3588-tiger.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
13 compatible = "tsd,rk3588-tiger", "rockchip,rk3588";
21 emmc_pwrseq: emmc-pwrseq {
22 compatible = "mmc-pwrseq-emmc";
23 pinctrl-0 = <&emmc_reset>;
24 pinctrl-names = "default";
25 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779f0-spider-cpu.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
15 compatible = "renesas,spider-cpu", "renesas,r8a779f0";
30 stdout-path = "serial0:1843200n8";
34 compatible = "gpio-leds";
36 led-7 {
40 function-enumerator = <7>;
43 led-8 {
47 function-enumerator = <8>;
[all …]
H A Dr8a779a0-falcon-cpu.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
16 compatible = "renesas,falcon-cpu", "renesas,r8a779a0";
30 stdout-path = "serial0:115200n8";
34 compatible = "gpio-keys";
36 pinctrl-0 = <&keys_pins>;
37 pinctrl-names = "default";
39 key-1 {
[all …]
H A Dwhite-hawk-cpu-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
27 stdout-path = "serial0:921600n8";
30 sn65dsi86_refclk: clk-x6 {
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
33 clock-frequency = <38400000>;
37 compatible = "gpio-keys";
[all …]
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-3720-uDPU.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include "armada-372x.dtsi"
19 stdout-path = "serial0:115200n8";
28 compatible = "gpio-leds";
29 pinctrl-names = "default";
30 pinctrl-0 = <&spi_quad_pins>;
32 led-power1 {
[all …]
H A Darmada-3720-gl-mv1000.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include "armada-372x.dtsi"
9 model = "GL.iNet GL-MV1000";
10 compatible = "glinet,gl-mv1000", "marvell,armada3720", "marvell,armada3710";
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsda660-inforce-ifc6560.dts1 // SPDX-License-Identifier: BSD-3-Clause
9 /dts-v1/;
18 chassis-type = "embedded"; /* SBC */
26 stdout-path = "serial0:115200n8";
29 gpio-keys {
30 compatible = "gpio-keys";
32 key-volup {
36 debounce-interval = <15>;
41 * Until we hook up type-c detection, we
44 extcon_usb: extcon-usb {
[all …]
H A Dsdm660-xiaomi-lavender.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/input/gpio-keys.h>
18 chassis-type = "handset";
25 #address-cells = <2>;
26 #size-cells = <2>;
29 stdout-path = "serial0:115200n8";
32 compatible = "simple-framebuffer";
41 vph_pwr: vph-pwr-regulator {
[all …]

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